High-speed Interconnect Design Research Articles

Performance Analysis of Microstriplines Interconnect Structure with Novel Guard Trace as Parallel Links for High Speed Dram Interfaces

Wireless communication have progressed so fast in recent years with the increased frequency of operation, faster signal speed, reduced feature size and increased the integration of analog and digital blocks within a constrained space. These made the signal integrity analysis is a challengine task to printed circuit board designers. The signal integrity effects need to be mitigated by the proper design of high speed interconnects. In order to reduce crosstalk and crosstalk induced jitter in high speed parallel links to DRAM interface, a novel parallel microstriplines with U shaped guard trace interconnect structure is proposed. The crosstalk performance of the proposed interconnect structure, it can be implemented in DRAM board and compared with the conventional guard intervening scheme. The proposed structure increased the maximum data rate from 800 Mbps to 3.3 Gbps and reduced CIJ more than 2 ps.

Where Did EM Simulation Tools Go?: A Comparison of How EM Tools Were Used in Circuit Simulators 25 Years Ago to Today

Electromagnetic (EM) simulation has become commonplace for radio-frequency (RF) and microwave circuit designers. Interconnect discontinuities, for example, board-module-chip transitions, high-speed interconnect design, and circuit performance with compacted layout, all rely on EM simulators giving answers to predict the performance more accurately than traditional models. This article examines current trends with regard to how designers use EM tools in circuit simulators. The conclusion is that traditional stand-alone tools are disappearing. This does not mean that EM will not be used; rather, EM will be so highly integrated into the design software that much of it will be hidden from the average designer.

Robust Design of High-Speed Interconnects Based on an MWCNT

A robust design of the propagation characteristics of interconnect structures based on multiwall carbon nanotubes (MWCNTs) is carried out. The study allows us to identify the minimum number of shells N of the MWCNT able to guarantee that the time delay at 50% outperforms the Cu-based solution for the upcoming technology nodes, taking into account the uncertainties affecting other geometrical and physical parameters of the device. Such an investigation is carried out in the most severe conditions for the MWCNTs-based device, i.e., for short and thin wire structures, starting from the minimum interconnect length for which the MWCNT outperforms the Cu-based solution. A worst case polynomial expression of the time delay as a function of the number of the shells of the MWCNT, obtained on the basis of the equivalent single conductor model of the nano-interconnect, is adopted for the optimization procedure. The minimum number of shells that lead to outperform the Cu-based solution is determined by the use of an approach relying on a particular application of the interval analysis to find the upper bound of the performance function. The quality of the results is checked by a Monte Carlo analysis.

Frequency-Dependent Substrate Characterization via an Iterative Pole Search Algorithm

The characterization of frequency-dependent material properties is an important issue in nowadays high-speed interconnect design. This letter presents a practical method to determine the complex permittivity of a substrate material, by combining measurements with simulations. A rational permittivity model is determined by searching for its poles and residues using an iterative optimization method. Its accuracy is verified by comparing coplanar waveguide measurements with simulations based on the new material model.

Analytical modelling of microstrip-like interconnections in presence of ground plane aperture

High-speed multichip module interconnects are characterised by planar transmission lines. An interconnect line with ground plane aperture is essentially a microstrip line with partially removed ground plane below the line. The authors report the closed-form analytical expressions for line capacitance and characteristic impedance of microstrip interconnect line with a ground plane aperture. The expressions have been obtained using variational analysis combined with transverse transmission line technique. The closed-form expressions are general and are obtained for a range of structure parameters and the dielectric constants. Results are compared with finite-difference time-domain simulations and measurements performed on a vector network analyser. The proposed study can find applications in the design of high-speed interconnects for printed circuit boards, radio frequency (RF) and multichip module applications. These are particularly useful where high impedance lines are required.

Modal Analysis of Microstrip Lines Using Singular Value Decomposition Analysis of FDTD Simulations

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> A comprehensive modal analysis of microstrip circuits using the singular value decomposition analysis of finite-difference time-domain simulation results has been performed. The detailed information have revealed new physical features, which are, to our best knowledge, seen for the first time. This realistic approach includes the 3-D configuration of structures and the full-wave electromagnetic properties. Increasing the aspect ratio of a continuous microstrip line strengthens the fundamental transverse electromagnetic mode and weakens the higher order transverse magnetic modes. However, the introduction of gap discontinuity in the line enhances the mode strength in the vicinity of the gap. The physical interpretations of these results have been discussed in the paper. Moreover, the effects of line topology on the evolution of modes are illustrated. This investigation has physical significance in the practical design of high-speed interconnects and system-on-chip. </para>

Neural-based Transient Behavioral Modeling of IC Buffers for High-speed Interconnect Design

Artiflcial neural networks (ANN) have gained attention as fast and ∞exible vehicles to microwave modeling and design. This paper reviews a recent advance of neural network modeling, i.e., state-space dynamic neural network (SSDNN) for transient behavioral modeling of high-speed nonlinear circuits. The SSDNN model can be directly trained from the input and output waveforms without relying on the circuit internal details. A training algorithm exploiting adjoint sensitivities is summarized for training the model in an e-cient manner. An example of the SSDNN technique for IC bufier modeling and its use with transmission line elements in high-speed interconnect design are included. DOI: 10.2529/PIERS060907175229 With the continuous increase of signal speed and frequency, signal integrity (SI) in VLSI pack- ages becomes more and more prominent. Fast and accurate representations of the nonlinear analog behaviors of driver/receiver bufiers are the key to the success of SI-based design of high-speed inter- connects with nonlinear terminations (1,2). As such, developing e-cient bufier models for transient applications has become an important topic (3{5). To ensure model reliability in circuit simula- tions, the model stability remains one of the most critical aspects of nonlinear transient modeling. In the neural network community, global asymptotical stability and global exponential stability have been studied for some special classes of dynamic networks, e.g., Hopfleld neural networks (6), recurrent neural networks (7), and discrete-time state-space neural networks (8). Recently stability for ANN-based analog microwave modeling has also been addressed (9). This paper summarizes a state-space dynamic neural network (SSDNN) technique for modeling nonlinear transient behaviors of IC drivers and receivers (5). We describe the detailed structure of SSDNN and how to train the model based on the transient waveforms from the original circuits. An example is provided to demonstrate the application of the SSDNN model in coupled transmission line environments. Let u 2 < M be transient input signals of a nonlinear circuit, e.g., input voltages and currents, and y 2 < K be transient output signals of a nonlinear circuit, e.g., output voltages and currents where M and K are the numbers of circuit inputs and outputs respectively. Based on combining state-space concept and continuous recurrent neural network method (10), the SSDNN nonlinear model is formulated as (5) ( _ x(t) = ix(t) + ?g ANN (u(t);x(t);w)

An adjoint sensitivity technique for dynamic neural-network modeling and design of high-speed interconnect

In this article, we develop an adjoint dynamic neural network (ADNN) technique aimed at enhancing computer-aided design (CAD) of high-speed VLSI modules. A novel formulation for exact sensitivities is achieved by defining an adjoint of a dynamic neural network (DNN). We further present an in-depth description of how our ADNN is computationally linked with the original DNN in the transient-simulation environment in order to improve the efficiency of solving the ADNN. Using ADNN-enabled sensitivities, we develop a new training algorithm that facilitates DNN learning of nonlinear transients directly from continuous time-domain waveform data. The proposed algorithm is also expanded to enable physics-based nonlinear circuit CAD through faster sensitivity computations. Applications of our ADNN approach in transient modeling and circuit design are demonstrated by the examples of modeling physics-based high-speed interconnect drivers and gradient-based signal integrity optimization. © 2006 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2006.