High Speed Integrated Circuits Program Research Articles

High-performance FPGA implementation of the secure hash algorithm 3 for single and multi-message processing

<span>The secure hash function has become the default choice for information security, especially in applications that require data storing or manipulation. Consequently, optimized implementations of these functions in terms of Throughput or Area are in high demand. In this work we propose a new conception of the secure hash algorithm 3 (SHA-3), which aim to increase the performance of this function by using pipelining, four types of pipelining are proposed two, three, four, and six pipelining stages. This approach allows us to design data paths of SHA-3 with higher Throughput and higher clock frequencies. The design reaches a maximum Throughput of 102.98 Gbps on Virtex 5 and 115.124 Gbps on Virtex 6 in the case of the 6 stages, for 512 bits output length. Although the utilization of the resource increase with the increase of the number of the cores used in each one of the cases. The proposed designs are coded in very high-speed integrated circuits program (VHSIC) hardware description language (VHDL) and implemented in Xilinx Virtex-5 and Virtex-6 A field-programmable gate array (FPGA) devices and compared to existing FPGA implementations.</span>

The potential for industrial policy: Lessons from the very high speed integrated circuit program

AbstractA Pentagon program to advance semiconductor technology offers some important empirical evidence for the national debate over industrial policy. While not an explicit attempt at promoting international competitiveness, the Very High Speed Integrated Circuit (VHSIC) program does contain a whole series of industrial policy‐like features, including joint government‐industry planning, widespread industry participation, and multifirm collaboration. These striking features cannot be attributed solely to VHSIC's affiliation with the military. Instead, the sources of the program's industrial policy characteristics are to be found in the nature of the technologies selected for development, the incorporation of private sector advice, the mitigation of threats to proprietary interests, avoidance of redistributional issues, and the utilization of industry competition and networks of communication‐all factors directly relevant to industrial policymaking generally.

The Potential for Industrial Policy: Lessons from the Very High Speed Integrated Circuit Program

The Potential for Industrial Policy: Lessons from the Very High Speed Integrated Circuit Program

VHSIC Hardware Description Language

In March 1980, the US Department of Defense (DoD) launched the Very High Speed Integrated Circuits program to advance the state of the art in highspeed integrated circuit technology, specifically for defense systems. In 1981 the Institute for Defense Analyses (IDA) arranged a workshop to define the requirements for such a standard. The DoD used the final report of the IDA workshop as a basis for defining a set of language requirements for the VHSIC Hardware Description Language (VHDL), issuing a request for proposal for a two-phase procurement of VHDL and its support environment. VHDL supports the design, documentation, and efficient simulation of hardware from the digital system level to the gate level. While designed to be independent of any underlying technology, design methodology, or environment tool, the language is also extendable toward various hardware technologies, design methodologies, and the varying information needs of design automation tools. The authors begin their discussion of VHDL by describing the concept of design entity, the language's primary abstraction mechanism. They then present a time-based execution model and describe VHDL's features, using a coded four-bit adder to illustrate the use of the most significant ones. Various figures are presented that contain the block diagrams and the code for this example.

Hardware design and description languages in IBM

Hardware design languages (HDLs) allow computer hardware to be described in sufficient detail to be simulated and built, such a description being at a sufficiently high level of abstraction to make the complete design readily intelligible to anyone skilled in that language. A number of HDLs have been developed and are in use in IBM. To date, no overwhelming case can be made for choosing any one HDL over the others. The major trends in HDL are discussed. Several examples of HDLs are presented in some detail. VHDL, the yet-to-be released HDL which is to serve as a front end to the U.S. Government's Very High Speed Integrated Circuits program, is among these.