High Speed DSP Research Articles

Design and implementation of embedded hardware in furniture control based on DSP

The continuous progress of embedded technology and Internet of Things technology has accelerated the arrival of the era of home intelligence. By designing a smart home control system based on embedded DSP technology, it can detect temperature, humidity, flammable gas leakage, smoke, fire, and other indicators in the home environment, and carry out intelligent control of the detected security risks. The core of the system is the smart home management terminal, which is responsible for the network interconnection inside and outside the home. Terminal hardware includes a high-speed DSP chip, various interface modules, and so on. The software adopts the C/OS-II operating system to realize multi-task processing. This paper briefly summarizes DSP technology and embedded technology, and proposes the composition of intelligent home control system based on embedded DSP technology, as well as the hardware and software design and implementation of the system. Through the smart home system, users can control home conditions and obtain public service information anytime and anywhere, which is highly practical.

Energy Measurement Technology of Low-frequency 20 Hz Intelligent Energy Meter

A high-speed and high-precision voltage and current acquisition scheme suitable for 20 Hz low-frequency energy metering, and an energy meter suitable for low-frequency transmission scenarios was designed in this paper. A high-precision energy metering algorithm based on low-frequency metering for three-phase energy meters, using the four-term third-order Nuttall window algorithm to address the impact of asynchronous sampling on metering was proposed in this paper. Equipped with sampling and metering algorithms suitable for low-frequency transmission, the designed meter achieves seamless calibration of diagonal difference and stable power calculation. Adopting an A/D+DSP metering scheme, a 24-bit A/D chip is selected as the signal sampling unit, and a 32-bit high-speed DSP is used as the signal processing unit to achieve the sampling and processing function of 20 Hz signals, completing the low-frequency transmission scenario electricity metering.

High-Speed DSP Pipelining and Retiming techniques for Distributed-Arithmetic RNS-based FIR Filter Design

Digital FIR Filters plays a major role in many signal processing applications. Generally, these filters are designed with multipliers and adders to find the filter output. This paper acquaints how to reduce the complexity of higher order FIR filter by using performance optimization techniques like retiming and pipelining. The filter’s throughput, energy efficiency, and latency, as well as the complexity of its technology, all need to be improved. By adopting pipelining technique, the arithmetic processes of addition and multiplication are separated. The break addition procedure is retimed. The architecture of Pipelining and Retiming with m-tap filters and n-bit word lengths were designed. The smallest delay achieved by the proposed distributed arithmetic-based FIR Filter with pipelining was 2.564ns for a 4tap implementation receiving an 8bit input, while the largest delay achieved was 56.04ns for a 64-tap implementation receiving a 32-bit word length. Delays as low as 0.68ns for a 4-tap implementation receiving an 8-bit input and as high as 4.53ns for a 64tap implementation receiving a 32bit word length have been achieved by using the suggested distributed arithmetic-based FIR Filter with retiming approach. Delay has been reduced by 73.2% for 4tap with 8bit input and by 91.9% for 64tap with 32bit word length compared to the pipelining approach.

Optimization of Vocal Singing Training Methods Based on Multimedia Data Analysis

This paper constructs a vocal singing training optimization model based on multimedia data analysis and conducts in-depth research and analysis on the optimization of vocal singing training methods using multimedia data analysis system. For the problems of poor real-time and large analysis error of the traditional system, a massive real-time multimedia data analysis system based on DSP is designed, with high-speed DSP as the core architecture, multipoint modeling of the experimenter, and data extraction and fusion processing are completed with model association characteristics as the analysis basis. The experimental results show that the real-time performance and accuracy of the system are improved by 15.14% and 13.42%, respectively. To address the time-space domain consistency problem in traditional time series data forecasting, two high-order time series forecasting algorithms based on tensor decomposition are proposed in this paper: the multilinear orthogonal autoregressive model and the multilinear constrained autoregressive model. Using the local structure information of the data to reduce the dimensionality of the data is more beneficial to extract the true low-dimensional representation of the data. Most current supervised cross-modal retrieval methods use a strict binary label matrix (i.e., 0 and 1); however, the interval between labels 0 and 1 is small, which may increase the risk of classification errors. To solve some of the above existing problems, a two-stage hashing method based on smooth matrix decomposition and label relaxation is proposed, which proposes a novel label relaxation strategy that can adaptively control the interval between label intervals and can reduce the quantization loss by about 5.21%. The multimedia data analysis vocal singing training optimization model designed in this paper can improve enhance students’ motivation and accuracy and provide technical support and a rational basis for vocal singing practice and overall musical expression.

Indoor Art Display System under Computer Virtual Reality Visual Video Communication Transmission Signal

This paper proposes a network video transmission system for indoor art display systems and visual video monitoring. Due to the problems of high mean square error, poor signal capture performance, and long timing jitter in current optical transmission signals, this paper proposes a low-rate narrowband IoT long-distance communication synchronization capture algorithm and optimizes the algorithm. The algorithm improves the visual center processing algorithm with high computational complexity into a simple look-up table calculation. This can simplify the calculation process and improve the system’s operating speed. Finally, the paper implements a video communication indoor art display system with compatible multiple network interfaces based on high-speed multimedia DSP.

Deduction of Artificial Intelligence Calculation Theory in Electrical Engineering Automation

In order to overcome the shortcomings of manual on-site confirmation of switch position status in smart substations, realize automatic identification of circuit breaker and isolating switch positions, and improve the remote monitoring capability of switchgear in substations, the paper designs and studies a set of remote substations based on bilateral filtering dissipation algorithm Switch equipment state image recognition system. The system takes SIFT, image gravy method, binary method, Hough transform and other theoretical algorithms as the core, and uses high-speed DSP chip as the platform to divide and combine the switch images collected by the CCD camera. Status identification, and then upload the monitoring picture to the remote monitoring room via Ethernet. Invested in experimental research and found that the identification system is accurate and fast to distinguish the switch status, which can greatly improve the safety and efficiency of switchgear monitoring, and has a high promotion value.

Research on Real-time Image Processing Platform Based on Multi-core DSP

With the wide application of computer technology and the rapid development of image acquisition equipment, high-resolution images bring a great deal of data processing, in addition, various and complex algorithms bring a great deal of computation. In order to achieve fast and intelligent image processing, computer image processing platform is required to have high processing performance and low power consumption. High-speed and high-performance DSP is the key to achieve fast processing. In order to improve the performance of computer image processing platform, this paper introduces the characteristics and requirements of real-time image processing platform, and the application design of multi-core DSP technology in real-time image processing platform.

Water Motion Safety Recognition and Monitoring System Based on the Wireless Signal Transmission

Motion process monitoring is the core component of motion state analysis system and motion safety assurance system. For the water sport, implementation of monitoring is directly related to the safety and security of sportsmen, which is more significant. This paper presents a kind of underwater sports safety monitoring system based on radar idea. The system consists of four parts: video acquisition, image processing, data sample comparison and signal transmission. Reasonable cameras are used to capture the whole swimming pool, and then the motion information parameters of the swimmers are obtained by image segmentation and tracking, and compared with the standard drowning behavior parameters, so as to determine whether the swimmers are drowning or not. If it is judged that a person may be drowning, the system will send out a corresponding rescue signal, which will quickly alert and notify rescuers through the wireless signal transmission system, so as to rescue those who may be drowning, so as to enhance the safety of people’s movement in the water. The drowning behavior is identified by the established drowning feature data sample set, which avoids the occurrence of invisible drowning events that are difficult to detect. By using the high-speed DSP, the data processing and alarm system’s timely response can be realized, which greatly shortens the rescue time, directly improves the survival probability of drowning and reduces the physiological damage. The design of the monitoring system will eventually help the lifeguards to complete the task of underwater movement safety.

Особенности проектирования многоразрядных КМОП-КНИ-АЦП для создания многоканальных высокоскоростных систем ЦОС с повышенной сбоеустойчивостью

The features and possibilities of using foreign and domestic foundry technologies in the creation of CMOS-ADC for high-speed multichannel DSP systems with increased fault resistance to the effects of TKCH are considered. The architecture and technique of ADC balancing, which provide an increase in the conversion rate when several ADCS operate in the alternating mode, are presented. The technique of double reservation of sources of «weight» currents is considered. The necessity of using an additional current source and dual series-connected CMOS transistors instead of single transistors of the same conductivity type is substantiated. It is noted that the proposed solutions provide effective amortization of the impact of TKCH with the most "dangerous" energies of 20-100 MeV/nucleon

DA Based Systematic Approach Using Speculative Addition for High Speed DSP Applications

In recent years Parallel-prefix topologies has been emerged to offer a high-speed solution for many DSP applications. Here in this paper carrier approximation is introduced to incorporate speculation in Han Carlson prefix method. And overall latency is considerably reduced using single Brent-Kung addition as a pre and post processing unit. In order to improve the reliability error detection network is combined with the approximated adder and it is assert the error correction unit whenever speculation fails during carries propagation from LSB segment to MSB unit. The proposed speculative adder based on Han-Carlson parallel-prefix topology attains better latency reduction than variable latency Kogge-Stone topology. Finally, multiplier-accumulation unit (MAC) is designed using serial shift-based accumulation where the proposed speculative adder is used for partial product addition iteratively. The performance merits and latency reduction of proposed adder unit is proved through FPGA hardware synthesis. Obtained results show that proposed MAC unit outperforms both previously proposed speculative architectures and all other high-speed multiplication methods.

DSP-free 'coherent-lite' transceiver for next generation single wavelength optical intra-datacenter interconnects.

We propose a DSP-free coherent-lite system that requires neither high-speed DSP nor high-resolution signal converters for deployment inside datacenters over single mode fiber links with reaches of 10 km and less. The removal of converters and DSP, in which some subsystems are fundamental for successful coherent detection, is enabled by either replacing DSP subsystems with optics having equivalent functions or by re-engineering the system. We validate in a proof-of-concept experiment the proposed DSP-free system using 50 Gbaud DP-16QAM delivering 400 Gb/s over 10 km of single mode fiber (SMF) below the KP4 forward error correction (FEC) threshold of 2.2 × 10-4. In addition, we perform a detailed experimental parametric study of the coherent-lite system in which various system parameters are swept such as baud rate, reach, laser power and laser linewidth. Our results verify that the coherent-lite system can be realized using low-cost DFB lasers with linewidths of a few hundred kHz. Moreover, we compare the performance of the coherent-lite system with that of a conventional coherent transceiver leveraging the full DSP stack. Then, we evaluate the power consumption savings achieved by the coherent-lite scheme relative to a classic DSP-based coherent system. Assuming a CMOS node ranging from 28 to 7 nm for DSP implementation, our estimate shows that the coherent-lite scheme can save 95 to 78% of the power consumed by the following subsystems: analog-to-digital converters, chromatic dispersion compensation, 2 × 2 MIMO polarization demultiplexing and carrier recovery. Finally, we compare the power consumption of the coherent-lite scheme with more standard 400G IM-DD systems utilizing either eight or four parallel WDM lanes (8 × 50G and 4 × 100G). The coherent-lite system is found to have similar module power consumption requirements as a corresponding 4 × 100G IM-DD system while bringing the benefits of coherent detection including improved sensitivity and higher spectral efficiency leading to fewer light sources per transceiver module. To the best of our knowledge, this work represents the first experimental demonstration of a DSP-free coherent-lite system for single channel 400G datacenter 10 km interconnects, a potential attractive solution due to its scalability to future 800G and 1.6T intra-datacenter optical interconnects.

Design and Implementation of Power Efficient Modified Russian Peasant Multiplier using Ripple Carry Adder

FIR filters, microprocessor and digital signal processor are the core system of multipliers. MAC is the most important building block in DSP system. The key element of high throughput multiplier and accumulator unit (MAC) is to achieve a high-performance digital signal processing application. In this paper, Modified Russian Peasant Multiplier (MRPM) using Ripple Carry Adder (RCA) has been proposed. According to Russian Rule‟s, Divide and conquer technique is used in the multiplication process. But, in perspective of digital design, only shifters and adders are used in Russian Peasant Multiplier to produce Partial Product Generation (PPG). A ripple carry adder is a logic circuit in which the carry-out of each full adder is the carry in of the next most significant full adder. It is called a ripple carry adder because each carry bit gets rippled into the next stage. Here, ripple carry adder is used for low power application. Reducing the chip size, increasing the speed and reducing the power consumption are main crucial factors in VLSI System design environment. The goal of this research work is to design the VLSI implementation of MAC for high-speed DSP applications. For designing the Multiplication and accumulation unit, different kinds of multipliers and adders are considered in this paper. The total operation is coded with Verilog HDL using ModelSim 6.3C, synthesized by using Xilinx ISE 12.4i design tool.

Design of Low Voltage High Current DC-DC Converter Based on TPS54810

In digital signal processing system and microcomputer system, often need to high speed DSP devices and large-scale ASIC, FPGA to design and development, in these systems, the high requirement of the precision of the power module and power supply current, power supply module design will directly affect the stability of the whole system. In addition, the power supply module is usually low voltage large current of DC/DC converter, the requirement of efficiency is very high, generally over 90%. This paper introduces the FPGA based on TI company's TPS54810 power supply with low voltage large current DC/DC converter module design, this paper introduces in detail the external compensation of synchronous buck DC/DC converter power supply circuit design methods.

Design and Implementation of Motion Control System with Precise Driving Mechanism

In this paper, a motion control system based on 2-axis gimbal system is designed and implemented to drive a high speed and precision. The proposed system consists of the RS-422 interface, 2-axis gimbal platform, SCU (servo control unit) integrated with a high speed DSP chipset, SAU (servo amplifier unit), potentiometer sensor unit, and resolver sensor unit. The SCU using the DSP firmware is designed to get a fast response without an overshoot with step input and a RMS error of low probability with ramp input. The SAU using a voltage control is designed to resolve the zero-crossing distortion for precise motion. To verify the performance and stability of the implemented system, experiments are performed through a measurement of the time and frequency domain response in a laboratory environment by using a PXI (PCI extentions for instrumentation).

Wireless Image Transmission System

A wireless image transmission system is proposed, which in order to offset the disadvantages of wire video monitor laying points hard, and disadvantages of wire video monitor implementing hard in bad circumstance. The core of the system is TI series of C5000 high speed DSP processor and radio frequency wireless communication chip. Through DSP transplantation of JPEG compression algorithm, complete image collection and image compression through DSP, use wireless receiving and sending module to complete wireless images data transmission. Use wireless receiving and sending module instead of emitter and network as image data transmission device, low cost, not required network fee, system can real-time complete terminal images collection and show. It can apply community guard and video monitor of deploying points urgently in the electric power system, factory, bank and other important department, which dont require higher performance.

정밀구동메커니즘 적용 모션제어시스템 설계 및 구현

In this paper, a motion control system based on 2-axis gimbal system is designed and implemented to drive a high speed and precision. The proposed system consists of the RS-422 interface, 2-axis gimbal platform, servo control unit integrated with a high speed DSP chip-set, servo amplifier unit, potentiometer sensor unit, and resolver sensor unit. The servo control unit using the high speed DSP firmware is designed to get a fast response without an overshoot with step input and a RMS error of low probability with ramp input. The servo amplifier unit using a voltage control is designed to resolve the zero-crossing distortion for precise motion. To verify the performance and stability of the implemented system, experiments are performed through a measurement of the time and frequency domain response in a laboratory environment by using a PXI(PCI eXtentions for Instrumentation).

红外预警实时图像处理系统设计与实现

A platform of real-time image processing is applied to scanning infrared-warning system.The platform is consisted of FPGA in Virtex-5 series of Xilinx and the high-speed DSP TMS320C6455 of TI based multi-core architecture.In order to improve the real-time of the system,a multi-channel scanning mechanism is introduced to the FPGA inner to replace the waiting mechanism adopted in traditional scanning infrared-warning real-time image processing system.The SRIO protocol is applied among the processors to attain high-speed communication,and the processed data is transferred to the master computer by PCI-e mode.Experimental results show that hardware platform design of this system meets the real-time needs and is more developed than the traditional one on delay time,false-warning and miss-warning.

Development of Exclusive Controller and HILS for Active Magnetic Bearing System

The active magnetic bearing system has been studied for long period. Comparing with long research history, the AMB application into industrial field is shown slowly for various causes. One of primary factor is to make up exclusive controller which can generate fast linear current output. Thus, this paper developed the exclusive AMB controller mounted high speed DSP which can operate so fast control calculation that improve system response ability. Especially, to consider the fusion of AMB system and control software, the development is conducted in HILS system with dSPACE from the beginning. Although HILS system is adopted, the developed ABM controller simplified the whole system and could make up optimized control algorithm promptly by measuring and applying the system gain and characteristics of them monitored by the HILS system in real time.

An Arc Image Processing System Design and Testing

In this paper, research on a high speed arc image sampling and processing system based on DSP has been done. A RS-422A interface has been used to sample high speed image, A TMS320C40 high speed DSP and high frame rate CCD are used as the sensor. The optical image can be converted into digital image in this image sampling and processing system efficiently, with the high speed DSP and the high speed memories, to improve the data transfer speed and receive the image data correctly, DMA data communication technology is adopted. The test result shows that this system is very effective for arc research.

Low-Power Finite Impulse Response (FIR) Filter Design Using Two-Dimensional Logarithmic Number System (2DLNS) Representations

In most real-time DSP applications, high performance is a prime target. Here, performance may be interpreted as a combination of higher speed, lower power consumption, sufficient precision, and VLSI area efficiency. It has been experienced that efficient digital multiplication is a prerequisite for high-speed DSP applications. The MDLNS, which has similar properties to the classical LNS, is an alternative approach to conventional number systems for performing multiplication, through using parallel small adders. In addition, by applying recursive multiplication scheme, larger word length multiplication can be performed by use of several small multipliers. The concept of recursive multiplication can be applied to 2DLNS structures, resulting in more efficient digital multipliers. In this work, the recursive 2DLNS-based multipliers have been applied to FIR filter design. These applications demonstrate the superiority of our architectures in terms of VLSI area and power consumption.