High-resistance Resistors Research Articles

CYCLOGRAMS OF THE ST-25 HALL THRUSTER STARTING

The results of the start sequence diagram selection and experimental tests of the ST-25 Hall thruster intended for using on small spacecraft are presented. In order to reduce the mass and dimensions of the power processing unit of the propulsion system, it is proposed to exclude the hollow cathode keeper power supply from the structure of the power processing unit. The exclusion of the keeper power supply from the power processing unit made it necessary to select the thruster start sequence diagram. Four start sequence diagrams of the ST-25 Hall thruster start-up are considered: a) using a separate high voltage power supply for the hollow cathode keeper; b) using a separate low voltage power supply for the hollow cathode keeper; c) using a discharge power supply connected to the keeper through a high-resistance resistor to the hollow cathode keeper; d) connecting the keeper of the hollow cathode to the discharge power supply through an electronic switch with the possibility of adjusting the duration of the keeper connection to the discharge power supply. The graphs of changes in the thruster’s currents and voltages for various power supply circuits of the hollow cathode keeper are presented. The results of the choice of the start sequence diagram for the Hall engine ST-25 and the experimental studies carried out have shown that the use of an electronic switch with a steep pulse front makes it possible to obtain a reliable thruster start-up when a separate power supply for the keeper is excluded from the power processing unit of the propulsion system. As a result of the work carried out, it became possible to place the power processing unit for a propulsion system based on the ST-25 thruster in a volume of 2U. The possibility of using ST-25 thruster on spacecraft, the onboard electrical power of which is limited up to 200 W were confirmed.

Fully Differential ROIC for SNR Enhancement by using a MEMS Microphone Pair with a Differential AC Bias and a High-voltage DC Bias

A fully differential readout integrated circuit (ROIC) is proposed to enhance SNR by using a micro electro mechanical system (MEMS) microphone pair. A differential clock is AC-coupled to the MEMS microphone pair as AC bias for chopper operation, while maintaining a high-voltage DC bias through high-resistance resistors for high sensitivity. The MEMS microphone pair connected to the fully differential ROIC amplifier with a demodulation chopper increased the measured SNRAW by 3.5~4.3dB compared to a single MEMS microphone with a chopper. The chopper operation applied to the pair of MEMS microphones reduced the measured audio band noise at the ROIC output by 14.8~16.5 times, compared to the no-chopper case. The fully differential ROIC consists of an amplifier, a demodulation chopper, a pair of resistor-capacitor low pass filters (RC-LPFs) and a unity-gain buffer. The ROIC implemented in a 0.35μm CMOS process takes a chip area of 2.5mm² and consumes 134μA at a supply voltage of 3.3V.

Исследование влияния шумов на работу зарядочувствительного усилителя с компенсацией пироэлектрической помехи

The authors consider the problems that arise during the operation of the charge sensitive amplifier (CSA) in critical conditions. Simplified schemes and mathematical models of the CSA are presented in order to study the effect of noise of operational amplifier and high-resistance resistor of negative feedback loop. The dependence of the CSA noise level on the pyroelectric interference compensation value is studied. Mathematical analysis data is confirmed by computer circuit simulation.

High Temperature Reliability Investigations up to 350 °C of Gate Oxide Capacitors realized in a Silicon-on-Insulator CMOS-Technology

Standard Bulk-CMOS-technology targets use-temperatures of not more than 175 °C. With Silicon-on-Insulator-technologies (SOI), digital and analog circuitry is possible up to 250 °C and even more, but performance and reliability are strongly affected at these high temperatures. One of the main critical factors is the gate oxide quality and its reliability. In this paper, we present a study of gate oxide capacitor time-dependent dielectric breakdown (TDDB) measurements at temperatures up to 350 °C. The experiments were carried out on gate oxide capacitor structures which were realized in the Fraunhofer 1.0 μm SOI-CMOS process. This technology is based on 200 mm wafers and features, among others, three layers of tungsten metallization with excellent reliability concerning electromigration, voltage independent capacitors, high resistance resistors, and single-poly-EEPROM cells. The gate oxide thickness is 40 nm. Using the data of the TDDB-measurements, the behavior of field and temperature acceleration parameters at temperatures up to 350 °C was evaluated. For a more detailed investigation, the current evolution in time was also studied. An analysis of the oxide breakdown conditions, in particular the field and temperature dependence of the charge to breakdown and the current just before breakdown, completes the study. The presented data provide important information about accelerated oxide reliability testing beyond 250 °C, and make it possible to quickly evaluate the reliability of high temperature CMOS-technologies at use-temperature.

High Temperature Reliability Investigations of EEPROM Memory Cells Realised in Silicon-on-Insulator (SOI) Technology

Microelectronic manufacturing progresses not only towards further miniaturisation, but also application fields tend to become more and more diverse. Recently there has been an increasing demand for electronic devices and circuits that function in harsh environments such as high temperatures. Under these conditions, reliability aspects are highly critical and testing remains a great challenge. A versatile CMOS process based on 200 mm thin film Silicon-on-Insulator (SOI) wafers is in production at Fraunhofer IMS. It features three layers of tungsten metallisation for optimum electromigration reliability, voltage independent capacitors, high resistance resistors and single-poly-EEPROM cells. Non-volatile memories such as EEPROMs are a key technology that enables flexible data storage, for example of calibration and measurement information. The reliability of these devices is especially crucial in high temperature applications since charge loss is drastically increased in this case. The behaviour of single-poly-EEPROM cells, produced in the process described before, was evaluated up to 450 °C. Data retention tests at temperatures ranging from 160 °C to 450 °C and write/erase cycling tests up to 400 °C were performed. The dependence of write/erase cycling on both temperature and tunnel oxide thickness was studied. These data provide an important foundation to extend the application of high temperature electronics to its maximum limits. The results show that EEPROM cells can be used for special applications even at temperatures higher than 250 °C.

High-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair

We propose a CMOS circuit that can be used as an equivalent to resistors. This circuit uses a simple differential pair with diode-connected MOSFETs and operates as a high-resistance resistor when driven in the subthreshold region of MOSFETs. Its resistance can be controlled in a range of 1―1000 MΩ by adjusting a tail current for the differential pair. The results of device fabrication with a 0.35-μm 2P-4M CMOS process technology is described. The resistance was 13 MΩ for a tail current of 10 nA and 135 MΩ for 1 nA. The chip area was 105 μm x 110 μm. Our resistor circuit is useful to construct many high-resistance resistors in a small chip area.

Reliability testing of nano-particle system packaging

Metal nanoparticle applications in nanoelectronics are based on single nanodots or 1-D nanodot chains (both for single electron transistors), or 2-D discontinuous metal thin film (DMTF) arrays (e.g. for sensors), or 3-D polymer or ceramic “cermets,” (for high resistivity resistors and high-k dielectrics). DMTF fabrication relies upon weak substrate adhesion for discrete island formation, which promotes long-term instability and reliability problems. Past work on DMTF nanodot stability is applicable to future nanoelectronics and nanopackaging.

Raising the sensitivity of a discrete electrical signal transformation

commonly used. The electrical circuit of such a mixer is shown by the solid lines in the figure. The mixer contains two mixing diodes VI and V2, at whose point of connection a matching resistor Rin, storage caFecitors C1 and C2, leakage resistors R1 and R2, and an input capacitor Cin of the buffer stage in the operational amplifier OA operating in the voltage follower mode, the voltage U s of the signal under investigation are connected, where U e is the voltage of the expanded signal. Strobing pulses of opposite polarity go through the capacitors Cl and C2 in the circuit. Such a mixer has two fundamental operating modes: the self-mixing mode, for which the induced biases for the diodes Vl and V2 are additionally delivered through the high-resistance resistors at the connection point of VI,RI and V2,R2 (here the resistances of the resistors R1 and R2 are tens of kiloohms; the peak detector mode, for which the rating of the resistors R1 and R2 are tens of megaohms. The advantages and disadvantages of each mode of connection are examined in [1-3]. Analysis of the mentioned modes of operation from the viewpoint of reaching the ultimate sensitivity is of interest. The mixer is characterized by a transfer coefficient that equals the ratio between the increment in the amplitude of the expanded signal AU D and the increment in the amplitude of the signal under investigation AUc and defines the ultimate sensitivity of the stroboscopic transformation. For the self-mixing mode, the mixer transfer coefficient is K = AU_/&U c = K,K2, where K, is the mixer intrinsic transfer coefficient and K~ is an attenuation~factor due to the influence of the buffer stage input capacitance Cin.

IC-compatible high-resistance high-voltage resistors

Previously a new high-voltage process for transistors was reported. This paper reports design, experiments, and results for high-voltage high-resistance resistors, to be utilized in compatible high-voltage integrated circuits.

High Resistance Resistors

High Resistance Resistors