High-precision Timing Measurements Research Articles

Current status and applications of time-to-digital converters

Time-to-Digital Converter (TDC) is widely used to realize time interval measurement. The high-precision time measurement technique has important applications in the fields of laser ranging, particle identification, and radioactive nuclear medicine engineering. Based on the existing literature research and data, this paper studies the application areas of TDC in the present development and analyzes the future prospects of TDC applications. The research results showed that: TDC, based on signal screening, realizes time interval measurement as the ultimate purpose of building the system and, at the same time, completes the function of multi-pulse time interval measurement, which can meet the needs of more diversified measurements in the experiments. In the circuit structure, it can identify the feedback output in the all-digital phase-locked loop (ADPLL) and the reference clock phase and frequency information between the feedback output and the reference clock in an ADPLL. It is also promising for use in other areas of high-precision time measurement and processing of circuit signals.

50.3 ps time resolution and an 11-channel time measuring chip for Topmetal detectors

The Topmetal detector, utilized in this investigation, is a direct-type CMOS pixel sensor known for its distinctive feature of employing exposed metal at the top of each pixel to directly capture external charged particles. This method generates electrical signals through the induction of charge. At present, it is mainly used in gas pixel detector(GPD) and particle beam monitoring. In this paper, we present a new front-end design aimed at enhancing the capabilities of the Topmetal pixel detector. The focus is on incorporating a Time-Digital Conversion (TDC) ASIC into the front-end, with the objective of achieving high-precision time measurement in addition to superior position resolution. The function of the TDC is achieved by the two reverse delay chains, 11 edge acquisition circuits Time-to-Amplitude Converter (TAC), analog gate, weight count module, and Wilkinson Analog-to-Digital Converter (ADC). Coarse time measurement is implemented based on a counter with a working frequency of 500 MHz, and fine time measurement is implemented by the combination of TAC and ADC. The design prototype was taped out with the GSMCR130 nm technology. Test results show that this circuit can handle up to 11 consecutive cases, with the minimum time interval of adjacent cases being 500 ps and the bin size up to 2 ps. The time measurement precision is better than 50.3 ps RMS and the PVT(Process Voltage Temperature) robustness of the input delay chain circuit is validated, showing the stable performance of the design.

A simulation methodology for establishing IR-drop-induced clock jitter for high precision timing ASICs

The combination of 3D tracking and high-precision timing measurements has been identified by the European Committee for Future Accelerators as a fundamental requirement to increase detection capabilities for future applications. Among others, on-chip high-quality clock is a key factor determining the overall resolution of timing ASICs. However, in large and dense chips, power-grid drops can severely affect the non-deterministic jitter of the clock, representing a limit to the performances. This contribution presents a simulation framework based on commercial tools to derive power supply-induced jitter, providing a pre-silicon methodology to assess its impact to timing indeterminism. The flow is presented together with practical examples and results.

High-precision time measurement electronics using the bandpass sampling method.

Waveform digitization at sampling rates up to several giga-samples per second is one of the approaches to achieve high-precision time measurements. In recent years, achieving high precision at lower sampling rates has emerged as a significant research topic. In this article, we focus on time measurement electronics, in which the bandpass sampling method is applied to obtain high precision at a sampling rate of roughly 100 MSps. An analog front-end circuit is designed, in which the input pulse signal is bandpass-filtered and amplified before sampling. A pipelined real-time time extraction algorithm is designed using the techniques of interpolation and cross correlation. A 1024-point fast Fourier transform algorithm is adopted to implement the cross correlation operation. Four time measurement channels are implemented in a mid-range field-programmable gate array, and the measurement rate of 116kHz is achieved. Tests are conducted to evaluate the performance of the timing system. The typical RMS precision is better than 0.4ps.

Research on an Active Hydrogen Maser Digital Circuit Control System Based on FPGA.

A hydrogen maser is a high-precision time measurement instrument with high frequency stability and low frequency drift, which is widely used in satellite navigation, ground time keeping, frequency measurement, and other fields. An active hydrogen maser (AHM) is better than the current space passive hydrogen maser (PHM) in orbit in terms of its frequency stability and drift rate, but it has the disadvantages of large volume and weight. To further reduce the volume and weight of the circuit, this paper demonstrates a digital circuit control system based on a field-programmable gate array (FPGA). It uses digital temperature control, digital detectors, digital down-conversion, digital phase-locked loops, and other digital methods for temperature control, cavity auto-tuning, and crystal phase locking, which improve the integration and flexibility of the circuit system. Meanwhile, a tuning method based on hydrogen flow is proposed, which effectively solves the problem of fluctuations in hydrogen maser resonance frequency with changes in the external environment. Our experimental results show that the designed digital circuit control system meets the requirements of an oven-controlled crystal oscillator (OCXO) loop and a cavity loop. Its frequency stability can reach 2.6×10-13/1 s and 1.4×10-15/10,000 s, which is close to the stability index of ground active hydrogen maser. This scheme has certain practical engineering value, and can be used in the design of hydrogen masers for next-generation space navigation satellites, deep space exploration, and space stations.

Tera-sample-per-second arbitrary waveform generation in a synthetic dimension

Synthetic dimension opens new horizons in quantum physics and topological photonics by enabling new dimensions for field and particle manipulations. The most appealing property of the photonic synthetic dimension is its ability to emulate high-dimensional optical behavior in a unitary physical system. Here we show that the photonic synthetic dimension can transform technical problems in photonic systems between dimensionalities, providing unexpected solutions to technical problems that are otherwise challenging. Specifically, we propose and experimentally demonstrate a fully reconfigurable photonic Galton board (PGB) in the temporal synthetic dimension, in which the temporal high-speed challenge is translated into a spatial fiber-optic length matching problem, leading to the generation of tera-sample-per-second arbitrary waveforms with ultimate flexibility. In the experiments, an arbitrary waveform with a widely tunable sampling rate, ranging from 10.42 GSa/s to a record high of 1.64 TSa/s, is demonstrated. The concept of dimension conversion offers possible solutions to various physical dimension-related problems, such as super-resolution imaging, high-resolution spectroscopy, and high-precision time measurement.

A Study on the Effect of Temperature Variations on FPGA-Based Multi-Channel Time-to-Digital Converters.

We describe a study on the effect of temperature variations on multi-channel time-to-digital converters (TDCs). The objective is to study the impact of ambient thermal variations on the performance of field-programmable gate array (FPGA)-based tapped delay line (TDL) TDC systems while simultaneously meeting the requirements of high-precision time measurement, low-cost implementation, small size, and low power consumption. For our study, we chose two devices, Artix-7 and ProASIC3L, manufactured by Xilinx and Microsemi, respectively. The radiation-tolerant ProASIC3L device offers better stability in terms of thermal sensitivity and power consumption compared to the Artix-7. To assess the performance of the TDCs under varying thermal conditions, a laboratory thermal chamber was utilized to maintain ambient temperatures ranging from -75 to 80 °C. This analysis ensured a comprehensive evaluation of the TDCs' performance across a wide operational range. By utilizing the Artix-7 and ProASIC3L devices, we achieved root mean square (RMS) resolution of 24.7 and 554.59 picoseconds, respectively. Total on-chip power of 0.968 W was achieved using Artix-7, while 1.997 mW of power consumption was achieved using the ProASIC3L device. We worked to determine the temperature sensitivity for both FPGA devices, which could help in the design and optimization of FPGA-based TDCs for many applications.

Study on time measurement for CSA-based readout electronics in STCF ECAL

Super Tau-Charm Facility (STCF) will provide unique support for particle physics research in China owing to its high luminosity and large dynamic range. Its electromagnetic calorimeter (ECAL) is designed as a new type of calorimeter which can perform high-precision energy and time measurement at the same time. Considering the high event rate and pile up induced by high luminosity, and the large channel number scale of ECAL, the readout electronics needs to adopt a high-precision, unconventional, and real-time processing method to reduce the data amount in transmission. Based on the charge-sensitive front-end electronics in energy measurement, an online time measurement method based on waveform fitting algorithm has been studied and implemented in this work. The parameters which would affect the time resolution are analyzed according to simulation and experimental test. After the optimization of electronics, a time resolution of 165 ps at the equivalent deposition energy of 1 GeV is achieved, which indicates that the waveform fitting method based on charge-sensitive readout electronics can meet the future requirements.

Design and Testing of the Front-End Electronics of WCDA in LHAASO

Water Cherenkov detector array (WCDA) is one of the key parts of the Large High Altitude Air Shower Observatory (LHAASO), the construction of which was completed by the end of 2020. The WCDA covers a 78 000-m <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area and there exist 3120 large size photomultiplier tubes (PMTs) in three ponds: 8-in PMTs are used in WCDA pond No. 1 and 20-in PMTs are used in ponds No. 2 and No. 3. The front-end electronics (FEE) system based on multigain measurement technique is designed to achieve both high-precision time and charge measurements over a large dynamic range from single photon electron (S.P.E.) to 4000 P.E. (for water pond No. 1)/1800 P.E. (for water ponds No. 2 and No. 3). To achieve a high-quality clock distribution and phase alignment as well as mixed transmission of data, clock, and commands in one fiber over a long distance, an enhanced white rabbit (WR) technique is used. Testing of all the 350 FEE modules for the WCDA is presented in this article. Test results indicate that the charge resolution is better than 20% at S.P.E. and 1% at 1800/4000 P.E. and the time resolution is better than 300 ps root mean square (rms), which successfully meets the application requirement. All the FEE modules have been fabricated and installed for the LHAASO WCDA from 2018 to 2020, and the initial commissioning operation indicates that the FEEs function well.

Readout Electronics Prototype of TOF Detectors in CEE of HIRFL

In the Cooling storage ring External-target Experiment (CEE) in heavy ion research facility in Lanzhou (HIRFL), multigap resistive plate chambers (MRPCs) detectors are used for high-precision time-of-flight (TOF) measurement to identify the scattered particles after the ion beam hits the target. Regarding the external TOF (eTOF) and 2/3 internal TOF (iTOF) detectors, a ~25-ps rms time precision is required for the readout electronics, whereas for the other 1/3 iTOF detectors, a ~10-ps rms precision is required. A readout electronics prototype was designed, including the front-end electronics (FEE) based on analog signal amplification, discrimination, and the time-to-digital module (TDM), based on field-programmable gate array (FPGA) time-to-digital converter (TDC), to achieve high-precision time measurement. PreAmplifier-DIscriminator (PADI) is used in the design of the FEE, while an FPGA TDC, based on tapped delay line (TDL) structure, with a time precision performance better than 5-ps rms, is implemented in the TDM, as well as the trigger matching circuit and other control logic. The performance of the whole system was tested under different input signal charges and the results indicated that the time precision is better than 10-ps rms, which satisfies the application requirements.

Research on High precision Yime Measurement and Analysis method Based on Oscilloscope

High precision time measurement technology is of great significance.It is necessary to test and analyze high precision time,whether it is engineering practice such as telecommunication,chip design,or theoretical research such as atomic physics experiment,as well as space technology such as satellite positioning,radar pulse,etc.With the help of oscilloscope,the time and delay information can be obtained with high accuracy on the premise of high accuracy on the premise of high fidelity acquisition of measured signal.In this paper,aiming at how to use oscilloscope for high-precision time test and analysis,several key factors affecting the accuracy of oscilloscope time test are analyzed,and reference methods and test examples are provided for high-precision time test.

A Measurement of the Galactic Plane Mass Density from Binary Pulsar Accelerations

Abstract We use compiled high-precision pulsar timing measurements to directly measure the Galactic acceleration of binary pulsars relative to the solar system barycenter. Given the vertical accelerations, we use the Poisson equation to derive the Oort limit, i.e., the total volume mass density in the Galactic mid-plane. Our best-fitting model gives an Oort limit of 0.08 − 0.02 0.05 M ⊙ pc − 3 , which is close to estimates from recent Jeans analyses. Given the accounting of the baryon budget from McKee et al., we obtain a local dark matter density of − 0.004 − 0.02 0.05 M ⊙ pc − 3 , which is slightly below other modern estimates but consistent within the current uncertainties of our method. The error bars are currently about five times larger than kinematical estimates, but should improve in the future for this novel dynamical method. We also constrain the oblateness of the potential, finding it consistent with that expected from the disk and inconsistent with a potential dominated by a spherical halo, as is appropriate for our sample that is within a ∼kpc of the Sun. We find that current measurements of binary pulsar accelerations lead to large uncertainties in the slope of the rotation curve. We give a fitting function for the vertical acceleration a z : a z = − α 1 z; log 10 ( α 1 / Gyr − 2 ) = 3.69 − 0.12 0.19 . By analyzing interacting simulations of the Milky Way, we find that large asymmetric variations in da z /dz as a function of vertical height may be a signature of sub-structure. We end by discussing the power of combining constraints from pulsar timing and high-precision radial velocity measurements toward lines-of-sight near pulsars, to test theories of gravity and constrain dark matter sub-structure.

Design of a Digital Readout Module for SCA ASIC Testing

Switched Capacitor Array (SCA) features high-speed sampling and low power consumption. High-speed waveform digitization based on SCA is an important research direction for high-precision time measurement. We are designing the SCA ASIC chips, of which several prototypes have been designed and the improvements are ongoing. In order to test and evaluate the future SCA ASIC chips, it is necessary to design a digital readout module with good compatibility. This paper presents the design of the readout module and the data readout software. The digital readout module integrates the functionality of the control, configuration and data readout of the ASIC under test within one FPGA device. A DDR3 chip is used for data caching, and a USB3.0 interface is designed for data transmission. The readout software is designed based on Python3.7 and contains the functions such as data acquisition and waveform drawing. This module was successfully used in the initial testing of the second version of the SCA prototype ASIC, and the test results indicate that the readout module works as expected.

Quality Evaluation Electronics for CBM-TOF Super Module

The time-of-flight (TOF) system in the compressed Baryonic matter (CBM) experiment is comprised of super modules and used for charged hadron identification. Each super module contains several multigap resistive plate chambers (MRPCs) for high-precision time measurements. The quality of each super module should be evaluated to ensure that the detectors achieve the targeted performance. In this paper, the quality evaluation electronics for super modules based on the peripheral component interconnect eXtensions for instrumentation platform is proposed. The discriminated MRPC signals are digitized by the time-to-digital converter (TDC). Then, the digitized time data from a super module are aggregated at the TDC readout motherboard and are transmitted to the data readout modules (DRMs) via optical links. Finally, the DRMs relay the digitized data to the data acquisition system through the Gigabit Ethernet ports in parallel. The laboratory test results indicate that the quality evaluation electronics achieve a time resolution better than 20 ps. The initial cosmic ray tests with the MRPC detectors have also been conducted to confirm the performance of the quality evaluation system. Based on the results, the evaluation system can subsequently be used for quality evaluation of the CBM-TOF super module.

A simulation model of front-end electronics for high-precision timing measurements with low-gain avalanche detectors

In this paper we report simulation results of a study aiming to optimize parameters of a detector that uses low-gain avalanche detectors (LGAD) for high-precision timing measurements. The detector is assumed to be composed of a 50 μ m LGAD sensor coupled to front-end readout electronics which is used to measure the time of arrival of minimum ionizing particles. The simulation includes modeling of signal fluctuations in the LGAD sensor, variations of the analog bandwidth and signal-to-noise ratio (SNR) of the front-end electronics, time bin quantization, and radiation damage of the LGAD sensors. Two approaches to measure the timestamp are considered: leading edge and constant fraction. Simulated LGAD pulses before irradiation, and after irradiation with neutron fluences of 5 × 1 0 14 n/cm 2 and 1 × 1 0 15 n/cm 2 , are studied. The time resolution for a 50 μ m LGADs was found to be 35 ps for front-end electronics bandwidths larger than 350 MHz and SNRs larger than 30. The time resolution at SNR of 30 for fluences of 5 × 1 0 14 n/cm 2 and 1 × 1 0 15 n/cm 2 were found to be 31 ps and 37 ps, respectively.

The CMS ECAL Phase-2 upgrade for high precision energy and timing measurements

The CMS electromagnetic calorimeter (ECAL) is a homogeneous calorimeter made of about 75,000 lead tungstate scintillating crystals. In view of the high-luminosity phase of the LHC, the ECAL electronics must be upgraded to cope with the more stringent requirements in terms of trigger latency and rate. The new electronics will transmit the data in streaming mode from the front-end electronics to the off-detector electronics, where the trigger primitives will be formed in powerful FPGAs. The front-end electronics will feature two new radiation-hard chips: a dual gain trans-impedance amplifier (TIA) and a sampling ADC with loss-less data compression. The TIA choice preserves the fast pulse shape of signals in the lead tungstate coupled to avalanche photodiodes (APD), and it is more resilient to the noise increase due to the radiation-induced APD leakage current. An important characteristic of the new design will be the capability to provide precision timing measurements, of the order of 30ps, for photons and electrons above 50GeV. The excellent time resolution will improve the overall CMS physics performance by mitigating the high pile-up effects. First characterization results of the TIA chip will be shown, and studies of energy and timing resolution performed in beam tests with the prototype electronics will be presented.

Development of readout electronics for bunch arrival-time monitor system at SXFEL

A bunch arrival-time monitor (BAM) system, based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser. The aim of the study is to achieve high-precision time measurement for minimizing bunch fluctuations. A readout electronics is developed to fulfill the requirements of the BAM system. The readout electronics is mainly composed of a signal conditioning circuit, field-programmable gate array (FPGA), mezzanine card (FMC150), and powerful FPGA carrier board. The signal conditioning circuit converts the laser pulses into electrical pulse signals using a photodiode. Thereafter, it performs splitting and low-noise amplification to achieve the best voltage sampling performance of the dual-channel analog-to-digital converter (ADC) in FMC150. The FMC150 ADC daughter card includes a 14-bit 250 Msps dual-channel high-speed ADC, a clock configuration, and a management module. The powerful FPGA carrier board is a commercial high-performance Xilinx Kintex-7 FPGA evaluation board. To achieve clock and data alignment for ADC data capture at a high sampling rate, we used ISERDES, IDELAY, and dedicated carry-in resources in the Kintex-7 FPGA. This paper presents a detailed development of the readout electronics in the BAM system and its performance.

Clock and trigger distribution for CBM-TOF quality evaluation of RPC super module detector assemblies

RPC Super module (SM) detector assemblies are used for charged hadron identification in the Time-of-Flight (TOF) spectrometer at the Compressed Baryonic Matter (CBM) experiment. Each SM contains several multi-gap Resistive Plate Chambers (MRPCs) and provides up to 320 electronic channels in total for high-precision time measurements. Time resolution of the Time-to-Digital Converter (TDC) is required to be better than 20 ps. During mass production, the quality of each SM needs to be evaluated. In order to meet the requirements, the system clock signal as well as the trigger signal should be distributed precisely and synchronously to all electronics modules within the evaluation readout system. In this paper, a hierarchical clock and trigger distribution method is proposed for the quality evaluation of CBM-TOF SM detectors. In a first stage, the master clock and trigger module (CTM) allocated in a 6U PXI chassis distributes the clock and trigger signals to the slave CTM in the same chassis. In a second stage, the slave CTM transmits the clock and trigger signals to the TDC readout module (TRM) through one optical link. In a third stage, the TRM distributes the clock and trigger signals synchronously to 10 individual TDC boards. Laboratory test results show that the clock jitter at the third stage is less than 4 ps (RMS) and the trigger transmission latency from the master CTM to the TDC is about 272 ns with 11 ps (RMS) jitter. The overall performance complies well with the required specifications.

Multichannel FPGA based MVT system for high precision time (20 ps RMS) and charge measurement

In this article it is presented an FPGA based Multi-Voltage Threshold (MVT) system which allows of sampling fast signals (1–2 ns rising and falling edge) in both voltage and time domain. It is possible to achieve a precision of time measurement of 20 ps RMS and reconstruct charge of signals, using a simple approach, with deviation from real value smaller than 10%. Utilization of the differential inputs of an FPGA chip as comparators together with an implementation of a TDC inside an FPGA allowed us to achieve a compact multi-channel system characterized by low power consumption and low production costs. This paper describes realization and functioning of the system comprising 192-channel TDC board and a four mezzanine cards which split incoming signals and discriminate them. The boards have been used to validate a newly developed Time-of-Flight Positron Emission Tomography system based on plastic scintillators. The achieved full system time resolution of σ(TOF) ≈ 68 ps is by factor of two better with respect to the current TOF-PET systems.

Prototype of the Readout Electronics for WCDA in LHAASO

In the Large High Altitude Air Shower Observatory (LHAASO), the Water Cherenkov Detector Array (WCDA) is one of the key parts. The WCDA consists of 3600 Photomultiplier Tubes (PMTs) scattered in a 90000 m2 area, and both high precision time and charge measurements are required over a large dynamic range from 1 to 4000 Photo Electrons (P.E.). To achieve time measurement precision better than 500 ps RMS, high quality clock distribution and automatic phase compensation are needed among the 400 Front End Electronics (FEE) modules. To simplify the readout electronics architecture, clock, data, and commands are transferred simultaneously over 400-meter fibers, while high speed data transfer interface is implemented based on TCP/IP protocol. Design and testing of the readout electronics prototype for WCDA is presented in this paper. Test results indicate that a charge resolution better than 10% RMS @ 1 P.E. and 1% RMS @ 4000 P.E., and a time resolution better than 300 ps RMS are successfully achieved over the whole dynamic range, beyond the application requirement.