High Power Density Converter Research Articles

An Enhanced Six-Turn Multilayer Planar Inductor Interleaved Winding Design for LLC Resonant Converters with Low Current Ringing

Planar magnetic components have been widely used in high-density power converters and are suitable for various topologies. The application of planar inductors in LLC resonant converters can lead to parasitic capacitance, which causes current ringing and results in EMI issues. To mitigate the impact of current ringing, the parasitic capacitance of the planar inductor needs to be reduced. This paper proposes a new six-turn interleaved winding design. Compared to the previous four-turn interleaved winding design, it maintains low parasitic capacitance while positioning both the input and output terminals of the inductor on the outer turn, further enhancing the integration of high-density power converters. The parasitic capacitance was calculated using theoretical methods and verified through finite element simulations. Experimental validation was conducted using an LLC resonant converter test platform. Compared to the previous four-turn interleaved winding design, the new six-turn interleaved winding design satisfies both the input and output terminals, using an outer turn configuration. Additionally, the new design exhibits reduced parasitic capacitance and is suitable for use in LLC resonant converters, where it also minimizes current ringing.

On the Size and Weight of Passive Components: Scaling Trends for High-Density Power Converter Designs

On the Size and Weight of Passive Components: Scaling Trends for High-Density Power Converter Designs

Design and Wafer-Level Fabrication of Stacked-Type Transformers for High-Density Power Converters

Design and Wafer-Level Fabrication of Stacked-Type Transformers for High-Density Power Converters

Enhanced DC-biased energy-storage performance in lead-free relaxor ferroelectric ceramics for high-density power converters

Dielectric energy-storage capacitors are among the main enabling technologies in high-density power converters, in which lead-free relaxor ferroelectric ceramics have been paid particular attention to. However, low energy-storage performance at elevated temperature and high electric field, and the lack of application-oriented evaluation are among the primary blocks stumbling their progress. As a demonstration, 0.87BaTiO3-0.13Bi[Zn2/3(Nb0.85Ta0.15)1/3]O3 (BTBZNT) lead-free relaxor ferroelectric ceramics were modified by linear dielectric CaZrO3 (CZ) with various contents of 0, 0.1, 0.2, and 0.3 (CZ0, CZ1, CZ2, and CZ3). XRD and Raman results reveal major perovskite phases, and densely sintered ceramics were witnessed from the SEM images. Unchanged weakly coupled relaxor behavior was confirmed by the big critical coefficient of 1.6–1.8 from the modified Curie–Weiss law and the large activation energy of 0.29–0.32 eV from the Volgel–Fulcher fittings, and CZ was found to suppress high-temperature loss. From the normal polarization–electric field (P–E) loops, CZ0 is optimal for energy-storage owing to the highest discharged energy density and modest efficiency. Nevertheless, from the application-oriented DC-biased P–E loops, CZ1 is oppositely superior to CZ0 because of the higher permittivity and lower loss leading to higher discharged energy density and efficiency at DC-biased electric field. Moreover, CZ1 outperforms CZ0 in the higher capacitance density and lower temperature rise at higher temperature and electric field. Enhanced DC-biased energy-storage performance in BTBZNT ceramics modified by CZ was achieved, which should enlighten the advance of energy-storage ceramics targeting the application in high-density power converters.

Evaluation of the Thermal Resistance in GaN HEMTs Using Thermo-Sensitive Electrical Parameters

The thermal management of power converters is not only crucial for their own optimal operation and reliability, but also for the overall system in which they are operating. Reliability is a very serious aspect because power electronics systems are being increasingly widely adopted in mission-critical applications in the e-mobility sector, in smart grids, and other applications where safety and operational continuity are essential. The current trend towards miniaturization of power conversion systems and, consequently, towards high power density solutions is speeding up the diffusion of Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT). GaN HEMT-based high power density converters must be properly managed, making the estimation of the thermal characteristics of these devices essential. This paper proposes the use of some Thermo-Sensitive Electrical Parameters (TSEP) for a simple and effective thermal resistance evaluation. The primary advantages and limitations of these TSEPs have been critically analyzed. The analysis highlighted that the use of the gate-source voltage is the best approach. However, it requires direct access to the gate pin, which may not be available externally in some system-in-package solutions.

Thermal Modeling of Planar Magnetics: Fundamentals, Review and Key Points

High-frequency and high-power density converters are essential for many applications such as automotive and more electric aircraft. To improve power density, planar magnetic components are increasingly used in power electronic converters owing to their advantages, such as less high-frequency losses, repeatability, and better thermal performance compared to conventional wound components. Considerable attention has been paid to their electrical performance. However, the thermal aspects are essential for enhancing completely their performance. Currently, there is an increasing interest in these critical aspects of high-density power converters. This paper presents a literature review of studies on the thermal modeling of planar magnetics. The papers were organized according to the model type and analyzed to highlight their merits and limitations. A multicriteria comparison of the studied papers was performed. Moreover, the key points and issues related to the thermal modeling are addressed to guide designers in enhancing the thermal aspects of planar magnetic components.

Design and Simulation Analysis of High Power Density Superboost Circuit

A battery discharge regulator system based on the Superboost converter is presented, and the working principle of the Superboost converter is analyzed. In order to meet the developing requirements of high efficiency and high power density converters, GaN devices are applied to the Superboost circuit to increase the switching frequency of the circuit. Thanks to this, the weight and volume of the passive devices can be reduced, and the power density of the circuit can be increased. In high-frequency conditions, the device parameters of the circuit are designed, and the theoretical derivation of the circuit transfer function is carried out. Finally, simulation software is used to verify the rationality and feasibility of the design.

Laminated Permanent Magnets Enable Compact Magnetic Components in Current-Source Converters

Magnetic components have become one of the primary barriers to high power density converters, especially to current-source converters (CSCs). In CSCs, the inductors/transformers have a predominantly dc flux to store energy, which can be offset by standard permanent magnets (PMs). However, eddy currents in standard PMs induce significant losses and thermal stress for medium-frequency applications. This article proposes using laminated PMs to offset the dc flux while reducing eddy currents, leading to significant reductions in the size, cost, and losses of inductors/transformers. Furthermore, the laminated PMs’ optimal location, orientation, and distribution are investigated to generalize this approach for maximum benefits. Three-dimensional finite-element analysis simulation and hardware experiments are presented to validate the effectiveness of the proposed approach in a medium-frequency transformer (MFT) for CSCs. Compared with standard PMs, the proposed use of laminated PMs reduces aggregate core-plus-PM losses by 85% in experiments, and thus, relaxes the MFT thermal design. Finally, the proposed approach is experimentally validated in a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\text{40}\,\text{kVA}$</tex-math></inline-formula> flyback-type MFT for a soft-switching solid-state transformer. Compared to the traditional design without any PMs, the proposed design increases the saturation current by 46% while inducing only 5% more losses, leading to significant savings in magnetics cost and size.

DC-DC High-Step-Up Quasi-Resonant Converter to Drive Acoustic Transmitters

This paper proposes a quasi-resonant step-up DC-DC converter to provide the DC-link voltage for piezoelectric transmitters (PZETs). The resonance not only provides a soft-switching condition for the converter switches, but also helps to decrease the converter element sizes for marine applications. Operation modes of the proposed converter are discussed. The current and voltage of the converter components are derived analytically, and hence the converter gain is obtained. The performance of the proposed high-step-up, high-power density converter is examined through a comprehensive simulation study. The simulation results demonstrate the soft-switching operation and short transient time required for the converter to reach the reference output voltage. The converter output voltage remains unchanged when an inverter with a passive filter is placed at its output while supplying the PZET. The proposed DC-DC converter is prototyped to validate the converter gain and soft-switching operation experimentally. The converter gain and soft-switching results in simulation are well matched with those of the experimental tests. The converter efficiency in three different switching frequencies is obtained experimentally. The power density of the proposed topology is determined via the designing of a printed circuit board. The experimental results demonstrate the appropriate gain and efficiency of the converter in the tested power range.

A novel high‐frequency floating resonant gate driver with reduced gate driving loss

Conventional resistive gate driving circuits suffer from significant recovery gate driving losses, especially at MHz ranges. The increasing gate driving losses brought by high switching frequency place a limitation to the high power density converter design. This paper proposes a novel floating resonant gate driver which maintains high efficiency at several megahertz operating frequency. The gate loss reduction is achieved by adopting a resonant process with driving power recycling. Part of the gate driving power can be recycled to a gate driving capacitor in the gate driving loop during charging and discharging. The proposed gate driver merges the merits of fast switching speed and low gate driving losses. A prototype of LLC power converter with the proposed floating resonant gate driver operating at 3.5 MHz is implemented. According to the experimental verification, the proposed gate driver realized a driving loss reduction by 70% and theoretical analysis is in good agreement with experimental results.

Prediction of overshoot and crosstalk of low‐voltage GaN HEMT using analytical model

Ultra-fast switching speed and low switching loss of the gallium nitride high electron mobility transistors enable the realisation of high power density converter with excellent conversion efficiency. However, the rapid switching transition leads to significant overshoot and crosstalk issues that can degrade the performance of the devices. To facilitate the evaluation of these effects on low-voltage gallium nitride devices, this paper develops an analytical model to predict overshoot and crosstalk during switching transitions accurately and efficiently. The model is constructed based on the detailed circuit deduction of various stages of the device's switching process. It also considers the voltage-dependent junction capacitances as well as the forward and the reverse transconductances. The simulated results obtained from the model are validated experimentally. With the model, the impacts of parasitic elements, especially the power loop inductance, on voltage/current overshoots and spurious voltage due to crosstalk can be easily evaluated, which provides valuable design guidelines for power conversion applications using low-voltage gallium nitride high electron mobility transistor.

A Highly Integrated PCB Embedded GaN Full-Bridge Module With Ultralow Parasitic Inductance

To fully take the high-frequency advantage of gallium nitride (GaN) devices, this article presents a face-up integrated power module based on the printed circuit board embedding technology to tackle the challenges caused by the conventional discrete solutions. The proposed GaN module highly integrates a GaN-bare-dies-based full bridge, driving circuits, and decoupling capacitors, in which the advanced bismaleimide-triazine material is used as the packaging material and the copper-filled laser microvias are used for low-parasitic-inductance and high-thermal-conductivity interconnection. Careful electro-thermal codesign and optimization of power loop is conducted to make the tradeoff between power loop inductance and thermal performance. The proposed full bridge power module achieves the lowest power loop inductance of about 0.305 nH in power modules with the same power level. The maximum thermal resistances from the embedded GaN bare dies to top and bottom surface are 3.39 and 0.42 °C/W, respectively. Benefitting from the ultralow power loop parasitic inductances, the switching speed of GaN devices reaches to 57.5 V/ns, while the voltage overshoot is not higher than 5.35% of the dc bus voltage. The superior performance of the proposed integrated GaN module makes it a promising application prospect in high frequency high power density converters.

A Quasi-Two-Level Medium-Voltage SiC MOSFET Power Module With Low Loss and Voltage Self-Balance

High-voltage and fast-switching silicon carbide (SiC) power modules are needed to construct high-voltage and high power-density converters. Stacking multiple low-voltage SiC devices to increase the equivalent blocking voltage shows advantages in <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state resistance, current capacity, and cost over one single high-voltage device. An indirect series-connected SiC MOSFET power module using quasi-two-level hybrid-clamp topology is proposed in this article. The voltages across the devices are automatically balanced with an open-loop modulation strategy to avoid sensors and control algorithm. Moreover, only ceramic capacitors are needed besides the MOSFETs and diodes in the topology. Thanks to this, the topology was highly integrated into a power module using SiC dies, which is equivalent to a general-purpose two-level medium-voltage SiC MOSFET power module. The switching losses of the power module show advantages over other stacking methods and even a single high-voltage switch and it can be evaluated with a two-level half-bridge (HB). To achieve this, the automatic voltage-balancing performance is analyzed in detail and the parasitic output capacitance in the topology is investigated, based on which the design considerations are presented. The simulation results from LTspice confirm the voltage-balancing and a 3600V/20A HB power module is built in the lab and the experimental results verify the design.

A High Power Density Converter with a Continuous Input Current Waveform for Satellite Power Applications

Conventional Active Clamp-Forward topology is studied for a satellite converter owing to its comparitively simple structure, minimum number of components and fine clamping capability concerning its switch voltage stress. However, it has a high switch voltage stress,a high di/dt level and has pulsating input current shape. These are disadvantageous with respect to the EMI filter size and high input voltage converter applications.To get the better of these drawbacks, a new ACF topology with a continuous input current waveform is proposed . By this proposed waveform ,the voltage stresses on the main switches are relieved. This is crucial reliability of satelite FET switches, by utilizing a two series connected structure. These conditions will allow the proposed converter to serve as a high input voltage, high power density satellite converter.

Control of transformerless T-type DVR using multiple delayed signal cancellation PLL under unbalanced and distorted grid condition

In the near future, the power system network may experience severe voltage distortions due to association of renewable energy sources (RES), and the large penetration of power electronic based loads into the microgrid. To protect sensitive loads from these distorted and unbalanced grid conditions, the commonly used dynamic voltage restorer (DVR) requires effective control algorithms. The effective control algorithm comprises a controller, and accurate estimation of grid phase angle/frequency, and magnitude, thereby the reference DVR voltage is accurately estimated. The synchronous reference frame based phased locked loop (SRF-PLL) is commonly used for phase angle estimation. However, during unbalanced, distorted, and dc-offset conditions, the performance of SRF-PLL is unsatisfactory. To improve its performance, it is cascaded with prefilters such as dual second order generalized integrator (DSOGI), cascaded delayed signal cancellation (CDSC), and multiple delayed signal cancellation (MDSC). Among these prefilters, MDSC has superior performance under all grid conditions with less delay time and memory requirement. In addition to an effective control algorithm, the DVR system requires high power density converters. The power density of the system is increased using transformerless T-type converter. In this paper, the effectiveness of MDSC-PLL for the transformerless T-type converter based DVR is evaluated in MATLAB/Simulink for various grid conditions such as voltage sag/swell, unbalance voltage sag/swell, harmonics, and dc-offset.

A review on enabling technologies for high power density power electronic applications

Power Electronic Systems for various applications have gone through several stages of development during last five decades. Its development especially in high power density has been significantly accelerated from late 1980’s. In addition to the high-power density of converters, efficiency, cost, operating temperature of converters have also become important key factors in miniaturization of power converters. This paper presents the contributions in the recent years in high power density converter technologies, which show these technologies have envisaged in miniaturization of power sources for various applications. Diversified advanced technologies inclined in achieving high power density of converters are described along with their layouts and structures which are based on the materials used. A glimpse into the future based on the current advanced technological trend is offered.

Switched Capacitor-Based PWM- and Phase Shift-Controlled Multiport Converter With Differential Power Processing Capability for Standalone Photovoltaic Systems Under Partial Shading

Photovoltaic (PV) systems consist of multiple dc–dc converters, such as a front-end converter for a PV panel and a bidirectional converter for battery regulation. In addition, a differential power processing (DPP) converter is desirably installed to preclude partial-shading issues of the significant reduction in energy yield and the occurrence of multiple maximum power points. This article proposes a novel multiport converter (MPC) based on a switched capacitor converter (SCC) with DPP capability to simplify such PV systems by reducing the converter count. The proposed SCC-MPC is derived from the integration of a noninverting PWM buck–boost converter, SCC, and phase shift (PS) SCC with sharing switches. In addition to the reduced converter count, the proposed MPC achieves reduced circuit volume thanks to the SCC and PS-SCC, both of which are a high power-density converter. The proposed SCC-MPC can regulate the load and battery by PS and PWM controls, respectively, while automatically precluding the partial-shading issues by its DPP capability. The experimental verification using a 200-W prototype demonstrated that the load and battery could be independently regulated with preventing the partial-shading issues.

A Postprocessing-Technique-Based Switching Loss Estimation Method for GaN Devices

Gallium nitride (GaN) high electron mobility transistor (HEMT) is a promising candidate for the high-density power converter applications. Due to the low switching loss, the GaN HEMT may lead to a new horizon in the applications, such as fast charger, wireless charging, and 5G power amplifier. However, the fast switching speed of GaN HEMT makes it extremely sensitive to parasitic parameters, especially for the low-voltage GaN devices with small packages. Conventional switching loss estimation methods, which are normally based on the calibration fixture or modification of test circuit, cannot be effectively utilized for GaN HEMT. This article presents an accurate switching loss estimation method using the postprocessing technique. The proposed switching loss technique consists of three parts of signal processing, which are the wavelet denoising process to minimize the influence of background noise, the voltage–current ( $ V-I$ ) alignment process to reduce errors from probe propagation delay, and the linear interpolation process for further improvement of alignment accuracy. In addition, a modified SPICE model is proposed to investigate the influence of parasitic parameters on switching losses by the circuit simulation. Based on the theoretical switching characteristics, the switching loss estimation method is finally validated experimentally on a commercial 40-V/10-A GaN HEMT in a double-pulse test.

Gate-Drive Power Supply With Decayed Negative Voltage to Solve Crosstalk Problem of GaN Synchronous Buck Converter

Gallium-Nitride (GaN) transistor suits for high switching frequency condition to build high power density converters. However, it suffers from crosstalk problem especially in bridge-structure applications, that is, the fast voltage changing of the switching node causes a positive or negative voltage spike on the gate-source voltage of GaN transistor, which results in false turn-on and gate breakdown of the transistor, respectively. Rather than specially designing the gate driver, this letter proposes an idea of using a gate-drive power supply (GDPS) with decayed negative output to solve the crosstalk problem. With the proposed GDPS, a negative driving voltage is provided when the positive voltage spike appears to avoid false turn-on, and then the negative driving voltage naturally decays to zero before the negative voltage spike appears to avoid gate breakdown. Such a GDPS is realized by a simple forward-flyback topology, and the commercial gate-drive ICs can be cooperated with it conveniently. Experimental results show the effectiveness of the proposed method.

Evaluation of the off-State Base-Emitter Voltage Requirement of the SiC BJT With a Regenerative Proportional Base Driver Circuit and Their Application in an Inverter

A strong candidate device for use in high-efficiency and high-density power converters is the SiC bipolar junction transistor, which requires a continuous gate (base) current to maintain its on -state. A base driver circuit with regenerative collector current feedback using a current transformer, and a negative off -state base-emitter voltage is presented in this article. The off -state base-emitter voltage required to prevent simultaneous conduction of a commercially available device when subjected to d v /d t’ s is assessed. The device is then utilized in a three-phase dc-to-ac power converter where the efficacy of using the proposed base driver is evaluated. The off -state base-emitter voltage used is informed by the d v /d t tests. The converter is supplied from a 600-V dc rail, switches at 50 kHz and supplies a 4.1-kW load at a modulation index of 0.9. An efficiency of 97.4% was measured.