High-performance Pentacene Thin-film Transistors Research Articles

Surface Treatments of Poly(4-Vinyl Phenol) Insulator for High-Performance Pentacene Thin-Film Transistors

We herein demonstrate a method for reducing the surface energy in polymer insulators for high-performance organic thin-film transistors (OTFTs). The surface energy of the poly(4-vinyl phenol) (PVP) insulator was reduced from 45 mJ/m2 to 32 mJ/m2 by treatment with UV/Ozone and octadecyltrichlorosilane (ODTS). The pentacene growth was controlled by the surface energy. It caused the pentacene film deposited on the ODTS-treated PVP insulator to induce three-dimensional growth, leading to an increase in the field-effect mobility of approximately 109%. These results demonstrate that the method of adjusting the surface energy in polymer insulators is suitable for enhancing the performance of OTFTs.

Low-voltage pentacene thin-film transistors using Hf-based blend gate dielectrics

High-performance pentacene thin-film transistors operating at low voltages were fabricated using hafnium (Hf)-based blend gate dielectrics.

Surface energy control of soluble polyimide gate insulators by copolymerization method for high performance pentacene thin-film transistors

We have synthesized a series of surface energy controlled soluble polyimide (PI) gate insulators (KSPI-C1, KSPI-C3, and KSPI-C5) by one-step copolymerization method of the monomers 5-(2,5-dioxytetrahydrofuryl)-3-methyl-3-cyclohexene-1,2-dicarboxylic anhydride, 4,4-diaminodiphenylmethane, and 1-(3,5-diaminophenyl)-3-octadecylpyrrolidine-2,5-dione (DA-18-IM). The long alkyl chain containing DA-18-IM monomer was used to control the surface energy of PI polymers. Fully imidized PI polymers were found to be completely soluble in organic solvents such as N-methyl-2-pyrrolidone, dimethylacetamide, etc. Thermal gravimetric analysis exhibited that all polymers are stable up to more than 432°C with only 5wt.% weight loss. The glass transition temperatures of polymers are found to be between 208°C and 242°C by differential scanning calorimetry measurement. Thin films of all polymers could be fabricated at only 150°C and a pentacene thin-film transistor (TFT) with KSPI-C3 as a gate dielectric was found to exhibit the highest field effect mobility of 0.53cm2/Vs. Surface energy controlled PI polymers are promising candidates for gate dielectrics for organic TFTs.

Solution processed high performance pentacene thin-film transistors

High performance thin-film transistors were fabricated using a new precursor of pentacene through a multiple spin-heat procedure. High quality pentacene thin films can be prepared by this method and hence a FET device can be made in a top-contact configuration. The device exhibited a remarkable field-effect mobility of 0.38 cm(2) V(-1) s(-1) with an on/off ratio of 10(6).

High-Performance Pentacene Thin-Film Transistors Fabricated by Printing Technology

A high-performance bottom-contact pentacene thin-film transistor (TFT) is realized with its channel and electrodes fabricated by a simple printing process. By applying reverse offset printing of a nanosilver paste ink to the source/drain electrodes and organic vapor-jet printing to the thin pentacene layer, TFTs with a channel length of 20 μm are realized in a precise yet relatively simple fashion. The oxide formed during the processing of the silver ink is shown to help reduce the injection barrier between the source and pentacene, making it possible to realize high-performance bottom-contact TFTs without special treatment for the electrodes.

Bottom-Contact Pentacene Thin-Film Transistors on Silicon Nitride

We fabricate high-performance pentacene thin-film transistors (TFTs) using lithographic processes compatible with industry standard amorphous silicon (a-Si) TFT fabrication. Bottom-contact bottom-gate pentacene TFTs realized with silicon nitride (SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ) gate dielectric show effective mobility values of 0.59 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs, contact resistances as low as 2.4 kΩ·cm , and low threshold voltages. These results demonstrate the viability of using SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> as a gate dielectric for vacuum-deposited organic TFTs for large-area and flexible electronic applications.

High-Performance Pentacene Thin-Film Transistors Fabricated by Organic Vapor-Jet Printing

Organic vapor-jet printing, a maskless direct printing method, is used to fabricate high-performance pentacene thin-film transistors. By combining the optimal carrier gas temperature and the surface treatment of gate dielectrics, a mobility of 0.46 (±0.03) cm2 V-1 s-1 and an on-off ratio greater than 107 are achieved. Morphological analyses indicate that the relatively high carrier gas temperature and low surface energy of the dielectric surface are the keys in achieving the level of performance comparable to that of devices based on conventional technologies.

Low-Voltage High-Performance Pentacene Thin-Film Transistors With Ultrathin PVP/High- $\kappa$ HfLaO Hybrid Gate Dielectric

Low-voltage and high-performance pentacene thin-film transistors with a hybrid gate dielectric consisting of ultrathin PVP (8 nm) and a high-κ HfLaO (20 nm) have been demonstrated. The hybrid gate dielectric exploits the advantages of both dielectrics, i.e., a good interface between the organic dielectric and channel material as well as the insulating properties of the inorganic metal-oxide, resulting in very low leakage current, hysteresis-free behavior, superior drain-current drivability, and successful operation at -2 V. The superior device performance is attributed to good intermolecular ordering and the large grain size of the pentacene channel layer formed on the hybrid dielectric.

Hybridization of a low-temperature processable polyimide gate insulator for high performance pentacene thin-film transistors

We have synthesized a novel fully soluble and low-temperature processable polyimide gate insulator (KSPI) through the one-step condensation polymerization of the monomers 5-(2,5-dioxytetrahydrofuryl)-3-methyl-3-cyclohexene-1,2-dicarboxylic anhydride and 4,4-diaminodiphenylmethane. Fully imidized KSPI was found to be completely soluble in organic solvents such as N-methyl-2-pyrrolidone (NMP), dimethylacetamide (DMAc), γ-butyrolactone, dimethylsulfoxide (DMSO), and 2-butoxyethanol. Thin films of KSPI can be fabricated at only 150 °C and a pentacene OTFT with KSPI as a gate dielectric was found to exhibit a field effect mobility of 0.22 cm 2/V s. To obtain a high performance organic thin-film transistor (OTFT), the KSPI surface was modified in our new technique by hybridization with a non-polar side chain containing a polyimide insulator (PI). The carrier mobility of a pentacene OTFT with a hybridized polyimide gate insulator (BPI-3) was found to be 0.92 cm 2/V s. Our new low-temperature processable polyimides show promise as gate dielectrics for OTFTs.

High-performance pentacene thin-film transistors with high dielectric constant gate insulators

Pentacene thin-film transistors (TFTs) with titanium silicon oxide (Ti1−xSixO2) gate insulator have been fabricated to realize high field-effect mobility at practical voltages. The Ti1−xSixO2 films deposited by rf sputtering exhibited a flat surface and high dielectric constant. The pentacene TFT with the Ti1−xSixO2 gate insulator had high performance with a threshold voltage of −1.6V, an inverse subthreshold slope of 0.13V∕decade, and a current on/off ratio of 107 at a voltage of −10V. The field-effect mobilities of higher than 1cm2∕Vs were obtained in the whole voltage range of −2to−15V.

Analysis of electrical characteristics of high performance pentacene thin-film transistors with PMMA buffer layer

Top contact and bottom contact TFTs, based on evaporated pentacene, have been fabricated by using PMMA as buffer layer. Both type of devices show high performance with field-effect mobility >1cm2/Vs. Top contact transfer characteristics, measured at different temperatures, have been analyzed by the ‘temperature method’ in order to evaluate the effective density of localized states (DOS). The calculated DOS, approximated by two exponential tails, has been used in 2D numerical device analysis program to simulate the transfer and output characteristics at different temperatures.

Chemical reaction at the interface between pentacene andHfO2

The electronic structure and the interface formation at theinterface region between pentacene and HfO2 are investigated using x-rayphotoelectron spectroscopy (XPS), ultraviolet photoelectron spectroscopy(UPS), and x-ray emission spectroscopy (XES). The measured C 1s XPSspectra of pentacene indicate that chemical bonding occurs at theinterface between pentacene and HfO2. The carbon of pentacene reacts withoxygen belonging to HfO2 and band bending occurs at the interface due toa redistribution of charge. The determined interface dipole and bandbending between pentacene and HfO2 are 0.04 and 0.1 eV, respectively. Thehighest occupied molecular orbital (HOMO) level is observed at 0.68 eVbelow the Fermi level. This chemical reaction allows us to grow apentacene film with large grains onto HfO2. We conclude that highperformance pentacene thin film transistors can be obtained by insertingan ultrathin HfO2 layer between pentacene and a gateinsulator.