High-performance Graphene Field-effect Transistors Research Articles

Investigating and optimizing charge transfer between graphene and metal by using double layer electrode and polymer-free transfer method

Achieving low contact resistance between graphene and metals is crucial to the further development of high-performance graphene field effect transistors. Increasing the number of conduction modes is the key issue in improving the contact between graphene and metals. This study characterized the work function between graphene and metal contacts using in situ thermal evaporation and ultraviolet photoelectron spectroscopy. Silver produces weak n-type doping and gold produces heavy p-type doping in graphene. The use of a polymer-free transfer method and a double electrode contact structure produced gold contacts with a resistance value of 352.8 Ω · µm, which is 2.7 times lower than that obtained using conventional methods. This method also produced silver contacts with a resistance value of 958.6 Ω · µm, which represents a 180% improvement over conventional methods.

High-Gain Graphene Transistors with a Thin AlOx Top-Gate Oxide

The high-frequency performance of transistors is usually assessed by speed and gain figures of merit, such as the maximum oscillation frequency fmax, cutoff frequency fT, ratio fmax/fT, forward transmission coefficient S21, and open-circuit voltage gain Av. All these figures of merit must be as large as possible for transistors to be useful in practical electronics applications. Here we demonstrate high-performance graphene field-effect transistors (GFETs) with a thin AlOx gate dielectric which outperform previous state-of-the-art GFETs: we obtained fmax/fT > 3, Av > 30 dB, and S21 = 12.5 dB (at 10 MHz and depending on the transistor geometry) from S-parameter measurements. A dc characterization of GFETs in ambient conditions reveals good current saturation and relatively large transconductance ~600 S/m. The realized GFETs offer the prospect of using graphene in a much wider range of electronic applications which require substantial gain.

Depositing aluminum as sacrificial metal to reduce metal–graphene contact resistance**Project by the National Science and Technology Major Project, China (Grant No. 2011ZX02707.3), the National Natural Science Foundation of China (Grant No. 61136005), the Chinese Academy of Sciences (Grant No. KGZD-EW-303), and the Project of Beijing Municipal Science and Technology Commission, China (Grant No. Z151100003515003).

Reducing the contact resistance without degrading the mobility property is crucial to achieve high-performance graphene field effect transistors. Also, the idea of modifying the graphene surface by etching away the deposited metal provides a new angle to achieve this goal. We exploit this idea by providing a new process method which reduces the contact resistance from 597 Ω·μm to sub 200 Ω·μm while no degradation of mobility is observed in the devices. This simple process method avoids the drawbacks of uncontrollability, ineffectiveness, and trade-off with mobility which often exist in the previously proposed methods.

Low-voltage graphene field-effect transistors based on octadecylphosphonic acid modified solution-processed high-k dielectrics

In this study, a solution-processed bilayer high-k dielectric (Al2Oy/TiOx, abbrev. as ATO) was used to realize the low-voltage operation of graphene field-effect transistors (GFETs), in which the graphene was grown by atmospheric pressure chemical vapor deposition (APCVD). Upon modifying the interface between graphene and the dielectric by octadecylphosphonic acid (ODPA), outstanding room-temperature hole mobility up to 5805 cm2 V−1 s−1 and electron mobility of 3232 cm2 V−1 s−1 were obtained in a small gate voltage range from −3.0 V to 3.0 V under a vacuum. Meanwhile, an excellent on/off current ratio of about 8 was achieved. Our studies demonstrate an effective route in which utilizing the low-temperature solution-processed dielectrics can achieve low-voltage and high performance GFETs.

Fabrication of high-performance graphene field-effect transistor with solution-processed Al2O3 sensing membrane

High performance graphene field-effect transistors (FETs) with a solution-processed Al2O3 sensing membrane were fabricated. The solution-processed deposition technique offers a lot of advantages in terms of low cost, simplicity, high throughput, and large-area devices. Especially, the solution-deposition process is well-suited for membrane formation of graphene FETs, which is vulnerable to plasma or thermal processes for insulator growth on surface. The graphene FETs with a solution-deposited Al2O3 sensing membrane exhibited a higher pH sensitivity as well as good chemical stability. Therefore, the graphene FETs with solution-deposited Al2O3 sensing membrane are very promising to biological sensors application.

Inkjet-defined field-effect transistors from chemical vapour deposited graphene

In this work, inkjet printing methods are used to create graphene field effect transistors with mobilities up to 3000cm2V−1s−1. A commercially-available chromium-based ink is used to define the device channel by inhibiting chemical vapour deposition of graphene in defined regions on a copper catalyst. We report on the patterned graphene growth using optical and electronic microscopy, Raman spectroscopy and X-ray photoelectron spectroscopy. Silver nanoparticle ink is used to create electrical contacts to the defined graphene regions. The resulting devices were characterised by electrical transport measurements at room temperature. As a result we are able to fabricate high-performance graphene field effect transistors entirely defined by a commercial inkjet printer with channel lengths of 50μm.

25 GHz Embedded-Gate Graphene Transistors with High-K Dielectrics on Extremely Flexible Plastic Sheets

Despite the widespread interest in graphene electronics over the past decade, high-performance graphene field-effect transistors (GFETs) on flexible substrates have been rarely achieved, even though this atomic sheet is widely understood to have greater prospects for flexible electronic systems. In this article, we report detailed studies on the electrical and mechanical properties of vapor synthesized high-quality monolayer graphene integrated onto flexible polyimide substrates. Flexible graphene transistors with high-k dielectric afforded intrinsic gain, maximum carrier mobilities of 3900 cm(2)/V·s, and importantly, 25 GHz cutoff frequency, which is more than a factor of 2.5 times higher than prior results. Mechanical studies reveal robust transistor performance under repeated bending, down to 0.7 mm bending radius, whose tensile strain is a factor of 2-5 times higher than in prior studies. In addition, integration of functional coatings such as highly hydrophobic fluoropolymers combined with the self-passivation properties of the polyimide substrate provides water-resistant protection without compromising flexibility, which is an important advancement for the realization of future robust flexible systems based on graphene.

High-Performance Graphene Field-Effect Transistors With Extremely Small Access Length Using Self-Aligned Source and Drain Technique

Self-aligned source/drain (S/D) graphene field-effect transistors (GFETs) with extremely small access lengths were successfully fabricated using a simple device fabrication process without sidewall spacer formation. The self-aligned S/D GFET exhibits superior electrical characteristics, such as the intrinsic carrier mobility of 6100 cm2/Vs, the gate leakage current of 10-10-10-9 A and the contact resistance of 412 Ωμm. In particular, a cutoff frequency of 13 GHz was achieved with a rather large gate length (LG= 3 μm), which demonstrates the promising future of this self-aligned GFET.

Top-Gated Graphene Field-Effect Transistors with High Normalized Transconductance and Designable Dirac Point Voltage

High-performance graphene field-effect transistors (G-FETs) are fabricated with carrier mobility of up to 5400 cm(2)/V·s and top-gate efficiency of up to 120 (relative to that of back gate with 285 nm SiO(2)) simultaneously through growing high-quality Y(2)O(3) gate oxide at high oxidizing temperature. The transconductance normalized by dimension and drain voltage is found to reach 7900 μF/V·s, which is among the largest of the published graphene FETs. In an as-fabricated graphene FET with a gate length of 310 nm, a peak transconductance of 0.69 mS/μm is realized, but further improvement is seriously hindered by large series resistance. Benefiting from highly efficient gate control over the graphene channel, the Dirac point voltage of the graphene FETs is shown to be designable via simply selecting a gate metal with an appropriate work function. It is demonstrated that the Dirac point voltage of the graphene FETs can be adjusted from negative to positive, respectively, via changing the gate material from Ti to Pd.