Synthesis Behavior Research Articles

Research on the design and image perception of cultural landscapes based on digital roaming technology

AbstractThe preservation and advancement of cultural heritage continue to present significant challenges, arising from conflicting objectives, concepts, methodologies, and limited resources. Image perception not only serves as an observational tool for cultural heritage but also as a research method to uncover deeper meanings and implications. To explore the complex dynamics of cultural heritage and address the risks of its deterioration, this study employed virtual engine software (Unity 2019) to create digital landscapes for immersive exploration. An image perception evaluation framework was established through field surveys and behavioral synthesis experiments across five key areas, including ancient tree ecosystems and architectural sites. Our findings revealed that participants showed the greatest interest in the ancient tree ecological area, indicating a strong attachment to historical continuity and natural progression. Heart rate variability (HRV) analysis further demonstrated that participants experienced positive emotional responses, suggesting that well-designed cultural landscapes can enhance mental well-being and uplift mood. Additionally, participants expressed a strong willingness to discuss the ancient tree eco-region, with image perception playing a crucial role in motivating information sharing and driving conservation efforts. This study introduces an innovative model—Design Practice, Immersive Experience, and Image Perception Evaluation—which offers a new perspective for the preservation and enhancement of cultural heritage sites.

Direct numerical simulations of turbulent boundary layers developing over synthesised calcareous marine biofouling surfaces

ABSTRACT The topographical complexity and multi-scale nature of biofouling makes the use of current drag-topography correlations over regular topographical arrangements impractical. In order to address this problem, we synthesise biofouling-type surfaces of tubeworm-type populations in various percentage coverages and distributions. To acquire the resulting flow field we utilise topography-resolving direct numerical simulations. The surface synthesis is performed by an in-house surface generation/analysis package, AdRoS, in which individual biofouling organisms are used as building blocks to synthesise surfaces that resemble those found on ship hulls. Our synthesis algorithm allows for a parametric study to be performed with respect to selected parameters characterising the topography. In this work we focus on the frontal solidity, λ f , in order for its impact to the mean flow to be investigated. Results indicate that both the boundary layer growth-rate, as well as the roughness function, Δ U + , scale with the frontal solidity, λ f , in a proportional fashion, indicating the significance of the frontal solidity parameter. The organism-characteristic height, h , proves to also have a significant impact to the mean flow and even counter-act against the frontal solidity. Interestingly, typical flow separation patterns such as those found on isolated wall-mounted objects were detected, which were found to be mitigated or amplified depending on the planar, λ p , and frontal, λ f , solidity.

Validating the Quality Maternal and Newborn Care Framework Index: A Global Tool for Quality-of-Care Evaluations.

Quality maternity care is known to improve a range of maternal and neonatal outcomes. The Lancet Series on Midwifery's Quality Maternal and Newborn Care (QMNC) Framework is a high-level synthesis of the global evidence on quality maternity care. Initial qualitative work demonstrated the Framework's adaptability in evaluating service user and provider perceptions of the quality of maternity care. However, evaluating services at scale requires a survey instrument. This paper reports the validation of the QMNC Framework index (QMNCFi), a five-part survey for the evaluation of maternity care across diverse settings. International online English language survey of women who had given birth in the previous year in Australia, Ghana, India and the United Kingdom (UK). It was distributed through service user networks (UK and Australia) and at postnatal clinics (Ghana and India). All forms were completed online. Test-retest was conducted to assess reliability. Five hundred and forty mothers completed the survey (Australia 136; Ghana 131; India 153; UK 120). Construct validity: Cronbach's α in 12 of the survey's 13 sections ranged from 0.795 to 0.986; for the remaining section the alpha was 0.594. Reliability: 55 participants completed the QMNCFi a second time. Intraclass correlation coefficient results ranged from 0.657 to 0.939 across the 13 sections. Field researchers in Ghana and India reported that the survey was easily understood and completed. This survey has shown that, across diverse contexts, the QMNCFi is a valid, reliable, and comprehensive tool for measuring service user perceptions of the quality of care over time.

Memory State‐Feedback Control for a Linear System With Time‐Varying Delay Based on the Tuning Matrix Search Algorithm

ABSTRACTA multiple augmented Lyapunov function (MALF) is a function that includes more than one augmented matrix, allowing for a more precise evaluation of the relationships between different states within a system and facilitating the analysis of system stability. However, employing multiple augmented matrices can complicate the process of designing controllers. For this issue, this article proposes a controller synthesis algorithm to address the complexity of controller design resulting from multiple augmentation matrices. First, a memory state‐feedback control criterion with tuning matrices is derived by constructing an MALF. Second, a tuning matrix search algorithm is proposed to provide appropriate tuning matrices for the memory state‐feedback control criterion, leading to the determination of optimal controller gains. Finally, the effectiveness and advantage are verified by simulation of load frequency control for in the power system and control for a linear singular time‐delay system.

High throughput edit distance computation on FPGA-based accelerators using HLS

Edit distance is a computational grand challenge problem to quantify the minimum number of editing operations required to modify one string of characters to the other, finding many applications of natural language processing. In recent years, relevant and increasing interest has also emerged from deoxyribonucleic acid (DNA) applications, like Next Generation Sequencing and DNA storage technologies. Both applications share two crucial features: i) the information is coded into the four bases of DNA and ii) the level of operational noise is still high causing errors in the data, requiring inclusion in the workflow of the computation of algorithms such as the edit distance for finding similarities between sequences. To boost this computation many solutions are available in the literature. Among them, the FPGAs are largely used since the data domain of those applications is strings of 4 characters represented as two-bit values, inconveniently fitting the basic data types of ordinary CPUs and GPUs, with additional benefits of providing a high level of parallelism and low processing latency. This contribution presents a computing- and energy-efficient design implementing the edit distance algorithm combining metaprogramming and High-Level Synthesis. We also assess the performance of our design targeting recent FPGA-based accelerators. Our solution uses nearly 90% of FPGA basic-block hardware resources achieving about 90% of computing efficiency delivering a maximum throughput of 16.8 TCUPS and an energy efficiency of 46 Mpair/Joule, enabling the use of FPGAs as a new class of accelerators for High Performance Computing in DNA applications.

Timing issues on power side-channel leakage of advanced encryption standard circuits designed by high-level synthesis

In recent years, field programmable gate array (FPGA) have been used in many internet of things (IoT) devices and are equipped with cryptographic circuits to ensure security. However, they are exposed to the risk of cryptographic keys being stolen by side-channel attacks. Countermeasures against side-channel attacks have been developed, but they are becoming more of a threat to IoT devices due to the diversity of attacks. Therefore, it is necessary to understand the basic characteristics of side-channel attacks. Therefore, this study clarifies the relationship between two timing issues, the clock period of the circuit and the power sampling interval, and the amount of side-channel leakage. We design seven advanced encryption standard (AES) circuits with different clock periods and conduct empirical experiments using logic simulations to clarify the correlation between the two timings and the amount of side-channel leakage. T-test is used to evaluate the leakage amount, which is evaluated based on four metrics. From the results, we argue that the clock period and sampling interval do not interfere with each other in the side-channel leakage amount.

MaskedHLS: Domain-Specific High-Level Synthesis of Masked Cryptographic Designs

MaskedHLS: Domain-Specific High-Level Synthesis of Masked Cryptographic Designs

MKIDGen3: Energy-resolving, single-photon-counting microwave kinetic inductance detector readout on a radio frequency system-on-chip.

Microwave Kinetic Inductance Detectors (MKIDs) are superconducting detectors capable of single-photon counting with energy resolution across the ultraviolet, optical, and infrared (UVOIR) spectrum with microsecond timing precision. MKIDs are also multiplexable, providing a feasible way to create large-format, cryogenic arrays for sensitive imaging applications in biology, astronomy, and quantum information. Building large, cryogenic MKID arrays requires processing highly multiplexed, wideband readout signals in real time; this task has previously required large, heavy, and power-intensive custom electronics. In this work, we present the third-generation UVOIR MKID readout system (Gen3), which is capable of reading out twice as many detectors with an order of magnitude lower power, weight, volume, and cost-per-pixel as compared to the previous system. Gen3 leverages the Xilinx RFSoC4x2 platform to read out 2048, 1MHz MKID channels per board. The system takes a modern approach to FPGA design using Vitis High-Level Synthesis to specify signal processing blocks in C/C++, Vivado ML intelligent design runs to inform implementation strategy and close timing, and Python productivity for Zynq to simplify interacting with and programming the FPGA using Python. This design suite and tool flow allows general users to contribute to and maintain the design and positions Gen3 to rapidly migrate to future platforms as they become available. In this work, we describe the system requirements, design, and implementation. We also provide performance characterization details and show that the system achieves detector-limited resolving power in the case of few readout tones and minimal degradation with all 2048 tones. Planned upgrades and future work are also discussed. The Gen3 MKID readout system is fully open-source and is expected to facilitate future array scaling to megapixel-sized formats and increase the feasibility of deploying UVOIR MKIDs in space.

Efficient implementation of artificial neural networks on FPGAs using high-level synthesis and parallelism

Efficient implementation of artificial neural networks on FPGAs using high-level synthesis and parallelism

Parametrical synthesis of various radio devices with the set quantity of identical cascades of type «the nonlinear part – the mixed two-port network»

Background. Presence of possibility of analytical definition of a part of parametres of various radio devices, optimum by criterion of maintenance of preset values of modules and phases of transfer functions on necessary quantity of frequencies, considerably reduces time of numerical optimisation of other part of parametres by criterion of formation demanded frequency response and phase response in a strip of frequencies. Till now such problems dared concerning radio devices only with one cascade of type «a nonlinear part - the coordination the device» or «the coordination the device – a nonlinear part». In quality «the coordination devices were used the jet, resistive, complex or mixed two-port networks. The problem of multicascade radio devices with jet two-port networks is solved also. Change of basis for the coordination two-port networks and a place of inclusion of a nonlinear part leads to change of area of a physical realizability. Aim. Working out of algorithms of parametrical synthesis of radio devices with any quantity of identical and unequal cascades of type «a nonlinear part ‑the coordination the mixed two-port network» by criterion of maintenance of the set frequency characteristics. Nonlinear parts are presented in the form of a nonlinear element and parallel either consecutive on a current or pressure of a feedback. Methods. The theory of two-port networks, matrix algebra, a decomposition method, a method of synthesis of actuation microwave devices, numerical methods of optimisation. Results. In interests of achievement of the specified purpose systems of the algebraic equations are generated and solved. Models of optimum two-port networks in the form of mathematical expressions for definition of interrelations between elements of their classical matrix of transfer and for search of dependences of mixed of two-poles from frequency are received. It is shown, that at certain parities between quantity of cascades and values of resistance of a source of a signal and loading of the one-cascade radio device frequency characteristics of one-cascade and multicascade radio devices appear identical or similar. Such schemes are named by equivalent. Conclusion. The comparative analysis of theoretical results (frequency response and phase response radio devices, value of parametres), received by mathematical modelling in system MathCad, and the experimental results received by схемотехнического of modelling in systems OrCad and MicroCap, shows their satisfactory coincidence.

Social inequalities in cancer incidence, survival and mortality: An umbrella review

Abstract Background An increasing number of systematic reviews investigating differences in cancer burden by social factors such as race, ethnicity, and socioeconomic status have been published in recent years. Our study aims to evaluate the strength and quality of evidence from systematic reviews investigating associations between social factors and cancer incidence, survival, and mortality to help policy-makers reduce existing social inequalities in the burden of cancer. Methods Our study is a pre-registered umbrella review (PROSPERO; CRD42024552884). We systematically searched Medline, Scopus, Web of Science, CINAHL, PsycINFO, the Cochrane Library, the JBI EBP database, and Epistemonikos without date restrictions for published systematic reviews with or without meta-analyses on June 17, 2024. The search identified 15,542 records, which were reduced to 7,421 after deduplication. We are currently screening studies to include systematic reviews of cohort or case-control studies that examined associations between one or more social factors (gender, race/ethnicity, education, occupation, socioeconomic status, place of residence, religion, social capital) and cancer outcomes. Study screening, data extraction, and quality appraisal will be done in duplicate using pre-piloted forms. The strength of evidence of reported associations between social factors and cancer outcomes will be assessed using the Grading of Recommendations, Assessment, Development, and Evaluation (GRADE) criteria. Before data synthesis, we will assess the degree of overlap between primary studies in the eligible reviews by creating citation matrices and calculating corrected covered area indices. Following this, we will narratively summarize associations (for systematic reviews without meta-analyses) and pool the risk estimates for individual social factors and cancer outcomes (for reviews with meta-analyses) using random-effects meta-analysis models. We will have preliminary results ready by November 2024. Key messages • Our umbrella review aims to evaluate the strength and quality of evidence from systematic reviews which have examined social inequalities in cancer incidence, survival, and mortality. • This high-level evidence synthesis can help policy-makers better plan and target interventions to reduce the existing social inequalities in the burden of cancer.

CollectiveHLS: A Collaborative Approach to High-Level Synthesis Design Optimization

High-Level Synthesis (HLS) has played a pivotal role in making FPGAs accessible to a broader audience by facilitating high-level device programming and rapid microarchitecture customization through the use of directives. However, manually selecting the right directives can be a formidable challenge for programmers lacking a hardware background. This paper presents CollectiveHLS, an ultra-fast, knowledge-driven approach to optimizing HLS designs. It automates the identification and application of optimal directive configurations from the original source code, focusing on minimizing design latency and ensuring synthesizability. This optimization approach is entirely data-driven, offering a generalized HLS tuning solution without reliance on Quality of Result (QoR) models or meta-heuristics. CollectiveHLS is designed, implemented, and evaluated using around 60 applications sourced from well-established benchmark suites and GitHub repositories, all running on a Xilinx UltraScale + MPSoC ZCU104. It achieves an average geometric mean speedup of up to \(23.1\times\) compared to the official source code without directives, while maintaining synthesizability and feasibility rates of 100% and 96.6%, respectively, matching those of Vitis, the industry-standard framework for FPGA acceleration. Comparisons with resource over-provisioning, traditional genetic algorithm-based Design Space Exploration (DSE), and State-of-the-Art (SotA) approaches demonstrate that CollectiveHLS produces designs of comparable quality \(14.6\times\) faster on average. These results underscore the potential of our approach as an ultra-fast and automated solution for HLS optimization.

Suppression of the interference fading in heterodyne Φ-OTDR with fast signal synthesis algorithm

Abstract With the increasing diversity of application scenarios, there is a growing demand for distributed acoustic sensing (DAS) systems to monitor the environment without false alarms. In DAS system based on phase-sensitive optical time-domain reflectometry (Φ-OTDR), interference fading significantly lead to a large number of false alarms in the system, which affecting the system’s monitoring capability. Before the phase demodulation process, Φ-OTDR system generally requires additional time for interference fading suppression. Therefore, the rapid acquisition of a fading-free signal before phase demodulation benefits the use of Φ-OTDR in real-time demanding scenarios. In this paper, based on the time-domain stitching and complex-field moving average, a fast signal synthesis (FSS) algorithm is proposed, enabling the quick synthesis of signals while maintaining fading suppression performance. Experimental results show that the signal intensity obtained by FSS algorithm fluctuates within 27 dB, while the intensity of the conventional denoising algorithm fluctuates more than 50 dB. Meanwhile, this method is more rapid than the rotated-vector-sum (RVS) algorithm, and the time consumption of signal synthesis is only 26.58% of that of the RVS algorithm. FSS algorithm provides a new and faster way to synthesize signals for interference fading suppression. Benefiting from this, FSS algorithm further improves the real-time performance of the Φ-OTDR system.

A hardware architecture for single and multiple ellipse detection using genetic algorithms and high-level synthesis tools

Ellipse detection techniques are often developed and validated in software environments, neglecting the critical consideration of computational efficiency and resource constraints prevalent in embedded systems. Furthermore, programmable logic devices, notably Field Programmable Gate Arrays (FPGAs), have emerged as indispensable assets for enhancing performance and expediting various processing applications. In the realm of computational efficiency, hardware implementations have the flexibility to tailor the required arithmetic for various applications using fixed-point representation. This approach enables faster computations while upholding adequate accuracy, resulting in reduced resource and energy consumption compared to software applications that rely on higher clock speeds, which often lead to increased resource and energy consumption. Additionally, hardware solutions provide portability and are suitable for resource-constrained and battery-powered applications. This study introduces a novel hardware architecture in the form of an intellectual property core that harnesses the capabilities of a genetic algorithm to detect single and multi ellipses in digital images. In general, genetic algorithms have been demonstrated to be an alternative that shows better results than those based on traditional methods such as the Hough Transform and Random Sample Consensus, particularly in terms of accuracy, flexibility, and robustness. Our genetic algorithm randomly takes five edge points as parameters from the image tested, creating an individual treated as a potential candidate ellipse. The fitness evaluation function determines whether the candidate ellipse truly exists in the image space. The core is designed using Vitis High-Level Synthesis (HLS), a powerful tool that converts C or C＋＋functions into Register-Transfer Level (RTL) code, including VHDL and Verilog. The implementation and testing of the ellipse detection system were carried out on the PYNQ-Z1, a cost-effective development board housing the Xilinx Zynq-7000 System-on-Chip (SoC). PYNQ, an open-source framework, seamlessly integrates programmable logic with a dual-core ARM Cortex-A9 processor, offering the flexibility of Python programming for the onboard SoC processor. The experimental results, based on synthetic and real images, some of them with the presence of noise processed by the developed ellipse detection system, highlight the intellectual property core’s exceptional suitability for resource-constrained embedded systems. Notably, it achieves remarkable performance and accuracy rates, consistently exceeding 99% in most cases. This research aims to contribute to the advancement of hardware-accelerated ellipse detection, catering to the demanding requirements of real-time applications while minimizing resource consumption.

Elucidation of Spartina dimethylsulfoniopropionate synthesis genes enables engineering of stress tolerant plants

The organosulfur compound dimethylsulfoniopropionate (DMSP) has key roles in stress protection, global carbon and sulfur cycling, chemotaxis, and is a major source of climate-active gases. Saltmarshes are global hotspots for DMSP cycling due to Spartina cordgrasses that produce exceptionally high concentrations of DMSP. Here, in Spartina anglica, we identify the plant genes that underpin high-level DMSP synthesis: methionine S-methyltransferase (MMT), S-methylmethionine decarboxylase (SDC) and DMSP-amine oxidase (DOX). Homologs of these enzymes are common in plants, but differences in expression and catalytic efficiency explain why S. anglica accumulates such high DMSP concentrations and other plants only accumulate low concentrations. Furthermore, DMSP accumulation in S. anglica is consistent with DMSP having a role in oxidative and osmotic stress protection. Importantly, administration of DMSP by root uptake or over-expression of Spartina DMSP synthesis genes confers plant tolerance to salinity and drought offering a route for future bioengineering for sustainable crop production.

Automatically Reducing Privilege for Access Control Policies

Access control policies are programs used to secure cloud resources. These polices should only grant the necessary permissions that a given application needs. However, it is challenging to write and maintain policies as applications and their required permissions change over time. In this paper, we focus on the Amazon Web Services (AWS) IAM policy language and present an approach that, given a policy, synthesizes a modified policy that is more restrictive and better abides to the principle of least privilege. Our approach looks at the actual access history (e.g., access logs) used by an application and computes the least permissive local modification of the user-given policy that still provides the same permissions that were observed in the access history. We treat the problem of computing the least permissive policy as a generalization problem in a lattice of possible policies (i.e., the set of local modifications). We show that our synthesis algorithm comes with correctness guarantees and is amendable to an efficient implementation that is easy to parallelize. We implement our algorithm in a tool IAM-PolicyRefiner and evaluate it on policies attached to AWS roles with access logs. For each role, IAM-PolicyRefiner can compute easy-to-inspect refined policies in less than 1 minute, and the refined policies do not overfit to the requests in the log---i.e., the policies also allow requests in a left-out test set of requests.

Synthesizing Formal Semantics from Executable Interpreters

Program verification and synthesis frameworks that allow one to customize the language in which one is interested typically require the user to provide a formally defined semantics for the language. Because writing a formal semantics can be a daunting and error-prone task, this requirement stands in the way of such frameworks being adopted by non-expert users. We present an algorithm that can automatically synthesize inductively defined syntax-directed semantics when given (i) a grammar describing the syntax of a language and (ii) an executable (closed-box) interpreter for computing the semantics of programs in the language of the grammar. Our algorithm synthesizes the semantics in the form of Constrained-Horn Clauses (CHCs), a natural, extensible, and formal logical framework for specifying inductively defined relations that has recently received widespread adoption in program verification and synthesis. The key innovation of our synthesis algorithm is a Counterexample-Guided Synthesis (CEGIS) approach that breaks the hard problem of synthesizing a set of constrained Horn clauses into small, tractable expression-synthesis problems that can be dispatched to existing SyGuS synthesizers. Our tool Synantic synthesized inductively-defined formal semantics from 14 interpreters for languages used in program-synthesis applications. When synthesizing formal semantics for one of our benchmarks, Synantic unveiled an inconsistency in the semantics computed by the interpreter for a language of regular expressions; fixing the inconsistency resulted in a more efficient semantics and, for some cases, in a 1.2x speedup for a synthesizer solving synthesis problems over such a language.

Modular Synthesis of Efficient Quantum Uncomputation

A key challenge of quantum programming is uncomputation: the reversible deallocation of qubits. And while there has been much recent progress on automating uncomputation, state-of-the-art methods are insufficient for handling today’s expressive quantum programming languages. A core reason is that they operate on primitive quantum circuits, while quantum programs express computations beyond circuits, for instance, they can capture families of circuits defined recursively in terms of uncomputation and adjoints. In this paper, we introduce the first modular automatic approach to synthesize correct and efficient uncomputation for expressive quantum programs. Our method is based on two core technical contributions: (i) an intermediate representation (IR) that can capture expressive quantum programs and comes with support for uncomputation, and (ii) modular algorithms over that IR for synthesizing uncomputation and adjoints. We have built a complete end-to-end implementation of our method, including an implementation of the IR and the synthesis algorithms, as well as a translation from an expressive fragment of the Silq programming language to our IR and circuit generation from the IR. Our experimental evaluation demonstrates that we can handle programs beyond the capabilities of existing uncomputation approaches, while being competitive on the benchmarks they can handle. More broadly, we show that it is possible to benefit from the greater expressivity and safety offered by high-level quantum languages without sacrificing efficiency.

Crabtree: Rust API Test Synthesis Guided by Coverage and Type

Rust type system constrains pointer operations, preventing bugs such as use-after-free. However, these constraints may be too strict for programming tasks such as implementing cyclic data structures. For such tasks, programmers can temporarily suspend checks using the unsafe keyword. Rust libraries wrap unsafe code blocks and expose higher-level APIs. They need to be extensively tested to uncover memory-safety bugs that can only be triggered by unexpected API call sequences or inputs. While prior works have attempted to automatically test Rust library APIs, they fail to test APIs with common Rust features, such as polymorphism, traits, and higher-order functions, or they have scalability issues and can only generate tests for a small number of combined APIs. We propose Crabtree, a testing tool for Rust library APIs that can automatically synthesize test cases with native support for Rust traits and higher-order functions. Our tool improves upon the test synthesis algorithms of prior works by combining synthesis and fuzzing through a coverage- and type-guided search algorithm that intelligently grows test programs and input corpus towards testing more code. To the best of our knowledge, our tool is the first to generate well-typed tests for libraries that make use of higher-order trait functions. Evaluation of Crabtree on 30 libraries found four previously unreported memory-safety bugs, all of which were accepted by the respective authors.

Automating Unrealizability Logic: Hoare-Style Proof Synthesis for Infinite Sets of Programs

Automated verification of all members of a (potentially infinite) set of programs has the potential to be useful in program synthesis, as well as in verification of dynamically loaded code, concurrent code, and language properties. Existing techniques for verification of sets of programs are limited in scope and unable to create or use interpretable or reusable information about sets of programs. The consequence is that one cannot learn anything from one verification problem that can be used in another. Unrealizability logic (UL), proposed by Kim et al. as the first Hoare-style proof system to prove properties over sets of programs (defined by a regular tree grammar), presents a theoretical framework that can express and use reusable insight. In particular, UL features nonterminal summaries ---inductive facts that characterize recursive nonterminals (analogous to procedure summaries in Hoare logic). In this work, we design the first UL proof synthesis algorithm, implemented as Wuldo. Specifically, we decouple the problem of deciding how to apply UL rules from the problem of synthesizing/checking nonterminal summaries by computing proof structure in a fully syntax-directed fashion. We show that Wuldo, when provided nonterminal summaries, can express and prove verification problems beyond the reach of existing tools, including establishing how infinitely many programs behave on infinitely many inputs. In some cases, Wuldo can even synthesize the necessary nonterminal summaries. Moreover, Wuldo can reuse previously proven nonterminal summaries across verification queries, making verification 1.96 times as fast as when summaries are instead proven from scratch.