In this work we investigate the performance of double-gate and cylindrical nanowire FETs with high-kappa gate dielectrics at their extreme miniaturization limits. The model fully accounts for quantum electrostatics; current transport is simulated by an improved quantum drift-diffusion approach supported by a new thickness-dependent mobility model which nicely fits the available measurements for both SiO2 and HfO2 gate dielectrics. The on-current is simulated using both the quantum drift-diffusion model and a full-quantum transport approach based on the quantum transmitting boundary method, which assumes a purely ballistic transport. The performance comparison between SiO2 and HfO2 insulated-gate FETs with the same electrical oxide thickness demonstrates that the latter provides a slight degradation of the short-channel effect compared with the former but, at the same time, gives an improved on-current due to lateral capacitive-coupling effects, despite the inherent degradation of the low-field mobility