High-efficiency class-F Power Amplifier Research Articles

Investigation of class-F power amplifier in the presence of the second and fourth harmonics of input voltage

In this paper, a thorough theoretical investigation of high-efficiency class-F power amplifier (PA) is undertaken to drive, considering the second and fourth harmonics of input voltage. The precise analytical expressions of the gate-source voltage, drain current, output power, and efficiency are extracted. Maximum normalized output power and maximum drain efficiency from the initial phase and amplitude of the second and fourth harmonics of input gate-voltage can be achieved. The simulation of class-F PA using a GaN CGH40010F transistor has been done to validate the theoretical analysis. Addition of the fourth harmonic gate voltage along with the second harmonic improves the output power and efficiency of the PA by 0.7 dBm and 4.1%. Based on the simulation with realistic elements, a highly efficient PA operating from 1.8 to 2.2 GHz is implemented. The fabricated PA provides an efficiency of 72–87.6%, PAE of 65–80% and an output power of 39.3–41 dBm.

High-efficiency class-F power amplifier based on double spiral defected ground structure

ABSTRACT In this paper, a high-efficiency class-F power amplifier with a harmonic control circuit is proposed. The harmonic control circuit is realised by loading microstrip branch lines to achieve a short-circuit state for the second harmonic. The double spiral defected ground units are loaded on the ground of the microstrip line of the drain bias circuit to produce a low-pass filtering and stopband suppression effect outside the passband, so as to suppress the third harmonic. Meanwhile, it would provide an open-circuit state for the third harmonic, and finally meet the harmonic impedance tuning demands of class-F power amplifier. Through theoretical analysis and simulation, a high-efficiency class-F power amplifier operating at 2.5 GHz ~2.7 GHz is designed. The measured results show that in the working frequency band, the drain efficiency is 66.3%~71.1%, the output power is 40.9 dBm ~42.1 dBm and the gain is 10.9 dB ~11.8 dB.

High-efficiency Class-F Power Amplifier with a New Design of Input Matching Network

This paper presents a novel access to develop a class-F power amplifier with high power-added efficiency (PAE). The main goal of the proposed PA is to obtain high PAE. The proposed HCC consists a design of output matching circuit (OMN) and input matching combined with a symmetric low-pass filter (LPF) reported. To accomplish a high-efficiency performance, a low-voltage pHEMT in the circuit was executed to supply the required dc-supply voltage. It yielded nth harmonic suppression and high-power added efficiency (PAE). The simulation was carried out using harmonic balance analysis. The power amplifier proposed in this study was fabricated at fundamental frequency of 1 GHz with PAE of 80% and DE of 86% under 12.3dBm input power and very low drain voltage of 2 V. This class-F PA manufactured with such features can be utilized for power amplification in wireless transmitter communication systems.

A design scheme for harmonic suppression network of high efficiency class-F power amplifier

This paper presents a design scheme of class-F PA harmonic suppression network. This scheme combines the advantages of lumped parameter elements and distributed parameter elements, and makes use of the characteristics of high Q value (quality factor), large adjustability of capacitance and high reusability of the microstrip line, so that the harmonic suppression network has the advantages of them. Based on the proposed scheme, a class-F PA with a frequency of 2.4GHz and a maximum PAE of 68.86% is designed, the output power of which can reach 17.5W (42.42dBm), so as to verify the feasibility of the proposed scheme. This scheme can improve the output power of UHF (300 ~ 3000MHz) class-F PA and reduce the difficulty of circuit design under the condition of high PAE.

High-Efficiency Reconfigurable Dual-Band Class-F Power Amplifier With Harmonic Control Network Using MEMS

This letter presents a novel reconfigurable, high-efficiency class-F power amplifier (PA) structure, using a commercial GaN-HEMT, that achieves dual-band configuration not only at the fundamental frequency but also at the harmonics. With a proper harmonic tuning structure, the need for an extra filtering section is eliminated, resulting in a high dual-band efficiency with a reduced number of components and size. The reconfigurable structure uses commercial single-pole-double-throw (SPDT) and single-pole-single-throw (SPST) MEMS switches optimally placed on the stubs to select between 900 and 1800 MHz. The reconfigurable PA achieves a measured power-added efficiency (PAE) of 69.5% and a power gain of 13.6 dB while delivering an output power of 39.1 dBm at 900 MHz. At 1800 MHz, the amplifier achieves a PAE of 57.9%, a power gain of 10.5 dB, and an output power of 38.5 dBm.

Design of a high efficiency class-F power amplifier with large signal and small signal measurements

In this paper, a modified class-F power amplifier is designed and implemented with new method at 900 MHz frequency. The meandered line compact microstrip resonant cell (MLCMRC), with simple structure is proposed to use as a harmonic control circuit (HCC). The proposed MLCMRC correctly acts as open-circuit at third and fifth harmonics and acts as short-circuit at second and fourth harmonics. In this design, the proposed PA is integrated with simple MLCMRC, while the large conventional matching lines are omitted, which leads to harmonics suppression, size reduction, and PAE improvement at same time. The proposed class-F power amplifier is characterized by small-signal and large-signal measurements to evaluate its performance. The maximum obtained gain for the proposed PA is 18.5 dB. Also, this design can obtain 74% PAE under 15 dBm input power, which shows 5% and 10% improvement in the maximum gain and PAE, respectively compared to the conventional class-F PA. Moreover, the applied MLCMRC resulted in the 36% size reduction, compared to the same PA without MLCMRC.

High efficiency class-F power amplifier integrated with microstrip asymmetric lowpass filter

In this paper, a novel approach is presented to design a class-F power amplifier (PA) integrated with microstrip asymmetric lowpass filter (LPF). Use of an asymmetric LPF with very good specifications and nonreciprocal frequency response, in the case of a PA, which input and output ports are fixed, can improve the PA characteristics, significantly. The results of this structure is accessing to a high output power and the suppressed unwanted harmonics, which can guarantee a high power added efficiency (PAE) in comparison to the conventional class-F PA. The advantages of this method show the attenuation of nth harmonics, high output power with low DC voltage source, high PAE and good linearity. Experiments have been carried out at 1.8 GHz and showed a maximum PAE value of nearby 75% with about 27.2 dBm output power, under 19 dBm corresponding input power.

Bandpass Class-F Power Amplifier Based on Multifunction Hybrid Cavity–Microstrip Filter

This brief presents a filter-integrated high-efficiency class-F power amplifier (PA). The hybrid cavity–microstrip filtering circuit is employed not only to realize output impedance matching and the third-harmonic manipulation but also to provide high-selectivity bandpass responses. To fulfill the requirements of high-efficiency class-F PAs, cavity resonators and microstrip feeding structures are involved, and their benefits are fully exploited. The metal cavity resonator features a high $Q$ value and, thus, low loss in the passband, resulting in high efficiency. Moreover, metal walls of cavities act as heat sink for the transistor. The microstrip feeding structures are used to improve the skirt selectivity and manipulate the third harmonic. Moreover, it features easy integration with the transistor, and thus, the transition between cavity and microstrip lines is eliminated. The hybrid filter is characterized based on filter synthesis theory. Complex impedance conversion analysis is carried out to guide the impedance transformation from 50 $\Omega$ to a complex one desired by the transistor. For demonstration, a filtering PA operating at 2.4 GHz is designed and measured. It exhibits both high-selectivity bandpass responses and good PA performance with maximum power-added efficiency of 70.9% at 40.8-dBm output power.

A high-efficiency narrow-band class-F power amplifier integrated with a microstrip suppressing cell

In this paper, a high-efficiency class-F power amplifier (PA) is designed using integration between a low voltage p-HEMT transistor and a miniaturized microstrip suppressing cell. It results in nth...

A harmonic-suppressed high-efficiency class-F power amplifier with Elliptic-Function low-pass filter

In this paper, a novel method is developed in order to design a harmonic control circuit block using a compact microstrip low-pass filter (LPF) for a P-HEMT class-F PA. The design procedure is performed using Harmonic-Balance analysis. The key benefit is a novel compact defected Elliptic-Function resonator to design a LPF, which has a wide rejection band. The advantages of the presented method are the attenuation of nth harmonics in AM-AM distortion, high power added-efficiency (PAE) and more linearity in comparison with a conventional class-F PA. The experiment is carried out at 1.8GHz and shows a maximum PAE about 77% with 40dBm output power.

High Efficiency Class-F Power Amplifier Design

High Efficiency Class-F Power Amplifier Design

High-efficiency power amplifier design including input harmonic termination

This letter presents the design of a high-efficiency Class-F power amplifier in pseudomorphic high electron mobility transistor technology using a novel load-pull/source-pull simulation-based approach. The second harmonic input termination is shown to have a critical influence on performance, which is justified by the shape of the simulated waveforms. Experimental validation is carried out on a 2-GHz practical circuit using a medium-power packaged device. Two cases are compared both theoretically and experimentally: for the best and worst case second harmonic input terminations, 76% and 42% saturated power-added efficiency are measured, respectively. In addition, the worst case termination degrades the saturated C/I3 by 7.5dB.

Experimental class-F power amplifier design using computationally efficient and accurate large-signal pHEMT model

This paper presents an experimental high-efficiency class-F power amplifier (PA) design, which integrates Rhodes's efficient low-pass matching network topology with the charge conservative, robust, and accurate WREN/COBRA nonlinear pseudomorphic high electron-mobility transistor (pHEMT) model for optimal drain efficiency. Large-signal model verification is undertaken where one-tone, load-pull, and wireless code-division multiple-access baseband time-domain tests are compared for simulated and experimental cases. Following a detailed theoretical analysis, a class-F matching network is proposed that suppresses the necessary load harmonics and delivers maximum drain efficiency. Utilizing the GaAs pHEMT model in computer-aided design, a microstrip matching network layout was generated and built at 2 GHz. The drain efficiency recorded for the first-pass effort was 70.5% with the use of no post-fabrication circuit tuning. Excellent agreement is also observed between the PAs simulated and measured performance, thus highlighting the advantages of an accurate device model in PA design.