High-efficiency class-D Research Articles

Broadband underwater acoustic communications subsystem design

Increased bandwidth for acoustic communication places demanding requirements on the electroacoustic transducer, tuning and matching circuits, and amplifier design. This presentation investigates various aspects of the transmit channel with a focus on increasing bandwidth to the fullest extent possible. This includes using alternative transducer designs, polarization orientations, transduction materials, broadband tuning networks, and gain/phase control in high efficiency Class-D amplifiers. Comparisons between modeled and measured performance for systems that achieve 10, 20, and 30 kHz are considered.

Design of Novel Low-power and High-efficiency Class-D Audio Amplifier

Design of Novel Low-power and High-efficiency Class-D Audio Amplifier

Design of Novel Low-Power and High-Efficiency Class-d Audio Amplifier

Design of Novel Low-Power and High-Efficiency Class-d Audio Amplifier

High-efficiency Class-D Audio Amplifier using Second Order Delta Sigma Modulation

High-efficiency Class-D Audio Amplifier using Second Order Delta Sigma Modulation

A Low-Distortion High-Efficiency Class-D Audio Amplifier Based on Sliding Mode Control

This brief presents a low-power low-distortion high-efficiency class-D audio amplifier. The proposed architecture uses an integral sliding mode controller with a novel on-chip continuous current sensor. A full-bridge output stage is used to increase the output power, and an adaptive nonoverlapping-clock generation technique is presented to eliminate the short circuit current. Moreover, the switching frequency is chosen to achieve the highest possible linearity without efficiency degradation. The proposed architecture contains the minimum number of loop amplifiers to reduce quiescent current consumption. The proposed class-D audio amplifier has been implemented using 65-nm CMOS technology and operated from a single 2.7-V voltage supply (using thick oxide transistors) while occupying an active area of 0.31 mm 2 . Post-layout simulations show that the proposed architecture achieves a total harmonic distortion of 0.002% for a 2.2 Vpp 1-kHz input signal. It achieves a peak efficiency of 96% and a maximum output power of 400 mW at an 8-Ω differential load.

Embedded Single-Inductor Bipolar-Output DC–DC Converter in Class-D Amplifier for Low Common Noise

This paper proposes a high efficiency class-D amplifier (CDA) with embedded single-inductor bipolar output (SIBO) power module. The characteristics of SIBO converter's bipolar outputs not only suppress equivalent common-mode noise but also remove several large external bulky components in conventional boost supply CDA systems. Since bipolar outputs in the SIBO provide independent driving capability, CDA is capable of operating in both single-ended and bridge-tide load configurations. Furthermore, the proposed dynamic voltage boosting technique adjusts the SIBO output voltage level according to the CDA's output level with 5% power efficiency improvement. Peak total harmonic distortion plus noise performance is 0.012%. Peak power efficiency of SIBO and CDA is 89% and 93.2%, respectively.

Low-Power and High-Efficiency Class-D Audio Amplifier Using Composite Interpolation Filter for Digital Modulators

This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital deltasigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of 16 6 and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

A THD-reduction high-efficiency audio amplifier using inverter-based OTAs with filter-output feedback

This paper presents an integrated low-voltage THD-reduction high-efficiency class-D audio amplifier using inverter-based operational transconductance amplifiers (OTAs). We propose a negative feedback loop which can compensate for external perturbations and improving output precision. The compensator increases the audio-frequency loop gain, and leads to a better rejection of audio-frequency disturbances. The use of inverter-based OTA and comparator provides low-voltage operation and low-power dissipation. The audio amplifier operates with a 1.5V supply voltage with maximum power efficiency of 90%. The proposed class-D amplifier was implemented using a TSMC 0.18-μm 1P6M CMOS process, and the active chip area is 1.87mm2.

A 120 dB Dynamic Range 400 mW Class-D Speaker Driver With Fourth-Order PWM Modulator

High efficiency Class-D speaker drivers have become ubiquitous in battery driven mobile audio applications. Analog switching errors and timing jitter are known limitations to the dynamic range in these types of switching audio drivers. To overcome these limitations the Class-D architecture chosen in this paper provides a low 667 kHz pulse rate. This architecture is based on a 4th-order digital modulator with pulse-width modulation (PWM) feedback. The modulator loop processes the PWM signals at a high 24 MHz clock rate, and provides pulse edge timing resolution within a single clock period of the high-rate clock. Timing distortion errors due to uniform sampling of the low-rate PWM signals are reduced with the high forward loop gain of the digital modulator feedback loop. The driver receives a 22-bit digital audio input and combines the functionality of a high-fidelity digital-to-analog converter (DAC) with a speaker driver. It achieves 120 dB dynamic range over a 20 kHz bandwidth, provides 88% power efficiency while driving an 8 Ω speaker load, and consumes a total quiescent current of 2.4 mA.