High-speed Computer Research Articles

A fingerprinting structure model for Arabic document plagiarism detection

Plagiarism, which is a significant problem in the academic world worldwide, is particularly challenging to detect in Arabic due to the language's complex structure. Methodology: The ADPDM model and framework for detecting plagiarism in Arabic documents are presented in this dissertation. It is designed to detect plagiarism within academic contexts. By organizing documents logically into paragraphs, sentences, and words, the model seeks to establish a robust system that can identify duplicated content and search for similar documents within identifying corresponding sets. In particular, the study examines preprocessing techniques such as stop word removal, stemming, and rootage processing, followed by content-based methods utilizing fingerprinting and heuristic algorithms that are tailored to Arabic language features. To aid in efficient detection, the BKDR hash function is used for chunk having. To optimize computation time, heuristic algorithms are implemented at different levels of document representation, using metrics such as Longest Common Substring (LCS). To evaluate the ADPDM system, a corpus of 100 documents is utilized, which includes datasets from AraPlagDet and the Decision Support System (DSS). The performance of ADPDM is compared with other plagiarism detection methods using WCopyFind, but the latter has a higher computational speed than ADBDM. Its recall, precision, and F-measure values of 0. 78035, 0. 994264, and 0. 865688 respectively (ADPDM) are particularly notable for its ability to detect plagiarized content in Arabic documents. ADPDM is a successful anti-pluralist solution for Arabic text, even though it requires a longer processing time than WCopyFind.

Development of an acceleration method for sediment transport analysis with suspended load and bedload in an integrated river channel and coastal region

ABSTRACT To analyze sediment dynamics in estuaries during floods, a method capable of three-dimensional flows for high-resolution calculations is essential. However, such calculations are computationally intensive for midium to long term periods. We developed a high-speed calculation method for temporal variations in river bed topography and sediment discharge from river basins based on the average component acceleration (ACA) method by shortening the duration of floods. In the ACA method, the local components remained unchanged, and the temporal variation in the average components was amplified. This study developed the ACA method to calculate sediment transport, including bedload and suspended load, around an estuary. The ACA method enabled five times faster than the analysis of riverbed variations and the amount of sediment discharge compared to the conventiola non-accelerated analysis. It also accurately captured the widening of the estuarine sandbar opening during a flood demonstrating its utility for medium- to long-term riverbed-change analysisand its advantage over the other acceleration methods.

Anti-Interference All-Optical Logic Computing Based on a 2D Polarization-Sensitive Photodiode.

Optical logic operation is promising for ultrafast information processing and optical computing due to the high computation speed and low power consumption. However, conventional optical logic devices require either a complex structure and circuit design or a constant voltage supply, which impedes the development of high-density integrated circuits. Here, all-optical logic devices are designed using a self-powered polarization-sensitive photodiode of the GeSe homojunction, which is attributed to an anisotropic band structure and built-in electric field. The single photodiode can realize linear logic functions (AND, OR, NAND) and a nonlinear logic gate (XOR) by programming wavelength, power density, and polarization angle. Moreover, complex logic functions (XNOR, Y = IN1, Y = IN2, Y = IN1, and Y = IN2) can be achieved through integrating two photodiodes in parallel. In addition, the neural network algorithm is utilized to validate the feasibility of all-optical logic computing and anti-interference. This work proposes an avenue to design an all-optical reconfigurable logic operation in polarization-sensitive devices.

Analysis and selection of the structure of a multiprocessor computing system according to the performance criterion

Objectives. Analysis of the various architectures of computing systems (CSs) used in recent decades has allowed us to identify the most common structures. One of the key features is the use of mass-produced equipment to create data processing subsystems (for example, multicore processors and high-capacity semiconductor memory), as well as network equipment to build communication subsystems. This reduces hardware costs and allows typical or cluster configurations to be created, which is especially important for expensive CSs. The desire to achieve high computational speed and performance in such CSs requires minimizing the time to complete the task and balancing time delays both in data processing subsystems and in the communication subsystem which provides data transmission inside the CS. The aim of this work is to analyze computing modules (CMs) and structures on the basis of which the construction of cluster CSs is carried out.Methods. The main results of the work were obtained using methods of mathematical analysis and modeling.Results. The study considers the structure of modern multicore microprocessors as the basis for building CMs of cluster CSs. As the number of cores in the microprocessor structure increases, the communication network which unites them into a single structure becomes more complicated. It has been shown that in new developments of microprocessors, communication between cores is performed in the form of a network. The microprocessors themselves are MIMD structures in accordance with the well-known Flynn classification.Conclusions. The proposed method of selecting an effective structure of a CS allows us to obtain the optimal structure of a CS according to the criterion of performance.

Joint sparse subspace clustering via fast [formula omitted]-norm constrained optimization

Subspace clustering gains popularity in unsupervised machine learning due to its excellent dimensionality reduction capability and interpretability. Although existing research has made significant progress in clustering performance, it still faces two limitations. The first is the challenge of poor feature representation, which makes it hard to explore global structural sparsity. The second is the issue of long runtime, which makes it computationally inefficient. In this paper, we propose a joint sparse subspace clustering (JSSC) method to capture the structural features in the representation matrix via the ℓ2,0-norm constraint, which encourages sparsity across rows and leads to enhance clustering performance. In algorithms, an optimization scheme based on proximal alternating minimization (PAM) is developed, in which each subproblem has a closed-form solution, thus ensuring the effectiveness. Moreover, the convergence guarantee is rigorously proved in theory. Numerical experiments on image and hyperspectral datasets validate its excellent performance in terms of high accuracy with a high computational speed. In particular, the proposed method improves the clustering accuracy by at least 6.1% and the runtime by at least 14 times compared with competitors on the ORL dataset. The code of our proposed JSSC is available at https://github.com/zhudafa/JSSC.

Probabilistic photonic computing with chaotic light

Biological neural networks effortlessly tackle complex computational problems and excel at predicting outcomes from noisy, incomplete data. Artificial neural networks (ANNs), inspired by these biological counterparts, have emerged as powerful tools for deciphering intricate data patterns and making predictions. However, conventional ANNs can be viewed as “point estimates” that do not capture the uncertainty of prediction, which is an inherently probabilistic process. In contrast, treating an ANN as a probabilistic model derived via Bayesian inference poses significant challenges for conventional deterministic computing architectures. Here, we use chaotic light in combination with incoherent photonic data processing to enable high-speed probabilistic computation and uncertainty quantification. We exploit the photonic probabilistic architecture to simultaneously perform image classification and uncertainty prediction via a Bayesian neural network. Our prototype demonstrates the seamless cointegration of a physical entropy source and a computational architecture that enables ultrafast probabilistic computation by parallel sampling.

Unlocking multidimensional optical multicasting based on multi-mode PIN silicon waveguides

Multidimensional optical multicasting can increase the number of multicast optical channels and enhance spectrum utilization, which is crucial for future high-capacity optical networks and high-performance optical computing. However, simultaneously multicasting more channels results in higher energy density, which increases nonlinear loss within the waveguide and hinders practical applications. In this study, we introduce a reverse-biased PIN junction in the multi-mode waveguide to reduce nonlinear loss. Leveraging the multi-mode PIN silicon waveguide, we experimentally demonstrate a multidimensional multicasting strategy to simultaneously multicast an 80 Gb/s QPSK signal across 14 channels in both modes and wavelengths. Due to the PIN waveguide, the output power of the converted light after four-wave mixing (FWM) in three modes, TE0, TE1, and TE2, can be increased by 13 dB, 11.7 dB, and 7.7 dB, respectively. Furthermore, the 80 Gb/s QPSK signal can be multicast in three modes and from one wavelength channel to nine, seven, and two wavelength channels, respectively. All channels demonstrate clear constellation diagrams and error-free performance (biterrorrate<3.8×10−3). This demonstration provides a viable solution for multicasting in future mode and wavelength hybrid multiplexing optical networks, while also enhancing the capabilities of high-speed optical computing.

The influence of timescales and data injection schemes for reservoir computing using spin-VCSELs

Reservoir computing with photonic systems promises fast and energy efficient computations. Vertical emitting semiconductor lasers with two spin-polarized charge-carrier populations (spin-VCSEL), are good candidates for high-speed reservoir computing. With our work, we highlight the role of the internal dynamic coupling on the prediction performance. We present numerical evidence for the critical impact of different data injection schemes and internal timescales. A central finding is that the internal dynamics of all dynamical degrees of freedom can only be utilized if an appropriate perturbation via the input is chosen as data injection scheme. If the data is encoded via an optical phase difference, the internal spin-polarized carrier dynamics is not addressed but instead a faster data injection rate is possible. We find strong correlations of the prediction performance with the system response time and the underlying delay-induced bifurcation structure, which allows to transfer the results to other physical reservoir computing systems.

Advancements in Nanowire-Based Devices for Neuromorphic Computing: A Review.

Neuromorphic computing, inspired by the highly interconnected and energy-efficient way the human brain processes information, has emerged as a promising technology for post-Moore's law era. This emerging technology can emulate the structures and the functions of the human brain and is expected to overcome the fundamental limitation of the current von Neumann computing architecture. Neuromorphic devices stand out as the key components of future electronic systems, exhibiting potential in shaping the landscape of neuromorphic computing. Especially, nanowire (NW)-based neuromorphic devices, with their advantages of high integration, high-speed computing, and low power consumption, have recently emerged as candidates for neuromorphic computing technology. Here, a critical overview of the current development and relevant research in the field of NW-based neuromorphic devices are provided. Neuromorphic devices based on different NW materials are comprehensively discussed, including Ag NW-based, organic NW-based, metal oxide NW-based, and semiconductor NW-based devices. Finally, as a foresight perspective, the potentials and the challenges of these NW-based neuromorphic devices for use as future brain-like electronics are discussed.

Leveraging multiplexed metasurfaces for multi-task learning with all-optical diffractive processors.

Diffractive Neural Networks (DNNs) leverage the power of light to enhance computational performance in machine learning, offering a pathway to high-speed, low-energy, and large-scale neural information processing. However, most existing DNN architectures are optimized for single tasks and thus lack the flexibility required for the simultaneous execution of multiple tasks within a unified artificial intelligence platform. In this work, we utilize the polarization and wavelength degrees of freedom of light to achieve optical multi-task identification using the MNIST, FMNIST, and KMNIST datasets. Employing bilayer cascaded metasurfaces, we construct dual-channel DNNs capable of simultaneously classifying two tasks, using polarization and wavelength multiplexing schemes through a meta-atom library. Numerical evaluations demonstrate performance accuracies comparable to those of individually trained single-channel, single-task DNNs. Extending this approach to three-task parallel recognition reveals an expected performance decline yet maintains satisfactory classification accuracies of greater than 80 % for all tasks. We further introduce a novel end-to-end joint optimization framework to redesign the three-task classifier, demonstrating substantial improvements over the meta-atom library design and offering the potential for future multi-channel DNN designs. Our study could pave the way for the development of ultrathin, high-speed, and high-throughput optical neural computing systems.

Research on Techniques for Enhancing the Speed of Low-Power Operational Amplifier

In the context of low utilization, this paper explores various techniques for enhancing the speed of operational amplifier (OA). The main text delves into three methods to gain equilibrium: fully differential operational amplifier (FDA), twostage operational transconductance amplifier (OTA), and a novel high-speed calculation system architecture employing a “rhombus crystal tube.” The FDA improves speed by minimizing noise and enhancing bandwidth and output voltage swing, without increasing power consumption. The design of the two-stage OTA combines the characteristics of a differential amplifier and a telescopic amplifier, optimizing gain and slew rate through Miller compensation and noise gain manipulation, thereby achieving high-speed performance. A novel high-speed operational amplifier structure employs diamond transistors to supply substantial current for capacitor charging, enhancing the slew rate and overall speed. Throughout the text, these methods are presented as a means to jointly promote high speed, low power consumption, and the handling of a significant number of transistors. To further increase the speed, the size of the microcrystalline tube is crucial. The research direction is outlined, and while the design equipment is in the foreground, there remains room for progress, especially in applications for large-scale electrical models. Future research aims to enhance the power efficiency of circuits, making them more practical and efficient. This study provides valuable insights into balancing power consumption and speed in advanced electronic devices.

Аналіз застосування технологій ПЛІС в складі IoT

The subject of study in this article and work is the modern technologies of programmable logic devices (PLD) classified as FPGA, and the peculiarities of its application in Internet-of-Things domain at different architectural layers of the implementation, as well as the elements of decision making during choosing of appropriate solutions based on FPGA in the context of implementation of IoT tasks with the requirements of intensive computations. The goal is to analyze the possibilities and peculiarities of the application of technology of programmable logic devices as part of the modern architecture of the Internet of Things with the improvement of decision making process during the choosing of appropriate technical solutions for the use of FPGA with taking into account the types of tasks. Tasks: to analyze the current state of demands regarding the use of FPGA technology in IoT projects; to analyze the challenges and limitations for the application of FPGA technology at different layers during the prototyping of IoT infrastructure; to propose ways of the use of FPGA technology in the IoT infrastructure with the use of high-speed computations; to analyze the advantages and disadvantages of the proposed approaches of integration of FPGA technology; to provide recommendations and determine the further direction of the research of the use of FPGA technology as a part of the IoT infrastructure considering of AI/ML tasks; to provide a practical example of the use of FPGA technology during the creation of a high-performance IoT system. According to the tasks, the following results were obtained. The analysis of the current state of the use of FPGA technology in IoT projects is performed, that showed the significant potential of these technologies for the implementation of high-speed computations in Internet of Things systems. A classification of the ways of applying FPGA in the tasks of real-time data processing and implementation of neural networks is proposed. The set of limitations of the possibility of FPGA technology applying at different layers of IoT infrastructure is defined. It includes high equipment costs, the need for specific design skills, limitations in energy consumption, and the complexity of the integration with existing systems. The practical example of the use of the IoT system with the implementation of high-intensive computations is provided. Conclusions. The main contribution and scientific novelty of the obtained results is that the conducted analysis allows to make a decision about the possibility of applying programmable logic in the construction of IoT projects and home automation systems. Based on the proposed classification of types of IoT tasks, there is a possibility of making a decision on the application of FPGA technology as a separate integrated circuit in the system or using a complete instance of FPGA as a Service in the cloud environment.

120 GOPS Photonic tensor core in thin-film lithium niobate for inference and in situ training

Photonics offers a transformative approach to artificial intelligence (AI) and neuromorphic computing by enabling low-latency, high-speed, and energy-efficient computations. However, conventional photonic tensor cores face significant challenges in constructing large-scale photonic neuromorphic networks. Here, we propose a fully integrated photonic tensor core, consisting of only two thin-film lithium niobate (TFLN) modulators, a III-V laser, and a charge-integration photoreceiver. Despite its simple architecture, it is capable of implementing an entire layer of a neural network with a computational speed of 120 GOPS, while also allowing flexible adjustment of the number of inputs (fan-in) and outputs (fan-out). Our tensor core supports rapid in-situ training with a weight update speed of 60 GHz. Furthermore, it successfully classifies (supervised learning) and clusters (unsupervised learning) 112 × 112-pixel images through in-situ training. To enable in-situ training for clustering AI tasks, we offer a solution for performing multiplications between two negative numbers.

A certain examination on heterogeneous systolic array (HSA) design for deep learning accelerations with low power computations

Acceleration techniques play a crucial role in enhancing the performance of modern high-speed computations, especially in Deep Learning (DL) applications where the speed is of utmost importance. One essential component in this context is the Systolic Array (SA), which effectively handles computational tasks and data processing in a rhythmic manner. Google's Tensor Processing Unit (TPU) leverages the power of SA for neural networks. The core SA's functionality and performance lies in the Computation Element (CE), which facilitates parallel data flow. In our article, we introduce a novel approach called Proposed Systolic Array (PSA), which is implemented on the CE and further enhanced with a modified Hybrid Kogge Stone adder (MHA). This design incorporates principles to expedite computations by rounding and extracting data model in SA as PSA-MHA. The PSA, utilizing a data flow model with MHA, significantly accelerates data shifts and control passes in execution cycles. We validated our approach through simulations on the Cadence Virtuoso platform using 65 nm process technology, comparing it to the General Matrix Multiplication (GMMN) benchmark. The results showed remarkable improvements in the CE, with a 30.29 % reduction in delay, a 23.07 % reduction in area, and an 11.87 % reduction in power consumption. The PSA outperformed these improvements, achieving a 46.38 % reduction in delay, a 7.58 % reduction in area, and an impressive 48.23 % decrease in Area Delay Product (ADP). To further substantiate our findings, we applied the PSA-based approach to pre-trained hybrid Convolutional and Recurrent (CNN-RNN) neural models. The PSA-based hybrid model incorporates 189 million Multiply-Accumulate (MAC) units, resulting in a weighted mean architecture value of 784.80 for the RNN component. We also explored variations in bit width, which led to delay reductions ranging from 20.17 % to 30.29 %, area variations between 13.08 % and 32.16 %, and power consumption changes spanning from 11.88 % to 20.42 %.

Fast simulation strategy for capacitively-coupled plasmas based on fluid model

Fluid simulations are widely used in optimizing the reactor geometry and improving the performance of capacitively coupled plasma (CCP) sources in industry, so high computation speed is very important. In this work, a fast method for CCP fluid simulation based on the framework of Multi-physics Analysis of Plasma Sources (MAPS) is developed, which includes a multi-time-step explicit upwind scheme to solve electron fluid equations, a semi-implicit scheme and an iterative method with in-phase initial value to solve Poisson's equation, an explicit upwind scheme with limited artificial diffusion to solve heavy particle fluid equations, and an acceleration method based on fluid equation modification to reduce the periods required to reach equilibrium. In order to prove the validity and efficiency of the newly developed method, benchmarking against COMSOL and comparison with experimental data have been performed in argon discharges on the Gaseous Electronics Conference (GEC) reactor. Besides, the performance of each acceleration method is tested, and the results indicated that the multi-time-step explicit Euler scheme can effectively decline the computational burden in the bulk plasma and reduce the time cost on the electron fluid equations by half. The in-phase initial value method can greatly decrease the iteration times required to solve linear equations and lower the computational time of Poisson's equation by 77 %. The acceleration method based on equation modification can reduce the periods required to reach equilibrium by two-thirds.

All-optical reconfigurable optical neural network chip based on wavelength division multiplexing.

Optical computing has become an important way to achieve low power consumption and high computation speed. Optical neural network (ONN) is one of the key branches of optical computing due to its wide range of applications. However, the integrated ONN schemes proposed in previous works have some disadvantages, such as fixed network structure, complex matrix-vector multiplication (MVM) unit, and few all-optical nonlinear activation function (NAF) methods. Moreover, for the most compact MVM schemes based on wavelength division multiplexing (WDM), it is infeasible to employ intrinsic nonlinear effects to implement NAF, which brings frequent O-E-O conversion in ONN chips. Besides, it is also hard to realize a reconfigurable ONN with coherent MVMs, while it is much easier to implement in WDM schemes. We propose for the first time an all-optical silicon-based ONN chip based on WDM by adopting a new adjustment mechanism: optical gradient force (OGF). The proposed scheme is reconfigurable with tunable layers, variable neurons per layer, and adjustable NAF curves. In the task of classification of the MNIST dataset, our chip can realize an accuracy of 85.13% with 4 full-connected layers and only 50 neurons in total. In addition, we analyze the influence of the OGF-based NAF under fabrication errors and propose a calibration method. Compared to the previous works, our scheme has the two-fold advantages of compactness and reconfiguration, and it paves the way for the all-optical ONN based on WDM and opens the path to unblocking the bottleneck of integrated large-dimension ONNs.

Vibration characteristics of a pretwisted multi-blade-shaft system with blade stiffness mismatch

The substructure mode synthesis method is employed to establish a mathematical model in this paper. The main body is represented by shaft, while the branching components are represented by blades. By solving this model, accurate frequency results of the rotating blade-shaft system are obtained at a high computational speed that meets engineering requirements. The resulting mode diagram aligns with that of the finite element model. Utilizing this model, the stiffness detuning of the rotating blade shaft system is investigated through a combination of surrogate modeling and ant colony algorithm, leading to several significant findings. It is observed that an increase in the standard deviation of stiffness detuning amplifies the length of frequency interval while minimally affecting the frequency mean value. Moreover, an increase in average stiffness expands the interval length for system frequencies. Additionally, higher rotational speeds reduce the interval length for blade-dominant vibrations but extend it for shaft-dominant vibrations.

Enhanced intrusion detection framework for securing IoT network using principal component analysis and CNN

ABSTRACT The Internet of Things (IoT) has transformed our world by connecting smart devices and enabling seamless interactions. This reliance, however, has led to new security issues and types of attacks. It is of the utmost importance to safeguard the security of IoT networks, with network intrusion detection systems (NIDS) having a significant impact. This paper proposes a novel approach integrating Principal Component Analysis (PCA), Pearson Correlation Coefficient (PCC), and Convolutional Neural Network (CNN) to overcome these security issues. Our innovative method reduces data dimensionality and selects highly correlated features using PCC and PCA, addressing overfitting and improving model performance while maintaining high computational speed and low costs. Our approach uniquely distinguishes between benign and threat packets by employing 1D-CNN, 2D-CNN, and 3D-CNN algorithms trained on Edge-IIoTset and NSL-KDD benchmark datasets. The findings from our experiments indicate that the proposed framework significantly enhances accuracy, precision, recall, and F1-score compared to existing models for both binary and multiclass classifications. Our binary classification models achieved exceptional performance, with an average accuracy of 99.76%, 99.79% precision, 99.89% recall, and 99.85% F1-score on the Edge-IIoTset dataset. On the NSL-KDD dataset, the models attained 99.20% accuracy, 98.07% precision, 97.95% recall, and 97.71% F1-score. For multiclass classification, the proposed model demonstrated an average accuracy of 99.41%, precision of 98.61%, recall of 98.49%, and an F1-score of 98.56% on the Edge-IIoTset dataset. On the NSL-KDD dataset, the model achieved 92.43% accuracy, 93.21% precision, 93.60% recall, and a 93.7% F1-score. Our research introduces a significant advancement that substantially improves NIDS capabilities, making IoT networks safer and more connected.

A platinum degradation reaction model for the high-speed computation in the integrated fuel cell system simulator and its validation by the accelerated stress test data of the commercial fuel cells

A model to estimate the Pt degradation rate and the numerical methods for high-speed computation were developed for the year-long and system-scale durability simulation in an acceptable accuracy and computational time. The parameters in the model were determined to reproduce the published accelerated stress test (AST) data with the 1 cm2 MEA of 2nd-generation MIRAI (MIRAI-2), state-of-the-art commercial fuel cell electric vehicle. Accuracy of the simulation results was validated by the published data of the ASTs with the FC stack having 13 cells of MIRAI-2, which consists of the 30000 startup-shutdown cycles in 0–0.88 V and 73000 acceleration-deceleration cycles in 0.6–0.9 V. The experimental and simulation results of the residual fractions of the electrochemical surface area in the cathode catalyst layer after the ASTs were 68 and 69 %, respectively, and they agreed in an acceptable accuracy. It was confirmed from the AST simulation with the different initial particle size distributions that even the small number of the coarse particles significantly accelerated the Pt degradation. The developed model was integrated to the FC system simulator the current authors had presented and a remarkable computational speed for the year-long and system-scale durability simulation was demonstrated with a normal laptop computer.

A platinum degradation reaction model for the high-speed computation in the integrated fuel cell system simulator and its validation by the accelerated stress test data of the commercial fuel cells

A model to estimate the Pt degradation rate and the numerical methods for high-speed computation were developed for the year-long and system-scale durability simulation in an acceptable accuracy and computational time. The parameters in the model were determined to reproduce the published accelerated stress test (AST) data with the 1 cm2 MEA of 2nd-generation MIRAI (MIRAI-2), state-of-the-art commercial fuel cell electric vehicle. Accuracy of the simulation results was validated by the published data of the ASTs with the FC stack having 13 cells of MIRAI-2, which consists of the 30000 startup-shutdown cycles in 0–0.88 V and 73000 acceleration-deceleration cycles in 0.6–0.9 V. The experimental and simulation results of the residual fractions of the electrochemical surface area in the cathode catalyst layer after the ASTs were 68 and 69 %, respectively, and they agreed in an acceptable accuracy. It was confirmed from the AST simulation with the different initial particle size distributions that even the small number of the coarse particles significantly accelerated the Pt degradation. The developed model was integrated to the FC system simulator the current authors had presented and a remarkable computational speed for the year-long and system-scale durability simulation was demonstrated with a normal laptop computer.