High Bandwidth Signal Processing Research Articles

Noise and distortion analysis of dual frequency comb photonic RF channelizers.

Dual frequency combs are emerging as highly effective channelizers for radio frequency (RF) signal processing, showing versatile capabilities in various applications including Fourier signal mapping, analog-to-digital conversion and sub-sampling of sparse wideband signals. Although previous research has considered the impact of comb power and harmonic distortions in individual systems, a rigorous and comprehensive performance analysis is lacking, particularly regarding the impact of phase noise. This is especially important considering that phase noise power increases quadratically with comb line number. In this paper, we develop a theoretical model of a dual frequency comb channelizer and evaluate the signal to noise ratio limits and design challenges when deploying such systems in a high bandwidth signal processing context. We show that the performance of these dual comb based signal processors is limited by the relative phase noise between the two optical frequency combs, which to our knowledge has not been considered in previous literature. Our simulations verify the theoretical model and examine the stochastic noise contributions and harmonic distortion, followed by a broader discussion of the performance limits of dual frequency comb channelizers, which demonstrate the importance of minimizing the relative phase noise between the two frequency combs to achieve high signal-to-noise ratio signal processing.

Multidimensional fiber echo state network analogue

Optical neuoromorphic technologies enable neural network-based signal processing through a specifically designed hardware and may confer advantages in speed and energy. However, the advances of such technologies in bandwidth and/or dimensionality are often limited by the constraints of the underlying material. Optical fiber presents a well-studied low-cost solution with unique advantages for low-loss high-speed signal processing. The fiber echo state network analogue (FESNA), fiber-based neuromorphic processor, has been the first technology suitable for multichannel high bandwidth (including THz) and dual-quadrature signal processing. Here we propose the multidimensional FESNA (MD-FESNA) processing by utilizing multi-mode fiber non-linearity. Thus, the developed MD-FESNA is the first neuromorphic technology which augments all aforementioned advantages of FESNA with multidimensional spatio-temporal processing. We demonstrate the performance and flexibility of the technology on the example of prediction tasks for hyperchaotic systems. These results will pave the way for a high-speed neuromorphic processing of multidimensional tasks, hardware for spatio-temporal neural networks and open new application venues for fiber-based spatio-temporal multiplexing.

Optical Spectral Slicing Based Reconfigurable and Tunable Microwave Photonic Filter

Multiband microwave photonic filters (MPFs) are extensively required in emerging multifunction RF systems and high-performance radar systems. In this article, we present a reconfigurable and tunable multiband MPF. The flexible amplitude and phase controls of the multiband MPF can be achieved via optical spectral slicing by way of a programmable sampling function, i.e., varying the number of samples or the duty cycle of each sample. We verify that the number of uniform passbands can be adjusted (we obtain up to six passbands) and demonstrate a frequency tuning range of up to 432 MHz for a uniform triple-passband MPF. We also show a highly chirped triple-passband MPF with respective in-band chirps up to 30.0 ns/GHz, 42.1 ns/GHz, and 22.8 ns/GHz. These latter results illustrate a potential way to implement highly chirped multiband MPFs for high bandwidth signal processing applications.

Fiber echo state network analogue for high-bandwidth dual-quadrature signal processing.

All-optical platforms for recurrent neural networks can offer higher computational speed and energy efficiency. To produce a major advance in comparison with currently available digital signal processing methods, the new system would need to have high bandwidth and operate both signal quadratures (power and phase). Here we propose a fiber echo state network analogue (FESNA) - the first optical technology that provides both high (beyond previous limits) bandwidth and dual-quadrature signal processing. We demonstrate applicability of the designed system for prediction tasks and for the mitigation of distortions in optical communication systems with multilevel dual-quadrature encoded signals.

Inside Front Cover: Self‐Assembly of SiO2 Nanowires and Si Microwires into Hierarchical Heterostructures on a Large Scale (Adv. Mater. 8/2005)

AbstractThe inside cover shows a scanning electron micrograph of a novel hierarchical heterostructures, as reported by Hu and co‐workers on p. 971. The heterostructures are formed from Si core microwires covered by dense, aligned SiO2 nanowires, thus forming multiple junctions to the cores. The inset shows a schematic of the Sn‐catalyzed vapor–liquid–solid growth mechanism. These materials are envisaged to become important for optical fibers, low‐dimensional waveguides, scanning near‐field optical microscopes and high‐bandwidth optical signal processing devices.

An architecture and compiler for scalable on-chip communication

A dramatic increase in single chip capacity has led to a revolution in on-chip integration. Design reuse and ease of implementation have became important aspects of the design process. This paper describes a new scalable single-chip communication architecture for heterogeneous resources, adaptive system-on-a-chip (aSOC) and supporting software for application mapping. This architecture exhibits hardware simplicity and optimized support for compile-time scheduled communication. To illustrate the benefits of the architecture, four high-bandwidth signal processing applications including an MPEG-2 video encoder and a Doppler radar processor have been mapped to a prototype aSOC device using our design mapping technology. Through experimentation it is shown that aSOC communication outperforms a hierarchical bus-based system-on-chip (SoC) approach by up to a factor of five. A VLSI implementation of the communication architecture indicates clock rates of 400 MHz in 0.18-/spl mu/m technology for sustained on-chip communication. In comparison to previously-published results for an MPEG-2 decoder, our on-chip interconnect shows a runtime improvement of over a factor of four.

Synchroscalar

We present Synchroscalar, a tile-based architecture forembedded processing that is designed to provide the flexibilityof DSPs while approaching the power efficiency ofASICs. We achieve this goal by providing high parallelismand voltage scaling while minimizing control and communicationcosts. Specifically, Synchroscalar uses columnsof processor tiles organized into statically-assignedfrequency-voltage domains to minimize power consumption.Furthermore, while columns use SIMD control to minimizeoverhead, data-dependent computations can besupported by extremely flexible statically-scheduled communicationbetween columns.We provide a detailed evaluation of Synchroscalar includingSPICE simulation, wire and device models, synthesisof key components, cycle-level simulation, andcompiler- and hand-optimized signal processing applications.We find that the goal of meeting, not exceeding, performancetargets with data-parallel applications leads todesigns that depart significantly from our intuitions derivedfrom general-purpose microprocessor design. Inparticular, synchronous design and substantial global interconnectare desirable in the low-frequency, low-powerdomain. This global interconnect supports parallelizationand reduces processor idle time, which are critical to energyefficient implementations of high bandwidth signalprocessing. Overall, Synchroscalar provides programmabilitywhile achieving power efficiencies within 8-30X ofknown ASIC implementations, which is 10-60X better thanconventional DSPs. In addition, frequency-voltage scalingin Synchroscalar provides between 3-32% power savingsin our application suite.

Application of High Temperature Superconductors in Passive Microwave Devices

The front end of a microwave communications system is assembled from circuit elements comprising antennae, local oscillator, mixer and filters. Interconnection is by transmission line, into which delay may be incorporated. All of these components can, with advantage, be implemented in superconducting material. Superconductors, when operating below their cross-over frequency, have values of surface resistance lower than those for normal metals such as copper and silver. This results in lower insertion loss for microwave components, allowing the design of smaller, more compact, yet at the same time more complicated, devices. The non-dispersive nature of superconductors can also be an advantage in enabling very high bandwidth signal processing. High temperature superconductors (HTS) allow operating temperatures in the liquid nitrogen range, not too far below the ambient temperature in many communications satellites. The Oxford microwave programme has concentrated on the implementation of all of the above devices in thin-film HTS, mainly Tl-2212, on a variety of substrates. The film fabrication, and performance of delay lines, antenna-mixers, resonators, filters and a voltage-controlled oscillator, are described.