Heterostructure Insulated-gate FETs Research Articles

The effect of surface oxidation status on 0.35‐μm HIGFET characteristics

AbstractThe paper discusses the effect of the oxide film formed on the surface of GaAs substrate of the gate metal of 0.35‐μm WSi gate HIGFET (Heterostructure Insulated Gate FET) on its characteristics. An optimized SiON film (refractive index 1.58) deposited by plasma CVD method onto the entire HIGFET surface was used as a passivation film to protect the gate metal substrate [1]. In order to modify oxidation conditions on the GaAs surface, two oxidation methods were utilized: low‐temperature oxidation (further referred to as UV/O3 oxidation), which utilizes O3 generated from the atmospheric O2 by applying ultraviolet irradiation produced by a mercury lamp (184.9 and 253.7 nm), and high‐temperature thermal oxidation performed at 400 °C in air. Based on the results of spectroscopic ellipsometry, Auger spectrometry, and XPS analyses, it was the UV/O3 method that led to formation of thermally unstable SiON/GaAs oxide film on the GaAs interface layer due to higher concentration of As oxide. During the heat treatment, involved in the FET fabrication process, As oxide would react with SiON resulting in its thermal decomposition and formation of free As. On the other hand, the oxide film formed during thermal oxidation at 400 °C led to formation of more thermally stable SiON/GaAs oxide film/GaAs interface layer due to higher concentration of Ga oxide via decomposition of thermally unstable As oxide during the heating process. In either case, the presence of GaAs oxide film along with free As in the SiON passivation film deposited onto GaAs substrate is believed to be a major reason for declining FET characteristics. This suggests that removal of the oxide film from the surface prior to depositing a passivation film is required. The improved stability of the FET characteristics was achieved by removing the GaAs oxide film using wet etching with BHF during the FET fabrication process. © 2001 Scripta Technica, Electron Comm Jpn Pt 2, 84(7): 46–57, 2001

Optimum Au/WSi 0.3 μm-gate-length n-HIGFETs for microwave power applications in X band

An investigation of pseudomorphic Ga/sub 0.25/Al/sub 0.75/As/Ga/sub 0.80/In/sub 0.20/As/GaAs heterostructure insulated-gate FETs (HIGFET) far microwave power applications is presented. Devices have been fabricated using Au/WSi self-aligned gate technology with SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> sidewalls. The fabrication process has been optimized in order to realize 0.3 μm gate-length transistors with reduced short-channel effects and improved rf power performance. dc and rf extracted parameters suggest very attractive capabilities: for N-type HIGFET, a current density of 460 mA/mm and an extrinsic transconductance of 480 mS/mm are obtained. Measurements at 10 GHz using a load-pull power setup have been carried out: 300 mW/mm maximum output power, 14 dB linear gain, and 65% PAE, for low Vds (3 V) value. To our knowledge, these power results are the first reported for 0.3 μm-HIGFFTs.

Heterostructure field effect transistors grown by MOVPE

Metalorganic vapor phase epitaxy (MOVPE) has received much attention as an important technique for the growth of III–V compound semiconductor layers for electronic and optoelectronic applications. The move of the AlGaAs/GaAs heterostructure field effect transistor (HFET) technology from research to production will be discussed in this paper. In addition developments such as undoped AlGaAs/GaAs heterostructure insulated gate FET (HIGFET) for digital applications will be reported. These FET offer the possibility of easy production of both n- and p-type channel devices on the same layer structure. The improvements in the performance of electronic devices such as latticematched InP-based n-channel HFET grown by MOVPE will be shown. Especially for p-type structures a reduction in the effective hole mass due to strain causes improvements in the operation of p-type pseudomorphic devices. These InP HFET grown by MOVPE are favorable candidates for the application in high-performance optoelectronic integrated circuits in the 1.1–1.65 μm region.

The influence of gate-feeder/mesa-edge contacting on sidegating effects in In/sub 0.52/Al/sub 0.48/ As/In/sub 0.53/Ga/sub 0.47/As heterostructure FET's

Sidegating effects in InAlAs/InGaAs heterostructure field effect transistors (HFETs) were experimentally investigated. Two different configurations of gate feeder across the mesa edges are compared in In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As. HFETs. HEMTs and heterostructure insulated-gate FETs (HIGFETs) were fabricated, each with different gate-feeder configurations. HFETs with the gate air bridge over the mesa edge can maintain 99% of the drain-source (I/sub ds/) current level at sidegate voltages (V/sub sg/) extending up to -30 V, while the non-air-bridge configuration of HFETs show a 30% drop of I/sub ds/ at the same V /sub sg/. This significant discrepancy of sidegating effect is attributed to depletion region modulation at the mesa edge below the gate feeder. By lifting the gate feeder above the mesa step, sidegating is reduced, which suggests the channel/substrate trap effects are negligibly small. The role of air-bridge structures in determining the sidegating characteristics is discussed. >

Direct-coupled FET logic circuits on InP

A process technology for direct-coupled FET logic (DCFL) circuits on InP substrates, based on enhancement-mode InGaAs/InAlAs heterostructure-insulated-gate FETs (HIGFETs) is discussed. Its performance was demonstrated by fabricating 11- and 19-stage ring oscillators. The circuits were fabricated on undoped lattice-matched heterostructures grown by molecular beam epitaxy (MBE), using a refractory-gate process with self-aligned sidewalls to achieve a lightly-doped-drain (LDD) structure. For a gate length of 1.2 mu m, with V/sub dd/=2 V, the best propagation delay observed was 23 ps/stage, with associated power of 2.2 mW/stage. >

0.2- mu m gate AlGaAs/GaAs HIGFET (heterostructure insulated gate FET) with a

A GaAs HIGFET with a K value of 1 A/V/sup 2//mm has been developed for application to high-speed LSIs. A description is presented of the three essential processes for fabricating this HIGFET: (1) a gate process using a

Threshold voltage of submicron Ga0.47In0.53As HIGFETs

Presents threshold voltage data for Al/sub 0.48/In/sub 0.52/As/Ga/sub 0.47/In/sub 0.53/As/InP heterostructure insulated gate FETs (HIGFETs) with gate lengths from 1.2 mu m to 0.4 mu m. The refractory-gate, self-aligned fabrication process was applied to MBE-grown structures with 300 AA Ga/sub 0.47/In/sub 0.53/As channels and semi-insulating superlattice buffers to achieve sharp pinchoff with excellent threshold uniformity. HIGFETs with L/sub g/=1.2 mu m showed a threshold voltage of -0.076+or-0.019 V, making them well-suited to application in direct-coupled FET logic (DCFL) circuits.

DC and microwave performance of submicrometer InGaAs HIGFETs

The DC and microwave performance of InAlAs/InGaAs/InP heterostructure insulated-gate FETs (HIGFETs) with gate lengths down to 0.3 mu m is reported. A non-recessed-gate process with refractory airbridge gates and self-aligned contact implants was used to assure minimum threshold variation, minimum parasitic resistance, and minimum gate leakage current. These devices offer improved threshold uniformity while preserving the high-speed characteristic of In/sub 0.53/Ga/sub 0.47/As channels. An average of eight HIGFETs with 1.1- mu m gate length showed peak DC transconductance of 456+or-5 mS/mm and on-state resistance of 1.14+or-0.02 Omega -mm. The output conductance was relatively high, about 60 mS/mm without wide-bandgap buffers. Full S-parameter measurements from 0.5 to 25.5 GHz were used to determine the unity-current-gain frequency, f/sub t/=28 GHz, and the unity-power-gain frequency, f/sub mag/=27 GHz. HIGFETs with 0.6- mu m gate length showed improved DC and RF performance, with peak transconductance of 528+or-3 mS/mm, on-state resistance of 0.84+or-0.2 Omega -mm, f/sub t/=45 GHz, and f/sub mag/=36 GHz. Some short-channel effect is evident in the output conductance. HIGFETs with 0.3- mu m gate length showed severe short-channel effect. With the addition of a wide-bandgap buffer layer and adjustments to the implant process, control of the short-channel effect at smaller gate lengths should be practical.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

OMVPE growth of AlInAs and device quality AlInAs-based heterostructures

High-quality AlInAs exhibiting excellent photoluminescence and having residual electron concentrations as low as 7×1015 cm−3 with electron mobilities as high as 1900 cm2/V·s has been grown by OMVPE. AlInAs/InP heterostructures are shown to be type II heterojunctions with electron mobilities as high as 4500 cm2/V·s at 300 K. This material was used for the fabrication of high-gain heterostructure MESFETs and heterostructure insulated-gate FETs (HIGFETs). AlInAs/InP MESFETs have DC transconductances as high as 220 mS/mm and microwave gains as high as 11.5 dB at 10 GHz with an max of 42 GHz. AlInAs/InP/GaInAs HIGFETs, however, show high transconductances up to 470 mS/mm at 300 K and 530 mS/mm at 77 K. These are some of the highest performance FETs fabricated on OMVPE-grown material.

Quantum well p-channel AlGaAs/InGaAs/GaAs devices for complementary heterostructure FET applications

The low extrinsic transconductance of the p-channel self-aligned gate heterostructure insulated gate FETs (HIGFETs), resulting from low hole mobility and high source resistance, has limited the performance of these devices. Results are presented for such devices fabricated on an AlGaAs/InGaAs/GaAs strained quantum-well structure. Transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, were achieved in 0.8- mu m devices at room temperature. At 77 K 181 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively, were obtained in 1- mu m devices. The highest hole field effect mobilities deduced from the device data are 860 and 2815 cm/sup 2//V at room temperature and 77 K, respectively. These device parameters are believed to be the best reported to date, suggesting that a viable complementary heterostructure FET technology based on this structure can be realized.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Ionizing Radiation Hardness of GaAs Technologies

The radiation response of several GaAs technologies to ionizing radiation has been investigated. Self-aligned gate (SAG) E/D GaAs Metal Semiconductor FET (MESFET), SAG AlGaAs/GaAs Modulation Doped FET (MODFET), and complementary-AlGaAs/GaAs Heterostructure Insulated Gate FET (C-HIGFET) devices and circuits all demonstrated minimal sensitivity to total dose effects to 250 Mrad(GaAs). The heterostructure based technologies showed superior tolerance to high dose rate exposures, with upset levels exceeding 1×1010 rads(GaAs)/s.