Integration Of Heterogeneous Systems Research Articles

Fine-Pitch Copper Nanowire Interconnects for 2.5/3D System Integration

AbstractHeterogeneous integration is a key driver within the field of advanced electronic packaging. The realization of tomorrow’s highly integrated electronic systems depends on the combination and compatibility of various integration technologies at the same hierarchy level. The adoption of novel bonding technologies for a cost-effective realization of multi-chiplet systems is a key aspect. Cu nanowire (NW) interconnects exhibit distinct advantages in terms of their scalability down to a few micrometers, the resulting joint properties and moderate demands with respect to the surface preparation, and the cleanliness of the bonding environment. No solder or flux is required for the bonding process, but the NW bumps still can compensate low height differences. The bonding process can be carried out near room temperature under ambient conditions. We demonstrate the technological possibility to integrate the Cu-NWs for a bump processing scheme including the Cu seed etching on 300 mm wafer for the first time. This paper focuses on the microstructure evaluation and the shear test of the formed Cu-NW interconnects fabricated under ambient conditions within a few seconds. The microstructure analysis shows the intact bonded interconnects and reveals high-resolution details of Cu-NWs. The shear strength of the formed interconnects varies between 4.6 MPa and 90.5 MPa depending on the bonding and annealing conditions. Overall, the results of this study highlight the potential of Cu-NW interconnects for future 3D heterogeneous system integration.

Low insertion loss interposer approach for RF applications based on commercial LTCC tape, alkaline-free glass and printed metallization

Materials with high RF performance are in increasing demand due to the needs of modern telecommunications. Glass and low-temperature co-fired ceramics (LTCCs) are both interesting candidates for the design of complex signal transmission systems. Glass can be processed in large panels, and has suitable structure dimensions for silicon processing, but its multilayer capability is limited. LTCC is a mature technology for complex multilayer assemblies, but the structure dimensions and conductor line resolution are restricted by the need to use screen printing technology. The approach presented here combines the advantages of both technological domains: a thin glass sheet is bonded with no additional material to a LTCC multilayer ceramic and sintered to form a tight joint. Metallization of the glass is created using printable pastes and electroplating. Two fabrication routes are compared: etching of printed thick film metal layers, and semi-additive structuring. The results of RF measurements show a low attenuation per unit length for both types of metallization, indicating that our approach is a promising one for the integration of heterogeneous systems of RF transmission modules.

Packaging at Nanoscale Will Advance Future Heterogeneous System Integration [Guest Editorial

Packaging at Nanoscale Will Advance Future Heterogeneous System Integration [Guest Editorial

Requirements engineering in industry 4.0: State of the art and directions to continuous requirements engineering

AbstractThe 4th Industrial Revolution, also known as Industry 4.0, intends to transform manufacturing processes into smart factories with full digitalization and intelligent, decentralized, and flexible production. In this scenario, Industry 4.0 systems (i.e., software‐intensive systems that automate smart factories) have required rigorous and continuous development, but smart factory companies often have difficulty dealing with Requirements Engineering (RE) where requirements continuously change and emerge at runtime to support the changeability of complex production processes. Such requirements encompass engineering (e.g., mechanical, electrical, electronic, production/manufacturing) and business areas and involve the vertical and horizontal integration of heterogeneous manufacturing systems. There is also a lack of a panorama of how Industry 4.0 projects have performed with RE activities. The main goal of this paper is to present the state‐of‐the‐art research concerning RE in Industry 4.0 and draw attention to the next most urgent steps. For this, we selected and examined studies that address RE for Industry 4.0, noting that much of this literature is recent but does not fully address the complexity and dynamism of the requirements for Industry 4.0. Grounded on these studies and our academic and industry experience, we highlight the need for Continuous Requirements Engineering (CRE) for Industry 4.0.Significance and Practitioner Points: The main implications of this paper are: (i) For researchers: It offers the state of the art of RE in the context of Industry 4.0 and points out several important open issues that require an urgent investigation through new research topics; and (ii) For practitioners: It provides directions for new or even existing Industry 4.0 projects on how to deal with RE activities aiming to overcome the several challenges to perform them.

Cloud Computing Based Data Processing and Automated Management of Power Dispatch

Abstract As smart grids increase, the scope of power dispatch systems has broadened, encompassing not just traditional dispatch services but also multifaceted information services, encompassing data fusion, heterogeneous system integration, and big data analytics. However, managing intricate information businesses like big data analysis poses numerous challenges for the current power dispatch system, hindering its ability to keep up with escalating business demands. We introduce a cloud computing and big data analytics-based design scheme for a power dispatch data processing and automation management system to address this. Leveraging the distributed computing prowess of cloud computing platforms, the system ensures swift processing and analysis of vast power dispatch data. Additionally, by harnessing big data analysis techniques, the system delves into historical data, uncovers potential operational patterns and risk areas, and offers insights for optimizing the Electric Power System’s (EPS) operations. Experimental outcomes demonstrate the system’s remarkable proficiency in enhancing data processing, real-time control, and automation management capabilities, thereby bolstering the growth of intelligent power dispatch systems with robust technical backing.

Modeling and Automation of Data Collection and Processing in a Smart Medical Ward

The study considers modeling and automating the processes of data collection and processing in a smart medical ward. We examined the existing solutions in the field of smart wards. Such solutions allow to increase patient safety, improve the quality of their treatment, optimize workflows in inpatient facilities, reduce costs and increase comfort of the patients. At the same time, these solutions are focused on particular tasks, use varied technologies and protocols, and implement single scenarios for the functioning of the ward. This is not enough to create an integrated approach to automating patient treatment in smart wards, as there are problems of compatibility and integration of heterogeneous modules, systems and protocols, which leads to growing costs and reduced profitability. To avoid these problems, the complex must be implemented within a single framework with typical components, connections, and operation scenarios. To do this, at the first stage of the work, a conceptual model of a smart room is proposed, a description of its components is given, and scenarios of their functioning are provided. An algorithm for collecting and processing data for diagnosis and stratification of diseases has also been developed, a simulation of the smart ward operation has been carried out, and it showed that the implementation of data collection and processing using smart components can reduce the processing time at least twice.

Integration of Heterogeneous Sensor Systems for Disaster Responses in Smart Cities: Flooding as an Example

Smart cities represent a new perspective on modern urban development. They involve an information infrastructure environment with application intelligence to improve operational efficiency and welfare effectively. However, understanding how to overcome the barriers of data fragmentation and heterogeneity to exploit the strengths of existing resources and create integration effects remains a key challenge in smart city development. This research focuses on the effective management of heterogeneous sensor systems across different domains to improve quick disaster responses. Metadata serve as the core of this proposed framework, which is designed to not only describe the common and unique characteristics of various IoT-based devices and services, but also to provide necessary information to support the searching, requesting, and updating of required sensors and observation, as well as responding to the upcoming disaster. A workflow consisting of four list types was proposed and used to guide the response procedure. This research specifically aims to enable heterogeneous sensor systems available to all public or private stakeholders to be integrated in a collaborative fashion. While a flooding response was chosen for demonstration in this research, the proposed standard-based framework can be further promoted for other types of smart city applications, not limited to disaster response. The study’s results and implications underscore the importance of effective management of heterogeneous sensor systems and the role of metadata in enabling disaster responses in smart cities.

Distributed Public Key Certificate-Issuing Infrastructure for Consortium Certificate Authority Using Distributed Ledger Technology

With the development of cloud services and the Internet of Things, the integration of heterogeneous systems is becoming increasingly complex. Identity management is important in the coordination of various systems, and public key infrastructure (PKI) is widely known as an identity management methods. In PKI, a certificate authority (CA) acts as a trust point to guarantee the identity of entities such as users, devices, and services. However, traditional CAs that delegate the operations to a specific organization are not always suitable for heterogeneous services, and a new methodology is required to enable multiple stakeholders to securely and cooperatively operate a CA. In this study, we introduce the concept of a consortium CA and propose a distributed public key certificate-issuing infrastructure that realizes a consortium CA. The proposed infrastructure enables multiple organizations to cooperatively operate a CA suitable for services involving multiple stakeholders. We identify four requirements for the cooperative operation of a consortium CA and design the proposed infrastructure with distributed ledger technology. Furthermore, we present the implementation of smart contracts with Hyperledger Fabric and prove that the proposed infrastructure satisfies the four requirements. Finally, we confirm that certificate issuance and verification are stable at approximately 4 and 3 ms, respectively.

An efficient thermal model of chiplet heterogeneous integration system for steady-state temperature prediction

As the silicon-based CMOS technology faces significant challenges in terms of physical principles and process limitations by reducing the device dimensions to improve integration, the chiplet heterogeneous integration (CHI) system has become an important solution to continue Moore's law. The wafer-scale CHI systems have also emerged nowadays to achieve more powerful performance for artificial intelligence (AI) applications. Due to the high power and small space, the thermal problems are big challenges. Those problems can lead to severe damages if they are not well solved. In this paper, an efficient thermal model is proposed to predict the steady-state temperature distribution of CHI 2.5-D systems. Specifically, since an oversimplified heat sink can result in huge inaccuracy, the heat sink is modeled according to its actual shape. In addition, the RDL, TSVs and bumps are modeled in an equivalent manner to make this model more accurate. Those efforts enable steady-state thermal simulation of the CHI system. In order to extend the thermal model to wafer-scale CHI systems, an efficient method is developed to transform the circular components into regular shape. Finally, this thermal model is evaluated to be highly accurate with errors <1.8 % and quite fast. Based on this verification, several cases are analyzed to illustrate the applicability of our methodology in describing the thermal dissipation behaviors. The present thermal model is an instructive simulation tool which can be used to perform large scale thermal simulation of heterogeneous integration systems. The proposed methodology of the present simulation work is expected to help the designers to detect the potential temperature-dependent hotspots and improve the reliability and robustness of CHI systems in the early-stage of the design flow.

: Mobility-Driven Integration of Heterogeneous Urban Cyber-Physical Systems Under Disruptive Events

With the rapid development of cities, heterogeneous urban cyber-physical systems are designed to improve citizens’ experience, e.g., navigation and delivery service. However, the integration of services is not designed for disruptive events, an oversight that has rippling effects on service quality. For example, urban transportation systems consist of multiple transport modes that have complementary characteristics of capacities, speeds, and costs, facilitating smooth passenger transfers by planned schedules. Such integration may experience significantly increased delays during disruptions. Current solutions rely on a substitute service to transport passengers from and to affected areas using ad-hoc schedules and static routes, which are inefficient and do not utilize mobility patterns of mobile systems, e.g., dynamic passenger demand. To coordinate heterogeneous transportation systems under disruptions, we design a service to automatically select and integrate part of three systems (subway, bus, and taxi) using systems’ mobility patterns, e.g., predicted supply and demand. The service is presented in a normal version, eRoute, considering both subway and bus, and in a version taking taxis into account, called enhanced eRoute. We implement and evaluate eRoute with datasets including subway, bus and taxi, and a fare collection system. The data-driven evaluation results show that eRoute improves the ratio of served passengers per time interval by up to 11.5 times and reduces the average traveling time by up to 82.1 percent compared with existing solutions.

Manufacturability and mechanical reliability study for heterogeneous integration system in display (HiSID)

Manufacturability and mechanical reliability study for heterogeneous integration system in display (HiSID)

SoIC_H Technology for Heterogeneous System Integration

A System on Integrated Chip_Horizontal (SoIC_H) technology for heterogeneous system integration in high-performance computing (HPC) is proposed. Compute logic chiplets and memory cubes are tightly integrated on a Si interposer via ultrafine pitch SoIC bond to provide low parasitic and high density in input/output (I/O) interconnects. To demonstrate the advantages of SoIC_H technology over <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> bump in HPC applications, the electrical performance of a face-to-face (F2F), 3- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> pitch ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> mP), and low-temperature (LT) SoIC bonding on a silicon interposer was conducted and compared with the ones using <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> bump. Through system technology co-optimization (STCO), the proposed SoIC_H technology at the bond pitch of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3~\mu \text{m}$ </tex-math></inline-formula> improves energy per bit and latency for die-to-die I/O link and on-chip fan-in/fan-out design through the simulation. For memory cube integration, if <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> bumps between stacked dies are replaced by SoIC bonds, lower latency, higher bandwidth, and lower energy per bit for 4-Hi static random access memory (SRAM) cache and 12-Hi high bandwidth memory (HBM) are obtained. Moreover, the proposed structure provides significant thermal resistance improvements along the thermal conduction path of logic and memory cubes attached to the Si interposer. With much improved electrical and thermal performance, the SoIC_H technology enables energy-efficient heterogeneous system integration and applications.

(Invited) Fan-out Wafer-Level Packaging: Opportunities and Challenges Towards Heterogeneous Systems

This article describes opportunities and challenges towards heterogeneous systems integration by the so-called fan-out wafer-level packaging (FOWLP) technology. An introduction on the technology is given, before we describe specific developments built up at CEA-Leti. Recent assessments of a multi-chip SiP for 5G applications and scalable three-dimensional interconnects are presented.

Fabrication and Electrical Characterization of High Aspect Ratio Through-Silicon Vias with Polyimide Liner for 3D Integration.

High aspect ratio (HAR) through-silicon vias (TSVs) are in urgent need to achieve smaller keep-out zones (KOZs) and higher integration density for the miniaturization of high-performance three-dimensional (3D) integration of integrated circuits (IC), micro-electro-mechanical systems (MEMS), and other devices. In this study, HAR TSVs with a diameter of 11 μm and an aspect ratio of 10:1 are successfully fabricated in a low-cost process flow. Conformal polyimide (PI) liners are deposited using a vacuum-assisted spin coating technique, and the effects of spin coating time and speed on the deposition results are discussed. Then, continuous Cu seed layers are fabricated by sequential sputtering and ultrasound-assisted electroless plating. Additionally, void-free and seamless Cu conductors are formed by electroplating. Moreover, a semi-additive method is used to fabricate the redistribution layers (RDLs) on the insulating layers of photosensitive PI (PSPI). Notably, a plasma bombardment process is introduced to remove residual PSPI in the contact windows between RDLs and central pillars. Results show that the resistance of a single TSV from a daisy chain of 144 TSVs with density of 2000/mm2 is about 28 mΩ. Additionally, the S-parameters of a single TSV are obtained using L-2L de-embedding technology, and the experimental and simulated results agree well. The proposed low-cost fabrication technologies and the related electrical characterization of PI-TSVs are significant for the application of HAR TSVs in modern heterogeneous integration systems.

Heterogeneous Integration System in Display (HiSID) for Next-Generation Terminal Device

Heterogeneous integration system in display (HiSID) is a brand new architecture for the display. Based on the next-generation micro/mini-LED display technology, through semiconductor interconnection technology, advanced packaging, mass manufacturing and device miniaturization technologies, and so on, this system will integrate display units, storage units, sensing units, communication units, and even computing units into one “display.” Therefore, a light-weighted, intelligent, highly integrated, and everything-connected user-interface could be achieved. In this article, we first introduce the HiSID design architecture as well as its excellent performance and high efficiency on the panel area usage, which could progressively innovate the related industry chain. The ultralow latency, thermal, and reliability were simulated and discussed. To accomplish the HiSID, the key challenges such as device miniaturization, massive manufacturing, advanced interconnect technology, and required materials are reviewed.

Low-Loss Single-Band, Dual-Band, and Broadband mm-Wave and (Sub-)THz Interconnects for THz SoP Heterogeneous System Integration

Low-loss single-band, dual-band, and broadband terahertz (THz) interconnects for THz system-on-package heterogeneous system integration are proposed in this article. Transmission lines deployed on a 0.18- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μ</i> m Complementary Metal-Oxide-Semiconductor (CMOS) chip and an integrated-passive-devices carrier, respectively, are coupled electromagnetically as the chip is flip-chip packaged onto the carrier using low-cost gold stud bumps. By doing this, two pairs of quarter-wave coupled lines can be formed to realize a low-loss THz interconnect for transiting a signal from the chip to the carrier. Moreover, single-band and dual-band operations can be acquired by designing the coupled lines to have a length of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\lambda}$</tex-math></inline-formula> /4 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\lambda}$</tex-math></inline-formula> /4 and 3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${\lambda}$</tex-math></inline-formula> /4 at the frequencies of interest, respectively. The gold stud bumps are also employed to realize a broadband directly-connected THz interconnect which transfers a signal from an on-chip microstrip line to an on-carrier microstrip line in a low-loss and broadband manner. A theoretical analysis using signal flow graphs and Mason's rule is conducted to provide design guidelines. Experimental results show that the proposed single-band, dual-band, and broadband THz interconnects can provide the insertion losses of 1.7, 2.7 and 2.9 dB, and lower than 3.3 dB at 306.5, 140 and 324.5 GHz, and from 140 to 330 GHz, with the return loss better than 10 dB from 256.5 to 330, 140 to 182 and 280 to 330, and 140 to 330 GHz, respectively. To the best of the authors’ knowledge, the proposed THz interconnect demonstrates the first dual-band operation reported thus far.

Enabling Secure Data Exchange through the IOTA Tangle for IoT Constrained Devices.

Internet-of-Things (IoT) and sensor technologies have enabled the collection of data in a distributed fashion for analysis and evidence-based decision making. However, security concerns regarding the source, confidentiality and integrity of the data arise. The most common method of protecting data transmission in sensor systems is Transport Layer Security (TLS) or its datagram counterpart (DTLS) today, but exist an alternative option based on Distributed Ledger Technology (DLT) that promise strong security, ease of use and potential for large scale integration of heterogeneous sensor systems. A DLT such as the IOTA Tangle offers great potential to improve sensor data exchange. This paper presents L2Sec, a cryptographic protocol which is able to secure data exchanged over the IOTA Tangle. This protocol is suitable for implementation on constrained devices, such as common IoT devices, leading to greater scalability. The first experimental results evidence the effectiveness of the approach and advocate for the integration of an hardware secure element to improve the overall security of the protocol. The L2Sec source code is released as open source repository on GitHub.

Blockchain and Industry 4.0 – A study

Everything around us is transforming with advancement in time, as a result, new technologies are developing with upcoming industry revolution, which is also widely popular as Industry 4.0. It includes new trends related to Cyber Physical system, Augmented Reality, Artificial Intelligence, Internet of Things (IoT), Cloud Computing and many more. Many physical infrastructures are transformed to virtual ones, which allowed decision making and planning in decentralized form. It also enabled users to accomplish real time communications with help of integrated computing algorithms. Main challenge involves decentralization and heterogeneous nature of systems. Blockchain can be solution to this problem, which targets at integration and management of heterogeneous systems. This paper discusses various solutions related to the conjunction of blockchain and Industry 4.0. It also explores various pros and cons of traditional security solutions and provides evaluation of present blockchain-based security solutions. It also discusses blockchain based application areas of Industry 4.0.

Hybrid external-cavity lasers (ECL) using photonic wire bonds as coupling elements

Combining semiconductor optical amplifiers (SOA) on direct-bandgap III–V substrates with low-loss silicon or silicon-nitride photonic integrated circuits (PIC) has been key to chip-scale external-cavity lasers (ECL) that offer wideband tunability along with small optical linewidths. However, fabrication of such devices still relies on technologically demanding monolithic integration of heterogeneous material systems or requires costly high-precision package-level assembly, often based on active alignment, to achieve low-loss coupling between the SOA and the external feedback circuits. In this paper, we demonstrate a novel class of hybrid ECL that overcome these limitations by exploiting 3D-printed photonic wire bonds as intra-cavity coupling elements. Photonic wire bonds can be written in-situ in a fully automated process with shapes adapted to the mode-field sizes and the positions of the chips at both ends, thereby providing low-loss coupling even in presence of limited placement accuracy. In a proof-of-concept experiment, we use an InP-based reflective SOA (RSOA) along with a silicon photonic external feedback circuit and demonstrate a single-mode tuning range from 1515 to 1565 nm along with side mode suppression ratios above 40 dB and intrinsic linewidths down to 105 kHz. Our approach combines the scalability advantages of monolithic integration with the performance and flexibility of hybrid multi-chip assemblies and may thus open a path towards integrated ECL on a wide variety of integration platforms.

Design of Computer Information System Integration Based on Metadata

With the popularization of artificial intelligence technology, system integration has become the development trend of various industries, which requires the integration of multiple heterogeneous systems into one system. Through the integrated system, we can query information from multiple data sources, which will provide a unified interface for users. At present, the information system has become the normal office of every company must use the system, which will have many differences in the development platform and development tools. Therefore, many subsystems often have different logical structure and physical structure, which requires us to process information through metadata. Metadata can complete the information exchange, integration, synchronization and other operations between multiple subsystems, which can meet the information exchange between heterogeneous systems. Firstly, this paper analyzes the related concepts of metadata. Then, this paper analyzes the integrated design of information system.