Harmonic Cancellation Technique Research Articles

Effective Harmonic Cancellation Technique for a Three-Phase Four-Wire System

An excess non-linear and unbalanced load application increases the power quality (PQ) problem by injecting harmonic current. The avoidance of neutral current control creates additional PQ problems due to excess circulating current in modern 3φ4W applications. Therefore, this manuscript suggests improved αβ transform-based voltage and current control approaches for both 3φ3W and 3φ4W shunt active filter (SAF) applications. In the proposed approach, a novel combined voltage and current (NCVC) control approach is presented for modern 3φ3W systems by using voltage and closed-loop current controllers. However, due to the absence of a neutral current, the NCVC is not sufficient for 3φ4W system application. Therefore, by considering the current reference parameter generated from the NCVC, a novel harmonic compensation technique (NHCT) is proposed with proper mathematical expressions for the 3φ4W application. To show the importance of NHCT over traditional P-Q-R control, the developed MATLAB/Simulink model is tested by using different 1φ and 3φ nonlinear/unbalanced load conditions. The comparative results indicate that, by using NHCT, the 3φ4W system contains a lesser total harmonic distortion (THD) and harmonic mitigation ratio (HMR), less ripple frequency, an improved power factor, a lesser neutral current, and a balanced active/reactive power condition. From the above comparative analysis results, it is found that the overall improvement percentage is 66.78%. The above findings justify the significance of the NCVC and NHCT approach during both unbalanced and non-linear load-based 3φ4W applications.

A low-power RF mixer with harmonic cancellation for IEEE 802.15.4 portable, wearable wireless applications

There is an aggressive need for the rapid development of 5G based battery-powered, portable, wearable, wireless applications in the telecommunication industry. The battery-powered devices pose a critical challenge in processing higher data rates while achieving less distortion and low-power consumption. Hence, the problem of power-efficient distortion cancellation needs to be addressed to equip the 5G New Radio (NR) based portable, wearable wireless systems for better performance. This work addresses the problem by proposing a complementary post-distortion harmonic cancellation (CPDHC) technique to improve the linearity of the Mixer used in battery-powered wireless systems. In the proposed CPDHC method, the overall third-order transconductance of the input stage is reduced optimally by the overall third-order transconductance of the auxiliary transistors. This optimal reduction in third-order transconductance retards the growth of third-order harmonics in the circuit, thus improving the linearity performance of the Mixer circuit. From post-layout simulations, the current reuse based Mixer achieves an IIP3 of −6.823 dBm before linearization, and with linearization by CPDHC technique, the IIP3 is improved to 5.05 dBm, resulting in a spurious-free dynamic range (SFDR) of 66.03 dB for 100 MHz channel bandwidth. The CPDHC based Mixer contributes an integrated double-sideband noise figure (DSB-NF) of 12.57 dB and a peak gain of 14.36 dB while consuming 1.25 mW from a 1.2 V supply.

An Enhanced Second Carrier Harmonic Cancellation Technique for Dual-Channel Enhanced Power Generation Centre Applications in More-Electric Aircraft

The more-electric aircraft concept has made the extraction of electrical power from both high-pressure shaft and low-pressure shaft of the aircraft engine essential for future aircraft. With each shaft driving one electrical generation channel, an advanced dual-channel enhanced power generation system can be formed. This article aims to address the power quality issues of this dual-channel power generation system, specifically focusing on the reduction of harmonics on a common dc bus. A simplified model to estimate second carrier harmonic of dc current in two-level converters is developed and reveals the fact that while this second carrier harmonic component magnitude can be determined by modulation index and dc-link current, its phase angle is solely dependent on the angle of carrier signals. Based on the developed model and these key findings, a new harmonic cancellation method is proposed through active power sharing and phase angle shifting of the carrier signals within different power sources. The method has demonstrated high robustness and is effective under different fundamental frequencies and power sharing ratio. Both simulation and experimental results are presented in this article to validate the proposed harmonic model and the enhanced cancellation method.

Practical Harmonic Cancellation Techniques for the On-Chip Implementation of Sinusoidal Signal Generators for Mixed-Signal BIST Applications

Harmonic cancellation strategies have been recently presented as a promising solution for the efficient on-chip implementation of accurate sinusoidal signal generators. Classical harmonic cancellation techniques consist in combining a set of time-shifted and scaled versions of a periodical signal in such a way that some of the harmonic components of the resulting signal are cancelled. This signal manipulation strategy can be easily implemented using digital resources to provide a set of phase-shifted digital square-wave signals and a summing network for scaling and combining the phase-shifted square-waves. A critical aspect in the practical implementation of the harmonic cancellation technique is the stringent accuracy required for the scaling weight ratios between the different phase-shifted signals. Small variations between these weights due to mismatch and process variations will reduce the effectiveness of the technique and increase the magnitude of undesired harmonic components. In this work, different harmonic cancellation strategies are presented and analyzed with the goal of simplifying the practical on-chip implementation of the scaling weights. Statistical behavioral simulations are provided in order to demonstrate the feasibility of the proposed approach.

On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture

A low-distortion current-steering two-tone sinusoidal signal synthesizer based on a mixing-finite impulse response (FIR) architecture is proposed. The proposed robust synthesizer adopts only digital blocks. It implements a two-stage cascade FIR harmonic cancellation technique that generates a single tone quasi-sinusoidal waveform and suppress the odd-order harmonics up to the 21st order. Differential-mode circuitry and a 50% duty cycle clock are also utilized to cancel the even-order harmonics. The single-tone signal is further up-converted to the desired local oscillator (LO) frequency band, thereby producing the desired two-tone sinusoidal signals. The proposed synthesizer contains a current mirror array implementing the FIR tap coefficients. Accuracy is enhanced using dynamic element matching. The other building blocks consist of a 24-phase clock generator, a current combiner, and a passive mixer with bootstrapped MOS switches. This two-tone synthesizer can be used to conduct a linearity built-in self-test. It is fabricated in 130-nm standard CMOS technology, occupying a 0.056-mm2 silicon area. Measurement shows better than −68 dBc third-order intermodulation (IM3) below 480-MHz LO frequency without calibration. For the LO frequency <76.8 MHz and the two-tone difference <2 MHz, an IM3 better than −75 dBc can be achieved. The imbalance between the two-tone amplitudes is measured <0.1 dB across the whole frequency range from dc to 1 GHz.

Clock harmonic distortion reduction technique for full tunable range in switched-R-MOSFET-C filters

A method is introduced in this paper to reduce the distortion introduced by the harmonics of the clock in the operation of switched-R-MOSFET-C filters. A comparison of this approach with the previously reported architectures is presented. The improvement in clock distortion using this technique is demonstrated through simulation and backed by analytical expressions for the first order active RC and second order biquad filters. The proposed clock harmonic cancellation technique shows an improvement of more than 38 dB over previous architectures without compromising the tuning range or requiring increasing the frequency of the clock. The design was implemented using standard CMOS IBM 180 nm process technology.

150–850 MHz High-Linearity Sine-wave Synthesizer Architecture Based on FIR Filter Approach and SFDR Optimization

A low distortion sinusoidal waveform synthesizer architecture is proposed. The synthesizer utilizes 50% duty cycle and differential-mode circuitry to eliminate the even order harmonics, and it also implements a 5-phase 3-amplitude harmonic cancellation technique to suppress the 3rd, 5th, 7th, and 9th order harmonics. The compact system architecture consists of a 12-phase ring oscillator, a weighted resistor summing network, and an RC output filter. Phase shifters are adopted in the ring oscillator to enable the control of an external harmonic cancellation optimization algorithm. The proposed application of the optimization algorithm compensates the errors in the circuit and further improves the linearity of the output waveforms. This synthesizer is fabricated in 180 nm standard CMOS technology, occupies a 0.08 ${\rm mm}^{2}$ silicon area and achieves the spur-free dynamic range (SFDR) of 59 to 70 dBc from 150 to 850 MHz after the optimization procedure. It can operate from a 1 to 1.8 V supply voltage and achieve a power consumption from 9.11 to 57 mW.

A new full bridge high intensity focused ultrasound power system with harmonic cancellation

The feasibility of a new full bridge high intensity focused ultrasound (HIFU) amplifier system with harmonic cancellation is evaluated in this study. Harmonic cancellation technique is applied to these power amplifiers, which can eliminate the 3rd harmonic and all even harmonics. Since this technique requires two channels of phase signal to control one channel of power amplifier, the signal generator is required to double its output. The transducer array proposed in this study has 100 elements. So we choose an FPGA chip to generate 200 driving signals, and each channel has a phase resolution of 2 ns, less than 1°. The phase signal from the FPGA meets the requirement of driving the power amplifiers. The output waveform of one channel of power amplifier (voltage across the transducer) is evaluated, and shows fewer harmonic components.

Low-Distortion Sine Wave Generation Using a Novel Harmonic Cancellation Technique

A novel technique is proposed to generate robust, low distortion sine waves. In this method, outputs of a phase shift oscillator (PSO) are weighted and summed to obtain multiple outputs with very low distortion and precise phase relationship. The method allows a programmable number of harmonic distortion components to be cancelled over a wide frequency range. This work derives the condition for the weights on the outputs of the PSO to be a real quantity, and demonstrates how this can be used to generate low distortion sine waves. With the proposed method, in an N-stage PSO, harmonics up to N-2th can be canceled. Simulation results using commercial operational amplifier spice models are presented to demonstrate low distortion sine wave generation over 2 kHz-180 kHz frequency range. The method has been experimentally verified using extremely low-cost, discrete components to produce 100 dB total harmonic distortion (THD) sine wave.

Modulation Technique for Low Frequency Harmonic Cancellation in Auxiliary Railway Power Supplies

The auxiliary railway power supply (ARPS) is needed in order to provide low and medium voltages to the onboard systems from the catenary high voltage. The outputs of the ARPS can be dc (24 Vdc ÷100 Vdc) or ac (400 Vac). In the case of ac voltage generation, the ac output voltage is under very restrictive total harmonic distortion specifications even in the presence of nonlinear loads which draw low-frequency current harmonics. Along the present paper, a new modulation technique is proposed under the name of harmonic cancellation technique. It is based on the proper pre-distortion of the inverter output voltage in order to generate a controlled fundamental harmonic as well as a set of low-frequency harmonics which cancel out the harmonic pollution due to the nonlinear load performance. The theoretical background needed to implement the modulation technique is provided as well as the experimental validation of the proposed modulation technique through a scale-down prototype.

Errata for "A harmonic cancellation technique for an ultrasound transducer excited by a switched-mode power converter" [Feb 08 359-367

In the above titled paper (ibid., vol.55, no. 2, pp. 359-367, Feb 08), two of the figures are incorrect as printed. The corrected figures are presented here.

A harmonic cancellation technique for an ultrasound transducer excited by a switched-mode power converter

The aim of this study is to evaluate the feasibility of using harmonic cancellation for a therapeutic ultrasound transducer excited by a switched-mode power converter without an additional output filter. A switching waveform without the third harmonic was created by cascading two switched-mode power inverter modules at which their output waveforms were pi/3 phase shifted from each other. A PSPICE simulation model for the power converter output stage was developed. The simulated results were in good agreement with the measurement. The waveform and harmonic contents of the acoustic pressure generated by a 1-MHz, self-focused piezoelectric transducer with and without harmonic cancellation have been evaluated. Measured results indicated that the acoustic third harmonicto- fundamental ratio at the focus was small (-48 dB) with harmonic cancellation, compared to that without harmonic cancellation (-20 dB). The measured acoustic levels of the fifth harmonic for both cases with and without harmonic cancellation also were small (-46 dB) compared to the fundamental. This study shows that it is viable to drive a piezoelectric ultrasound transducer using a switched-mode power converter without the requirement of an additional output filter in many high-intensity focused ultrasound (HIFU) applications.