Hardware Count Research Articles

Increasing transmission efficiency with advanced signal processing

Optical CDMA is an advanced and flexible communication technology with a potential to offer very energy efficient and highly scalable networking. In addition it can also deliver increased physical layer privacy and on-demand bandwidth sharing management. We have developed, extensively investigated, and experimentally demonstrated highly scalable approach to incoherent OCDMA which can very efficiently increase the number of simultaneous users. In addition, the introduction of an advanced photonic signal processing results in an overall system power budget improvement by nearly 3dB. Error-free operation with the BER less than 10-12 was achieved. We have also shown that with demonstrated approach we can dramatically improve number of simultaneous network users (up to ten times) while keeping the related hardware count unchanged. By comparing this results to DWDM concept, this substantial increase in number of simultaneous users did not require to add any additional wavelength laser sources and was achieved by employing just three communication wavelengths.

неЩасливий випадок як поштовх до діагностики хвороби у 16-річного хлопця, пов’язаної з MYH9. Сюжет із практики гематолога

MYH9-related disease (MYH9-RD) is an autosomal dominant hereditary thrombocytopenia caused by mutations in the MYH9 gene with characteristic laboratory features - the presence of giant platelets and basophilic cytoplasmic inclusions in neutrophils (similar to Dele bodies). Patients with MYH9-RD are at high risk for deafness, cataracts, and renal dysfunction, most often occurring in adulthood. Platelet counts in patients with MYH9-RD range from severe thrombocytopenia to near-normal values, although they are usually stable. Propensity for hemorrhagic Complications correlate with platelet count and are usually absent or limited to minor bleeding in patients with mild thrombocytopenia, but may lead to spontaneous and potentially life-threatening bleeding with persistent platelet counts <50×109/l. Purpose - to describe a clinical case of a disease caused by a heterozygous mutation in the MYH9 gene with an emphasis on the importance of genetic tests for the final verification of the disease. Clinical case. Features of diagnosis caused by a heterozygous mutation in the MYH9 gene in a 16-year-old boy are described. Throughout the child's life, the manifestations of the hemorrhagic syndrome were moderate (periodically a small number of bruises on the skin, to which the parents did not pay much attention, bleeding from the gums when brushing the teeth), the child’s blood tests were performed occasionally without determining the number of platelets. The boy suffered a displaced radius fracture as a result of the injury. The orthopedic traumatologist performed an operation of limited reposition of bone fragments followed by implantation of a needle for proper bone fusion without complications. During a general blood test, thrombocytopenia was detected, which prompted the child to be consulted by a hematologist. During the examination at the Western Ukrainian Specialized Pediatric Medical Center, Lviv, it was noted in the hardware count of the hemogram that the number of platelets was 22.0-30.0×109/l, the microscopic count of platelets was 147.0-156.0×109/l, the entire population of platelets was represented by macroforms with mean platelet volume 14.9 fl. We found good aggregation of platelets with ristocytin, and reduced aggregation with epinephrine, arachidonic acid, and adenosine. Verification of the final diagnosis of MYH9-RD caused by a heterozygous mutation in the MYH9 gene occurred by genome sequencing. Therefore, the application of the genome sequencing technique can contribute to the early diagnosis of hereditary macrothrombocytopenia caused by a heterozygous mutation in the MYH9 gene. The research was carried out in accordance with the principles of the Helsinki Declaration. The informed consent of the patient was obtained for conducting the studies. No conflict of interests was declared by the authors.

Design of High Speed, Energy, and Area Efficient Spin-Based Hybrid MTJ/CMOS and CMOS Only Approximate Adders

It is important to explore better alternatives to CMOS to sustain Moore’s law far in the future. One option is to integrate non-volatile spin devices, such as magnetic tunnel junction (MTJ), with the existing CMOS technology to augment its capability. This article presents five approximate 1 bit full adders for applications where accuracy can be traded for energy, speed, and area. The application of an approximate adder is demonstrated in image processing for smoothening an image. Three of these adders are fully non-volatile, one is partially volatile, and one is fully volatile. All the adders use SRAM-based sense amplifier (SA) to reduce sensing energy and hardware count. To reduce the delay, some of the adders utilize the parallel connection of logic devices (MTJ or MOSFET) in the logic tree. All the adders are simulated using 45 nm CMOS predictive technology model (PTM) and perpendicular magnetic anisotropy (PMA) CoFeB/MgO/CoFeB MTJ model with HSPICE simulator. After performing simulations, results show that the proposed fully non-volatile approximate adder (AXFA4) performs exceptionally well against its existing counterpart AX_MFA2 in terms of the energy-delay product (EDP) and the area-delay product (ADP) with a decrement of 84% and 80%, respectively. All the adder designs compute sum at 75% and carry at 100% accuracy, respectively.

Optimized IP-over-WDM core networks using ZR+ and flexible muxponders for 400 Gb/s and beyond

We compare IP core networks in three scenarios—those using point-to-point optical links between adjacent nodes with ZR/ZR + based pluggables (called hop-by-hop routing), leveraging reconfigurable optical add–drop multiplexers (ROADMs) with ZR + pluggables, and ROADMs using performance-optimized flex-coherent muxponders—from hardware count, wavelength utilization, and latency perspectives. Specifically, we compare the number of components/router ports used to build an IP-over-WDM core network and attempt to understand if off-the-shelf pluggables are indeed suitable candidates for replacing custom-designed coherent muxponders (which we conveniently term as flexponders) in core networks. To this end, we build a constrained optimization model whose goal is to minimize the number of components used by optimally placed regenerators—the single biggest variable metric in core IP-over-WDM network design that eventually impacts total hardware count. Results show a 75% decrease in transceiver count for flexponders developed from coherent transponders/muxponders when compared to ZR + pluggables in routers with hop-by-hop routing and a 51% decrease in flexponders when compared to using ZR + pluggables in routers across ROADMs in a U.S. core network and a pan-India core network with 5 and 3 years of increasing demands, respectively.

Design and analysis of controllers for high voltage gain DC-DC converter for PV panel

Bidirectional high gain DC-DC buck boost converter is a virtual interface among PV source and inverter fed motor drive. In this article, a PV panel integrating a non-isolated bidirectional DC/DC converter that has high voltage gain voltage and a 3 phase three level DC/AC inverter is projected. It highlights the comparison between proportional integral controller (PIC), fractional order proportional integral derivative Controller (FOPIDC) and fuzzy logic controller (FLC) based Bidirectional DC/DC Power Converter System (BDDPCS). The design, model and simulation using SIMULINK of open loop BDDPCS and closed loop PIC, FOPIDC and FLC based BDDPCS are done and the results are discussed. The findings indicate higher performance for FLC based control of BDDPCS. The proposed BDDPCS has merits such as bidirectional power transferability, lesser hardware count with enhanced dynamic response. The hardware of BDDPCS is tested and the experiment result is compared in association with simulation results.

Addendum of 2MW Wind Turbine to A Power with Directly-Driven Permanent Magnet Generation System

In recent years, wind turbine has become an acceptable alternative energy generation, because of the environmental and economic benefits. Notwithstanding more research works still need to be done to reduce wind turbine installation complexity, enhance profitability and reliability especially in developing countries like Nigeria. This paper presents the modeling and analysis of a 2MW variable-speed directly-driven permanent magnet synchronous generator (PMSG), Wind energy conversion system (WECS). The objective is to optimize the power captured from the wind, ensure optimum efficiency for power generation and reduce system hardware count. The mathematical model for the permanent magnet synchronous wind turbine and its power control algorithms are modified by removing the speed sensors. Further, enhancement was achieved by utilizing wind speed forecasts as the starting speed. A modified Field Orientation Control FOC and voltage orientation control VOC scheme were developed for the system using matlab Simulink CAD application. The Simulation results of the model for various changes in wind speed utilizing average wind speed data of Mmaku in Awgu local government area of Enugu state Nigeria. The developed system ability to ‘smoothen’ the power, voltage output and operates at the optimum coefficient of performance between the cut in speed of 3m/s and 12m/s without wind sensor is found to be promising, Key words : wind turbine, variable-speed, permanent magnet, synchronous generator, efficiency DOI : 10.7176/JETP/9-3-04 Publication date :March 31 st 2019

Development of a Singly Fed Mechanical-Offset Machine for Electric Vehicles

A new singly fed mechanical-offset (SF-MO) magnetless machine that can produce the desired torque performances for electric vehicle applications is proposed in this paper. By purposely mismatching the angle between two torque producing segments, the proposed SF-MO machine can well integrate individual torque components to reduce the resultant torque ripple values. Based on the electrical-offset concept, the proposed machine needs only one set of inverter. Therefore, the proposed machine can employ conventional control algorithm to reduce the hardware count of power electronics and to ease control complexity. Various machine performances are analyzed by using finite element method while experimental prototype is also built for verification.

Design of PI Controlled Non Isolated Bidirectional DC to DC Converter for Electric Vehicle Application

Non isolated Bidirectional DC-DC Converter (NIBDDC) is a good interface between DC source and inverter Fed induction motor drive. This paper deals with comparison between open loop and PI controlled Bidirectional DC to DC Converter Inverter System (BDDCIS). The modelling and control of BDDC is becomes an important issue. Open loop BDDCIS and closed loop PI controlled BDDCIS are designed, modelled and simulated using Matlab- simulink and their results are presented. The investigations indicate superior performance of PI controlled BDDCIS. The proposed BDDCIS has advantages like bidirectional power transfer ability, reduced hardware count and improved dynamic response.

Fractional Order PID Controlled PV Buck Boost Converter with Coupled Inductor

Buck-boost converter is a good interface between PV and the load. This paper deals with comparison between PI and FOPID controlled PV fed Buck Boost Converter with Coupled Inductor (PVBBCCI) systems. Open loop PVBBCCI system, closed loop PI controlled PVBBCCI and FOPID based PVBBCCI systems are designed, modeled and simulated using Simulink and their results are presented. The investigations indicate the superior performance of FOPID controlled PVBBCCI system. The proposed system has advantages like reduced hardware count enhanced dynamic response and improved stability.

Hybrid Analog–Digital Antenna Array With Built-in Image Injection Calibration

This study presents a hybrid receiving array architecture that combines analog and digital beamforming to offer a solution for the phased-array feed and other multifunction receive-only applications. This architecture is capable of handling multiple beams forming simultaneous and precision beam steering. To further reduce the hardware counts of the online performance monitoring, a calibration method is proposed in which none of the transmitters or the dedicated distribution network are used. The hybrid architecture concept and built-in calibration are validated experimentally via a prototype. The system performance, including the statistical results of the baseband measurement, phase error, and radiation patterns under various array configurations, are illustrated. An effective phase tuning step of 0.1 ° , as well as a steering resolution at the subdegree level, is achieved, and the measured aperture distribution is in good agreement with that derived from the proposed online calibration.

Experimental Demonstration of Multi-Service Hybrid Fiber-Radio System Using Digitized RF-Over-Fiber Technique

An efficient multi-channel hybrid fiber-radio scheme for both down and up-link paths is demonstrated based on digitized RF-over-fiber technique, where the frequency translation stages are implemented using a single analog-to-digital converter (ADC) and digital-to-analog converter (DAC) instead of mixers and local oscillators. The simultaneous transmission of GSM, UMTS and WiMAX services is demonstrated with error-free reception. With a minimum sampling rate of 50 MHz and an overall optical data rate of 400 Mb/s, all the three wireless services can be successfully recovered in a full-duplex transmission. In the downlink direction, the performance is dependent on the amount of amplification required for the wireless signal at the desired carrier frequency. The amount of amplification on the other hand is dependent on the location of the wireless signal within the Nyquist zone which increases significantly with the order of the Nyquist zone. In the uplink direction, the performance is limited by inter-channel interference as a result of spectra aliasing of the regenerated IF signals which limits the signal-to-noise-ratio. With proper system design that optimizes downlink amplification and minimizes inter-channel interference, simultaneous multi-service transmission using digitized RF-over-fiber technique is able to improve spectral efficiency and minimize hardware count.

Optical Cross-Connect Based on the Spherical Fourier Cell

A free-space optical cross connect is proposed here that is highly compact and uses digital microelectromechanical systems (MEMS) tip-style micromirror arrays. Based on the Fourier cell, previously described for true time delays, the cross-connect can be strictly non-blocking, or can be of blocking or reconfigurably blocking designs to reduce the MEMS pixel count. Because in the Fourier cell many systems can share a single spherical lens, the hardware count is comparatively low and the system is highly compact.

A high-speed adaptive antenna array with simultaneous multibeam-forming capability

A new type of adaptive beamforming antenna system architecture is proposed for multichannel wireless communications. Multibeam communication with high data throughput is accomplished using the proposed beamformer architecture. The system consists of analog mixers, a multitone direct digital synthesizer (DDS), and a digital signal processor (DSP) controller. The essential idea of multibeam forming is based on a multitone weighting scheme combined with analog-digital hybrid signal processing. While the real-time multibeam construction is realized by the analog mixer circuits and a DDS, the complicated adaptive beamforming and direction-of-arrival estimation algorithms are carried out by the DSP. In this architecture, only one beamformer circuit is required to handle multiple beams, leading to significant reduction in hardware counts. A 5.8-GHz eight-element adaptive beamforming array successfully demonstrates two-beam simultaneous beamforming with less than three degrees of peak and null steering errors and more than 20-dB interference suppression. The test-bed exhibits successful two-channel data recovery at 25-Mb/s data throughput in each channel with binary phase-shift keying modulation, for simultaneous dual-beam reception. The bit-error-rate measurement validates the robustness of the communication quality under strong interferences.

Should hardware count for more than people?

Should hardware count for more than people?

Parallel solution of symmetric positive definite systems with hyperbolic rotations

An algorithm based on hyperbolic rotations is presented for the solution of linear systems of equations Ax = b, with symmetric positive definite coefficient matrix A. Forward elimination and backsubstitution are replaced by matrix-vector multiplications, rendering the method amenable to implementation on a variety of parallel and vector machines. This method can be simplified and formulated without square roots if A is also Toeplitz; a systolic (VLSI) architecture implementing the resulting recurrence equations is more efficient than previously proposed pipelined Toeplitz system solvers. The hardware count becomes independent of the matrix size if its inverse is banded.

A non-exact-multiplication scheme for digital filter implementation using bit-slice components

In the implementation of digital filters using bit-slice components, a significant amount of hardware can be saved with insignificant loss of performance if the multiplications involving the least significant bits of the signal and coefficient values are ignored. The effect is the introduction of an error noise source in the multiplier. Optimum hardware count for a given total output noise power is achieved when the noise power arises from ignoring the product of the least significant bits equals the noise power due to arithmetic rounding.

Time assignment speech interpolation system—a microprocessor based design

A normal synchronous time multiplexed system has low capacity utilisation of a trunk channel, owing to the ON-OFF nature of speech in human conversation. A time assignment speech interpolation (TASI) system nearly doubles this efficiency, at relatively small increase in hardware cost. In TASI, during the silent period of speech, the channel is allotted to some other ‘active’ subscriber on a first-come-first-serve basis. A microprocessor based system offers a very cost effective solution from hardware count. Intel 8085 A has been selected for the purpose. The microprocessor functions in a distributed processing mode together with the main CPU controlling the stored program exchange. The system uses digital dynamic speech detectors for detecting transitions in speech over a channel, as they show considerably superior performance over amplitude detectors. An assembly language program for the system has been developed.