Hard Bit Research Articles

Polar Code and Symbol Mapping Design for Multi-Level Cell Spin-Torque Transfer Magnetic Random Access Memory

Multi-level-cell (MLC) spin-torque transfer magnetic random access memory (STT-MRAM) suffers from reliability issues due to the highly asymmetric error rates of its hard and soft domains. In this communication, we have proposed to include a symbol mapper prior to writing bits to the MRAM and have jointly optimized the mapping and polar codes with iterative, soft-cancellation (SCAN) decoder. Specifically, we perform code search and symbol mapping based on the extrinsic information transfer curves of <i>a posteriori</i> probability demapper and the SCAN decoder. We identify a number of variations of Gray code-based mappings, each promising best waterfall, convergence, and/or error-floor performances. In particular, our simulation results demonstrate that one of our proposed mapping achieves a bit-error-rate which is nearly three orders of magnitude lower than that of the conventional binary mapping and outperforms other Gray-code variants at a resistance spread up to 18&#x0025; and hard bit write errors up to multiples of 10^&#x2212;3.

TSE: Two-Step Elimination for MLC STT-RAM Last-Level Cache

Spin-transfer torque RAM (STT-RAM) is an emerging non-volatile memory that has been recognized as the potential candidate to replace SRAM. Compared with SRAM, STT-RAM has advantages of non-volatility, zero leakage power, and higher density. To further improve data density, multi-level cell (MLC) STT-RAM that can store two bits per cell has been proposed. However, writing hard bit of a cell would write its soft bit to the same value as well, which complicates the write operation of MLC STT-RAM. Although two-step transition (TT) is usually adopted to ensure the data correctness during a write operation, it incurs overhead of additional energy consumption and performance degradation. In this article, we propose the two-step elimination (TSE) scheme to eliminate TTs while ensure data integrity. By flipping hard bits of the cells that suffered from TTs, the TSE scheme could reduce TTs to soft transitions (STs) or zero transitions (ZTs), which incur much less overhead than TTs. To keep track of the flipped cells effectively, 6-bit TSE tag is introduced. We exploit tag reversing and advanced mode of the TSE scheme to further improve the performance. The experimental results showed that our scheme could reduce 61 percent TTs and achieve significant lifetime improvement, compared with conventional MLC STT-RAM (CMLC) scheme.

Heavy ion irradiation induced hard error in MTJ of the MRAM memory array

The radiation effects of magnetic tunnel junction (MTJ) in a 180 nm Magnetoresistive Random Access Memory (MRAM) were investigated at the condition of the high heavy ion fluence (up to 1010 ions·cm−2) and high gamma-ray dose (up to 15 Mrad(Si)), respectively. The Hard Bit Error (HBE) was only observed when the energy of 181Ta ions was larger than 95.8 MeV under the ion fluence of 109 ions·cm−2 (~13 ions·bit−1). For gamma-ray exposure, no obvious effects were observed in devices. The HBE counts induced by 181Ta ions have a strong dependence on ion energy and cumulative fluence. In addition, the annealing characteristics of HBE after heavy ion irradiation at room temperature were also observed. It is found that the high ambient temperature is able to accelerate this annealing process. Monte Carlo simulation by using TRIM program revealed that the displacement damages induced by heavy ions were mainly located in the insulating layer of MTJ, which is responsible for the occurrence of HBE.

Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache

For the sake of higher cell density while achieving near-zero standby power, recent research progress in Magnetic Tunneling Junction (MTJ) devices has leveraged Multi-Level Cell (MLC) configurations of Spin-Transfer Torque Random Access Memory (STT-RAM). However, in orderto mitigate the write disturbance in an MLC strategy, data stored in the soft bit must be restored back immediately after the hard bit switching is completed. Furthermore, as the result of MTJ feature size scaling, the soft bit can be expected to become disturbed by the read sensing current, thus requiring an immediate restore operation to ensure the data reliability. In this paper, we design and analyze a novel Adaptive Restore Scheme for Write Disturbance (ARS-WD) and Read Disturbance (ARS-RD), respectively. ARS-WD alleviates restoration overhead by intentionally overwriting soft bit lines which are less likely to be read. ARS-RD, on the other hand, aggregates the potential writes and restore the soft bit line at the time of its eviction from higher level cache. Both of these two schemes are based on a lightweight forecasting approach for the future read behavior of the cache block. Our experimental results show substantial reduction in soft bit line restore operations, delivering 17.9 percent decrease in overall energy consumption and 9.4 percent increase in IPC, while incurring negligible capacity overhead. Moreover, ARS promotes advantages of MLC to provide a preferable L2 design alternative in terms of energy, area and latency product compared to SLC STT-RAM alternatives.

Distributed Iterative Detection With Reduced Message Passing for Networked MIMO Cellular Systems

This paper considers base station cooperation (BSC) strategies for the uplink of a multiuser multicell high-frequency reuse scenario where distributed iterative detection (DID) schemes with soft/hard interference cancelation (IC) algorithms are studied. The conventional distributed detection scheme exchanges soft-symbol estimates with all cooperating BSs. Since a large amount of information needs to be shared via the backhaul, the exchange of hard bit information is preferred; however, performance degradation is experienced. In this paper, we consider a reduced message passing (RMP) technique in which each BS generates a detection list with the probabilities for the desired symbol that are sorted according to their values in a decreasing order. The network then selects the best detection candidates from the lists and conveys the index of the constellation symbols (instead of double-precision values) among the cooperating cells. The proposed DID-RMP achieves intercell interference (ICI) suppression with low backhaul traffic overhead compared with the conventional soft bit exchange and outperforms previously reported hard/soft information exchange algorithms.

Pseudo-finite hard instances for a student-teacher game with a Nisan-Wigderson generator

For an NP intersect coNP function g of the Nisan-Wigderson type and a string b outside its range we consider a two player game on a common input a to the function. One player, a computationally limited Student, tries to find a bit of g(a) that differs from the corresponding bit of b. He can query a computationally unlimited Teacher for the witnesses of the values of constantly many bits of g(a). The Student computes the queries from a and from Teacher's answers to his previous queries. It was proved by Krajicek (2011) that if g is based on a hard bit of a one-way permutation then no Student computed by a polynomial size circuit can succeed on all a. In this paper we give a lower bound on the number of inputs a any such Student must fail on. Using that we show that there is a pseudo-finite set of hard instances on which all uniform students must fail. The hard-core set is defined in a non-standard model of true arithmetic and has applications in a forcing construction relevant to proof complexity.

Simple Interference Cancellation Technique for Multicarrier DS-CDMA

In this article, we propose a new scheme for multi user detection (MUD) using the parallel interference cancellation (PIC) technique. This technique provides a good complexity, latency, and performance compromise. Among spread-spectrum techniques, the most popular one is the direct sequence-code division multiple access (DS-CDMA), where each active user’s data is modulated (multiplied) by a unique code. This technique is suitable for multicarrier (MC) direct sequence-code division multiple access (DS-CDMA) systems. We offer a new scheme of soft detectors whose performance is superior to that of the other famous suboptimal detectors. On each sub carrier, instead of making hard bit decisions of the other users in the current stage and regenerating and cancelling the interference signal, a weighted sum of the soft outputs of the other users in the current stage is cancelled from the soft output of the desired user. This is the input to the next stage, then at the last stage, the interference cancelled outputs from all the subcarriers are combined (maximal ratio combining) to form the decision statistics. We derived expressions for the bit error rate (BER) on Rayleigh fading channels. Analytical results are found for different stages in the proposed PIC scheme. The simulation results show that the proposed scheme offers good interference cancellation than the other filter receiver. The complexity of this scheme grows linearly with the number of users. Moreover, this scheme is much faster than other receivers such as successive interference cancellation (SIC).

Performance Analysis of Parallel Interference Cancellation in Multicarrier DS-CDMA Systems

In this paper, we present and analyze the performance of a parallel interference cancellation (PIC) scheme for multicarrier (MC) direct-sequence code-division multiple-access (DS-CDMA) systems. At each cancellation stage in the proposed PIC scheme, on each subcarrier, a weighted sum of the soft outputs of the other users in the current stage is cancelled from the soft output of the desired user (rather than making hard bit decisions of the other users and regenerating and canceling the interfering signals) to form the input to the next stage. At the last stage, the interference cancelled outputs from all the subcarriers are maximal ratio combined (MRC) to form the decision statistic. The scheme has the advantage of not requiring the amplitude estimates of the other users. We derive analytical expressions for the bit error rate (BER) at different stages in the proposed PIC scheme on Rayleigh fading channels. Analytical results are found to agree well with the simulation results. The results show that the proposed PIC scheme offers better interference suppression capability than the conventional matched filter (MF) receiver. We also obtain bounds on the coded BER of the proposed PIC scheme for a convolutionally coded multicarrier DS-CDMA system where the PIC-MRC output feeds a soft decision Viterbi decoder.

Soft-decision multistage multiuser interference cancellation

Successive interference cancellation (SIC) refers to a family of low-complexity multiuser detection methods for direct-sequence code-division multiple-access systems. The performance of multistage SIC depends on the decision function used in the interference cancellation iterations, e.g., hard, soft, or linear decision functions. Due to error propagation, multistage SIC with hard data bit decisions may perform more poorly than multistage SIC with linear or soft decision functions. We propose and analyze a family of generalized unit-clipper bit decision functions that better combine linear and hard decisions. Performance within 0.4 dB of the single-user bound can be obtained. We then make robust the above soft-decision SIC to time-delay errors as large as half a PN chip and evaluate its performance.

Optimal combination of detection and error correction coding for magnetic recording

This paper presents models and techniques for fairly comparing detection systems for magnetic recording and for choosing the optimal tradeoff between Error Correction Control (ECC) overhead and detection performance. Models are presented for soft bit error rate (SBER), Hard Bit Error Rate (HBER), and optimization for both standard and modified concatenated coding schemes. The effect of error propagation of the RLL code is taken into account providing a more realistic method for comparing overall system performance of different combinations of detector, RLL code, and ECC.

Design of error correction systems for disk drives

Certain models are presented for analysis of Reed-Solomon (R-S) error correction systems in the context of optimizing their use in magnetic and optical disk storage devices. A brief statement of design considerations is noted with references as to which considerations are addressed by the models. This work is motivated by the desire to achieve the highest possible storage density within the constraints of user requirements (acceptable error rates, performance, etc.), recording code, recording channel, read channel, and cost. One pair of models treats conversion of soft error rates and burst length distributions from the read channel into hard bit error rates for various levels of interleaving. Another model, using the above models, conservatively estimates undetected bit error rate (miscorrection bit error rate). This model is closer to simulation examples than the previously published McEliece-Swanson bound. A third model includes effect of TAs (thermal asperities) on hard bit error rate. A fourth set of models includes the effect of thermal asperities (TAs) on an undetected bit error rate. Collectively, these models provide a bridge between read channel portions of data storage systems and error correction systems. A fifth set of models addresses user-perceived performance. Finally, an example is offered based upon one set of sample data to show how the models can be applied to help select an optimum system.

Stratapax Drill Bit for Gulf Coast Drilling

A drill bit employing GE Stratapax drill blanks has been developed for Gulf Coast drilling. Single point cutting tests demonstrated superior impact qualities of Stratapax when compared to natural diamonds. A new “pocket” brazing technique was developed to achieve a suitable attachment to a hard matrix bit body. Laboratory drilling tests suggest that high rates of penetration can be anticipated in future field tests.

Probability of error considerations for certain M-ary block codes with bit-by-bit decisions : N. C. Balthasar and H. M. Beck. Naval Res. Lab., Washington D.C., U.S.A., April (1971), pp. 34. P-176186, NRL-REP-7250

Abstract : A communication system, which transmits letters from an M-ary source alphabet through an additive white Gaussian noise channel, is considered. The source letters are encoded for transmission using an M-ary block code. Code words are transmitted bit by bit through the channel. The receiver makes hard bit decisions on the received signals, performs, a correlation operation to determine the likeliest transmitted code word and then decodes this word to yield a received letter. Two types of M-ary block codes are considered. For each type the authors attempt to derive the probability (P sub eB) of a block error, given various values of M (number of block), N (bits per block or block length), and P sub eb (the probability of a bit error). The analysis points out the need for investigation of a special-purpose statistical device in order that (P sub eB) can be determined for large values of M and N. (Author)