Half-bridge Cells Research Articles

The Closed-Loop Control of the Half-Bridge-Based MMC Drive with Variable DC-Link Voltage

The modular multilevel converter (MMC) based on half-bridge modules is a power converter topology suitable for high-power medium-voltage variable-speed drives. However, the voltage of its flying capacitors is negatively affected when low frequencies appear at the AC port. This paper analyzes the influence of using a variable DC port voltage in a machine-side MMC by implementing a closed-loop approach, ensuring a constant voltage fluctuation in the capacitors of the MMC during the whole operating range. The effectiveness of the proposed control scheme is demonstrated through simulation studies and experimental validation tests conducted using a 7.5 kW experimental prototype composed of an induction machine fed by an MMC with 18 half-bridge cells.

Bidirectional Buck-Boost Converter Using Cascaded Energy Storage Modules Based on Cell Voltage Equalizers

Ordinary modular energy storage systems require cell- and module-level equalizers, in addition to a main bidirectional converter, increasing the system complexity and cost. This article proposes a bidirectional buck-boost converter using cascaded energy storage modules. Each module contains a cell-level equalizer with a half-bridge cell. The half-bridge cell in each module is utilized not only for the cell-level equalizer but also for the cascaded buck-boost converter. Module voltages are equalized by adjusting duty cycles of the half-bridge cells, allowing the elimination of dedicated module-level equalizers. Furthermore, the cascaded structure equivalently increases the switching frequency and reduces the inductor current ripple. An experimental charge-discharge cycling test using the prototype was performed for three electric double-layer capacitor modules. Cell and module voltages were gradually equalized during cycling, demonstrating the bidirectional power conversion and cell- and module-voltage equalization capabilities of the proposed converter.

Decentralized space vector pulse width modulation method for multilevel single-phase half bridge converters

This study presents a space vector pulse width modulation (PWM) method for a multilevel single-phase decentralized power converter (DPC) called MSPDPC. The proposed model is built by connecting half-bridge cells in series. The output voltage can be adjusted according to demand by adding or subtracting cells. Cells use communication protocols to transmit and receive information with two neighboring cells. The received data contains information for the decentralized space vector pulse width modulation (DSVPWM) method proposed in this paper. In the proposed DSVPWM method, cells set up links to exchange information such as cell position, total cells in a phase, reference voltage amplitude, and reference frequency. The PWM control signals of each cell are calculated based on the information received. The study also focuses on evaluating the ability to adjust the switching vector and the corresponding dwell time of the cells when the structure of the DPC changes. The ability to dynamically reconfigure the DPC is a crucial feature that ensures uninterrupted power supply in case of one or several cell failures. The system automatically establishes a new state with the active cells. The proposed configuration and communication method between cells provide very fast configuration times. The load voltage of the DPC is adjusted to 0.5 times the voltage per cell, which allows the modulation voltage amplitude to be adjusted best according to the load requirements. The study used Matlab/Simulink software to review the initial assessments. The proposed model and algorithms will be verified on the Digital Signal Processor (DSP) platform with a 220V/500W load.

3-Phase multi-inverter with cascaded H-bridge inverter designing and implementation for renewable system

Several applications of Distributed Generation networks uses Multilevel inverters, specifically photo voltaicsystems. Few major benefits of the Multilevel inverters are its power quality and the output voltages generated from the small PV voltage sources are high.Furthermore, AC output voltage is low for these inverters and it is nearly 400 V (phase to phase voltage). This research developed a compact three-phase modular multilevel inverter with symmetrical decomposition and asymmetrical of input multi-terminal for various PV system’s ratings. The 3-phase inverter proposed uses lower number of components. The design incorporates multiple carrier PWM for reduction of THD. The PV panels are related at every 3 phase VSI (Voltage Source inverter’s) DC side. The 3-phase isolation transformer with primary open-end windings, connects 3-phase VSIs AC sides in which multilevel operation are ensured. Three half-bridge cells for each phase for 7-level output voltage generation are combined. Proposed inverter is evaluated by comparing with existing methods such as Neutral-Point-Clampedthree-phase Multi Level Inverter (NPC-MLI), Multi Level Inverter with Linear Discriminate Notation Reactor (MLI with LDNR) and Cascaded H-bridge Multi Level Inverter (CHBMLI). Hence the proposed TPM-CHI achieves 2.1 V and 2.2amps of THD under symmetric disposition, 2.2 V and 2.4amps of THD under asymmetric disposition.

Design and Hardware Implementation of an IGBT-Based Half-Bridge Cell for Modular Voltage Source Inverters

This article presents the design and hardware implementation of an IGBT-based half-bridge voltage source inverter (VSI) to be used as a basic cell to assemble VSIs of different topologies in modular ways. Herein, we have presented the design methodology and utilized techniques for reducing stray inductances and EMI radiation on the printed circuit board, as well as the way to calculate and select the main electronic components. For the design of the circuit board, local regulations for grid interconnection and international standards were considered in order to obtain a safe and reliable electronic power cell. The developed hardware was subjected to different tests using AC electric motors as loads to validate its design. Two VSIs topologies were evaluated: a single-phase two-level full-bridge inverter and a three-phase two-level inverter. The experimental results validated the theory and demonstrated the excellent performance, reliability, and high efficiency of the developed half-bridge power cell for modular VSIs.

Three-Phase Six-Level Multilevel Voltage Source Inverter: Modeling and Experimental Validation.

This research proposes a three-phase six-level multilevel inverter depending on twelve-switch three-phase Bridge and multilevel DC-link. The proposed architecture increases the number of voltage levels with less power components than conventional inverters such as the flying capacitor, cascaded H-bridge, diode-clamped and other recently established multilevel inverter topologies. The multilevel DC-link circuit is constructed by connecting three distinct DC voltage supplies, such as single DC supply, half-bridge and full-bridge cells. The purpose of both full-bridge and half-bridge cells is to provide a variable DC voltage with a common voltage step to the three-phase bridge’s mid-point. A vector modulation technique is also employed to achieve the desired output voltage waveforms. The proposed inverter can operate as a six-level or two-level inverter, depending on the magnitude of the modulation indexes. To guarantee the feasibility of the proposed configuration, the proposed inverter’s prototype is developed, and the experimental results are provided. The proposed inverter showed good performance with high efficiency of 97.59% following the IEEE 1547 standard. The current harmonics of the proposed inverter was also minimized to only 5.8%.

Simulation Model to Analyze the Consequences of DC Faults in MMC-Based HVDC Stations

The global development of high-voltage direct-current (HVDC) systems in fields such as renewable energy sources, interconnection of asynchronous grids or power transmission over great distances, is unquestionably important. Though widely used, the modular multilevel converter with half-bridge cells is sensitive to DC pole-to-pole faults and the time-response of the protections is critical. Reliability and availability are paramount: circuit-breakers must minimize the effects of any fault on the converter, while ensuring rapid restart. This paper focuses on the modelling aspects to analyse the behaviour of HVDC stations during DC pole-to-pole faults, using either AC or DC circuit-breakers, with different parameters. The proposed model can represent the main issues met by the converter cells during DC faults, such as semiconductor overcurrents and overvoltages, allowing a proper design of the cells.

Switched Capacitor Based Cascaded Half-Bridge Multilevel Inverter With Voltage Boosting Feature

Cascaded multilevel inverter (CMI) topology is prevalent in many applications. However, the CMI requires many switches and isolated dc sources, which is the main drawback of this type of inverter. As a result, the volume, cost and complexity of the CMI topology are increased and the efficiency is deteriorated. This paper thus proposes a switched-capacitor-based multilevel inverter topology with half-bridge cells and only one dc source. Compared to the conventional CMI, the proposed inverter uses almost half the number of switches, while maintaining a boosting capability. Additionally, the main drawback of switched-capacitor multilevel inverters is the capacitor inrush current. This problem is also averted in the proposed topology by using a charging inductor or quasi-resonant capacitor charging with a front-end boost converter. Simulation results and lab-scale experimental verifications are provided to validate the feasibility and viability of the proposed inverter topology.

Design and Analysis of Multilevel Inverter based on Cascaded Half-Bridge and Three-Phase Unfolder Circuit

In this paper, a multilevel inverter based on cascaded half-bridge and three-phase unfolder is proposed. The proposed inverter design is simulated by using MATLAB Simulink. The converter is designed with four series-connected half-bridge cells and a three-level neutral-point-clamped inverter. The proposed converter is able to produce an output voltage of 230V and a frequency of 50 Hz. There are two modulation techniques implemented for the proposed inverter topology namely; phase-shifted modulation and phase opposition disposition modulation. The basic principle of operations using both modulation techniques including the performance analysis are presented.

A Compact High-Power Non-Inverting Bidirectional Buck-Boost Chopper for Onboard Battery Energy Storage Systems

This article proposes a non-inverting bidirectional buck-boost chopper accompanied by an auxiliary converter for battery storage that is installed in a light rail vehicle. The proposed chopper is composed of two half-bridge cells called the main converter, an auxiliary converter consisting of many full-bridge converters connected in cascade, and a small-sized inductor. It is controlled such that the capacitors of the auxiliary converter store and release most of the chopper energy instead of relying solely on a bulky and heavy inductor. As a result, it is lighter and smaller than the four-switch non-inverting buck-boost chopper. The operation, as well as the control of the proposed chopper, are experimentally tested using a down-scaled prototype. Further, a comparison with the four-switch non-inverting buck-boost chopper with respect to mass, volume, and efficiency is made to verify the efficacy of the proposed chopper.

A Universal Mathematical Model of Modular Multilevel Converter with Half-Bridge

Modular multilevel converters (MMCs) play an important role in the power electronics industry due to their many advantages, such as modularity and reliability. In the current research, the simulation method is used to study the system. However, with the increasing number of sub-modules (SMs), it is difficult to model and simulate the system. In order to overcome these difficulties, this paper presents a universal mathematical model (UMM) of MMC using half-bridge cells as SMs. The UMM is a full-scale model with switching state, capacitance, inductance, and resistance characteristics. This method can calculate any number of SMs, and it does not need to build a simulation model (SIM) of physical MMC—in particular, parametric design can be realized. Compared with the SIM, the accuracy of the proposed UMM is verified, and the computational efficiency of the UMM is 8.7 times higher than the simulation method. Finally, by utilizing the proposed UMM method, the influence of the parameters of MMCs is studied, including the arm induction, SM capacitance, SM number, and output current/voltage total harmonic distortion (THD) based on the UMM in the paper. The results offer an engineering insight to optimize the design of MMCs.

Performance Analysis of a Half Bridge Cell Based Asymmetrical Multilevel Inverter Topology with Minimum Components

Background: In Multilevel Inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods: This paper deals with an asymmetrical cascaded H-bridge inverter topology with half bridge cells to produce seven level output voltage waveform. Nearest Level Control (NLM) technique is used to produce the switching pulses. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. Comparison between the proposed MLI and recent topologies demonstrates the advantageous features. Conclusion: The simulation and hardware results confirm the suitability of the proposed seven level MLI as the total component count, and the requirement of DC sources reduces considerably.

Novel Enhanced Modular Multilevel Converter for High-Voltage Direct Current Transmission Systems

This paper proposes an enhanced modular multilevel converter as an alternative to the conventional half-bridge modular multilevel converter that employs a reduced number of medium-voltage cells, with the aim of improving waveforms quality in its AC and DC sides. Each enhanced modular multilevel converter arm consists of high-voltage and low-voltage chain-links. The enhanced modular multilevel converter uses the high-voltage chain-links based on medium-voltage half-bridge cells to synthesize the fundamental voltage using nearest level modulation. Although the low-voltage chain-links filter out the voltage harmonics from the voltage generated by the high-voltage chain-links, which are rough and stepped approximations of the fundamental voltage, the enhanced modular multilevel converter uses the nested multilevel concept to dramatically increase the number of voltage levels per phase compared to half-bridge modular multilevel converter. The aforementioned improvements are achieved at the cost of a small increase in semiconductor losses. Detailed simulations conducted in EMPT-RV and experimental results confirm the validity of the proposed converter.

Three phase modular multilevel inverter-based multi-terminal asymmetrical DC inputs for renewable energy applications

This paper introduces a compact three-phase modular multilevel inverter (MMLI) based on asymmetrical input multi-terminal for different ratings of PV systems. The proposed three-phase inverter utilizes reduced component counts. It combines three half-bridge cells for each phase for 7-level output voltage generation. Therefore, the proposed MLI exhibits less number of switching devices for the cost aspects as well as control simplicity. The proposed inverter is analyzed for modular operation and supported by a vital comparative study to show the inverter merits. The proposed MMLI is investigated and analyzed using Matlab/Simulink. Finally, the MMLI is experimentally validated.

A New and Generalized Structure of MLI Topology with Half-bridge Cell with Minimum Number of Power Electronic Devices

Rapid developments in the field of high-power, high-voltage applications have led to a tremendous increase in the popularity and utility of multilevel inverters. The requirement of reduced harmonics coupled with an ever-increasing demand for clean and renewable energy sources has led to a great interest in the multilevel inverter. This paper presents a novel architecture of a single-phase multilevel inverter that utilizes fewer power electronic switches and driver circuits than various popular multilevel inverter circuits. The design presented is generalized in nature, thereby allowing for the generation of any number of levels in the output voltage. The working and modes of operation of the 9-level symmetrical configuration of the proposed topology is extensively elaborated. Simulation results from MATLAB Simulink as well as real-time hardware results have been included to verify the existence and proper working of the proposed 9-level symmetrical and 15-level asymmetrical inverter. Comparison results with other discussed configurations are also included to further establish the advantages possessed by the proposed circuit.

Optimization Methods to Reduce Capacitor Stress in Modular Multilevel Converters

Modular multilevel converters consist of many capacitor half-bridge or full-bridge converter cells. Stresses on the capacitors result from peak capacitor voltage, capacitor voltage ripple and current ripple. Three new tractable convex optimisation problems are presented that reduce peak capacitor voltage and limit rms arm current using injected zero-sequence voltages, circulating currents and selecting the initial stored capacitor energy. These optimisation problems are compared to assess their performance in terms of key indicators which include factors related to capacitor stress, capacitor and semiconductor ratings, and power loss: peak capacitor voltage, capacitor voltage ripple, capacitor current ripple, average and rms arm current. The optimisation methods permit designers to understand the trade-offs in achieving the limits imposed by device specifications and power losses.

Eigenvalue Optimization of the Energy-Balancing Feedback for Modular Multilevel Converters

Despite its potential impact on the balancing performance, current literature on the modular multilevel converter (MMC) energy-balancing feedback gain design and tuning process seem incomplete. In order to close this research gap, the energy-balancing feedback gain tuning of an ac current controlled MMC with half-bridge cells and isolated star point is considered in this paper. The tuning is difficult, because each energy error adds its own dedicated component to the circulating current reference that leads to a strong coupling that evades common tuning approaches. This problem is solved in two steps: at first, the relevant error dynamics is extracted and validated to model the time domain behavior of the energy balancing. Second, a theorem from Wu (1975) is invoked to easily calculate the closed-loop eigenvalues that finally allow for an easy optimization of the energy-balancing performance. Despite the radical simplifications during the modeling and error dynamics extraction, the acquired model is able to adequately reproduce the energy errors and the balancing circulating current of the converter. Simulation and measurement results on a grid-side MMC demonstrate a considerable performance improvement in contrast to the traditional gain estimation on the open loop. This is verified with and without a second harmonic in the circulating currents.

Solid-State Bipolar Pulsed-Power Modulator Based on a Half-Bridge Power Cell Structure

This paper addresses the design of a solid-state bipolar pulsed-power modulator based on a series of stacked power cells that realize a simple and robust structure. Each cell is charged in parallel by an LCC resonant converter independently of the discharging loop. A passive cell-balancing design is implemented. The power cell using insulated gate bipolar transistors (IGBTs) can operate in bypass mode without an additional component, and the circuit operation was analyzed. A simple gate driving method, which provides synchronized gate signals without an extra power source of each gate driver using two control loops and isolation transformers, is implemented for the proposed bipolar pulsed-power modulator based on stacked cells. Moreover, an unexpected gate turn-on problem was solved by an additional off signal. To validate the proposed structure and the gate driving scheme, a three-cell, 1.2-kV, 110-A, 1.5- to 4- $\mu \text{s}$ , 3-kHz laboratory experimental prototype test was conducted. The results proved the reliability of the proposed solid-state bipolar pulsed-power modulator.

Implementation of a Solar based Seven Level Asymmetrical Multilevel Inverter Topology with reduced device count

A multilevel inverter with half bridge cells and seven switches is implemented for Solar PV based applications. The photovoltaic panels are employed to replace the DC sources and maximum power is ensured by employing a boost converter andPerturb and Observe(P&O) algorithm. The generation of switching pulses is carried by usingNearest Level Control(NLC) technique.The operating principle of the proposed multilevel inverter(MLI) is verified by utilizing different loads and the experimental results are obtained through prototype testing.

Large Step Ratio Input-Series–Output-Parallel Chain-Link DC–DC Converter

High-voltage and high-power dc–dc conversion is key to dc transmission, distribution, and generation, which requires compact and efficient dc transformers with large step ratios. This paper introduces a dc–dc converter with the input-series–output-parallel arrangement of multiple high step ratio subconverter units. Each subconverter unit is an isolated modular dc–dc converter with a stack of half-bridge cells chopping the dc down to low voltage level. The transformer provides galvanic isolation and additional step ratio. The converter achieves a large step ratio due to the combination of the series-parallel configuration, the modular cells, and the isolation transformer. The proposed dc–dc converter is analyzed in a 30 kV–1 kV, 1-MW application to discuss the operation performance, tradeoffs, power efficiency, and selection of components. Finally, the converter is validated through a laboratory downscaled prototype.