Gm-C Circuits Research Articles

A Mixed-Signal RF Pulse Width Modulator With High Time Resolution Utilizing Passive Delay Lines

We present a novel mixed-signal single-output outphasing RF Pulse Width Modulator (RF PWM) realized in 40nm CMOS. Two Digital-to-Time Converters (DTCs) synchronously phase shift an external LO according to two 9-bit outphasing input words. Coarse time quantization is provided by tapping the internal nodes of passive integrated LC delay lines. Finer resolution is added using switching capacitors of a Gm-C circuit attaining minimum time steps of 6ps/750fs respectively. “Hair-pin” inductors with minimized footprint have been employed for the silicon realization of each LC delay line. Measurement yields an ACLR of approx. −42 dBc from a 32 MHz BW multi-tone signal on a 2.65 GHz carrier.

An Interface ASIC for MEMS Vibratory Gyroscopes With a Power of 1.6 mW, 92 dB DR and 0.007°/s/<inline-formula> <tex-math notation="LaTeX">$\sqrt {\rm {Hz}} $ </tex-math> </inline-formula> Noise Floor Over a 40 Hz Band

This paper reports on the implementation of an interface ASIC for MEMS vibratory gyroscopes exhibiting a wide tuning range from 7 to 31 kHz with a power consumption of 1.6 mW and a dynamic range of 92 dB over a signal band of 40 Hz. The drive loop of the system employs a high voltage stage based on flying capacitors for the excitation of the drive mass allowing a startup time of 44 ms. For the detection of the Coriolis signal, a fourth-order closed-loop electro-mechanical sense loop deploying continuous-time (CT) circuit techniques and $\Delta \Sigma $ -modulation is implemented. The sense loop deploys a high-Q electronic resonator based on gm-C circuits and a collocated charge-integrator for signal readout and for generating feedback forces. The readout interface with an active circuit area of $2.42~\text {mm}^{2}$ is fabricated in a $0.35~\mu \text {m}$ CMOS technology with a HV-module. The ASIC achieves a noise floor of $0.007^{\circ } /\rm {s}/\sqrt {\rm {Hz}}$ over 40 Hz while the full-scale range is higher than ±1400°/s and the bias stability measures 2.6°/h. The wide tuning capability of the ASIC is demonstrated on the basis of two tested MEMS gyroscopes for different applications with an equal ASIC performance.

OTA-C based high-speed analog processing for real-time fault location in electrical power networks

This paper explores the potential and limitations of analog integrated circuit techniques for the simulation of low-loss or lossless 1D or 2D transmission mediums. In this approach, a transmission line is mapped into a ladder consisting of N identical LC elements, each modeling a finite length increment of the line. Inductors are then emulated by a gyrator-capacitor combination, yielding a classical transconductor-capacitor (gm-C) circuit, suitable for integration. The validity of this approximation is discussed in the context of fault location in power networks, an application based on the electromagnetic time-reversal method. Design constraints on gm-C circuits are derived and non-ideal effects such as finite open-loop gain and component mismatches are evaluated. It is shown that a simple analog implementation can locate the fault within 1 % accuracy with a significant speed advantage over classical computational methods, reducing the processing time to <100 ms.

A Transistor-Level Reconfigurable Circuit for Rapid Transconductor Design and Testing

In modern mixed-signal systems-on-a-chip (SoC), a key role is played by the analog filter. For intermediate frequency (IF) bands, the filtering function is best performed with Gm-C structures. The active element of Gm-C circuits is the transconductor, the design of which is particularly difficult due to the multiple and conflicting design specifications. This article proposes a reconfigurable transconductor to aid the task of transconductor design. Transistor level reconfigurability enables rapid conception, design and testing of various transconductor topologies. Extensive simulation proves the feasibility and usefulness of the proposed reconfigurable circuit. Ill. 8, bibl. 12, tabl. 5 (in English; abstracts in English and Lithuanian).DOI: http://dx.doi.org/10.5755/j01.eee.117.1.1062

Multistandard Analogue Baseband Filters for Software-Defined and Cognitive Radio Receivers

Analogue baseband filters are an important circuit for channel select and anti-aliasing in wireless and mobile communication systems. For software and cognitive radio, they must be widely tunable and reconfigurable to accommodate existing, emerging, and future wireless and mobile standards. In this paper, design considerations of tunable and programmable filters for highly integrated multistandard receivers are presented. General background of multistandard integrated receivers and design challenges of analogue baseband filters are given. Circuit techniques for baseband filter design including the widely used active-RC and Gm-C circuits are described. Filter structures and design methods for high-order baseband filters are reviewed. On-chip tuning issues and methods are discussed. Results and performances of some published design examples are summarized. Future directions are also pointed out.

A Fully Differential CMOS Voltage Buffer for Continuous- and Discrete-Time Applications

This paper presents a new CMOS analog fully differential voltage buffer, with large dynamic range and low harmonic distortion. Its design is based on the use of cross-coupled input differential pairs and internal current feedback. Two design approaches are proposed, with the objective of minimizing power consumption: one for switched-capacitor circuits and the other for Gm-C circuits. Design equations and simulation results are presented as well. Illustrative design examples are developed for a 0.35-μm CMOS technology using a power supply voltage of 2.5 V.

A Programmable 210-&lt;formula formulatype="inline"&gt;&lt;tex&gt;$\mu$&lt;/tex&gt;&lt;/formula&gt;V Offset Rail-to-Rail &lt;formula formulatype="inline"&gt;&lt;tex&gt;${G}_{m}$&lt;/tex&gt; &lt;/formula&gt;&amp;#x2013;&lt;formula&gt;&lt;tex&gt;$C$&lt;/tex&gt;&lt;/formula&gt; Filter

Low input-referred offset performance and linearity in analog filters are critical design parameters, yet transistor mismatch limitations are a severe hindrance. Programmability is also a feature of growing significance because high performance state-of-the-art systems must adapt on-the-fly to various operating conditions, as is the case in battery-operated electronics where systems traverse through idle, alert, and high performance modes in an effort to conserve energy and extend battery life. This paper presents a continuous and programmable first-order Gm-C filter with sub-millivolt offset performance. Low offset is achieved by auto-zeroing and continuity by ping-ponging between two transconductors, all under the construct of a compact and bandwidth-efficient circuit topology. The proposed Gm-C circuit was fabricated with AMI's 0.5-mum CMOS process technology and achieved an input-referred offset of less than 210 muV, hand-over glitches of less than 40 mV, and 57 dB of linearity over the rail-to-rail input span for a lithium-ion battery supply range of 3 to 4.2 V. The bandwidth and gain of the filter were programmable from 1.1 to 6.5 kHz and 1.27 to 29.1 V/V, respectively, both with better than 3.2% resolution.

A Transformation Method from Voltage-Mode OP-Amp-RC Circuits to Current-Mode Gm-C Circuits

A new transformation method is presented and used to transform voltage-mode op-amp-RC circuits to current-mode Gm-C ones. The proposed method enables the generation of high-performance Gm-C filters that benefit from the advantages of good and well-known op-amp-RC structures and the advantages of the current-mode circuits, and at the same time feature electronic tunability, high frequency capability, and monolithic integration ability. An attractive feature of the proposed method is that it results in Gm-C structures with only grounded capacitors in spite of the presence of floating capacitors in the original op-amp-RC circuits and it utilizes a small number of transconductors. Moreover, simultaneous multiple outputs are easily available in the transformed current-mode Gm-C circuits.

A low-frequency, continuous-time notch filter using Gm-C circuits

A 60Hz notch filter that can be integrated on a chip is reported. Gm-C filters are used for the necessary time constant multiplication. This filter can easily be tuned and is relatively insensitive to temperature variation. The notch depth can reach 60dB.

Design considerations for integrated continuous-time chaotic oscillators

This paper presents an optimization procedure to choose the chaotic state equation which is best suited for implementation using Gm-C integrated circuit techniques. The paper also presents an analysis of the most significant hardware nonidealities of Gm-C circuits on the chaotic operation-the basis to design robust integrated circuits with reproducible and easily controllable behavior. The techniques in the paper are illustrated through a circuit fabricated in 2.4-/spl mu/m double-poly technology.