Full-Duplex Wireless Transceivers Research Articles

A FULL DUPLEX 5G WIRELESS COMMUNICATION SYSTEM USING NI USRP 2944

Full-duplex (FD) transmission is an emerging wireless technology that holds a great promise in improving the wireless throughput. The concept of fullduplex communication is simple. A single device can simultaneously transmit and receive on the same frequency channel. However, as the transmitted signal is many orders of magnitude stronger than the desired signal at the input of the receiver, it is extremely challenging to recover the desired signal and enable such a communication. In particular, the self-interfering (SI) signal needs to be suppressed by a factor of a billion to a trillion, requiring 90 − 120 dB of self-interference cancellation (SIC). Full-duplex wireless transceivers are typically operated over two concurrent half duplex channels, one for the transmitter (Tx) and one for the receiver (Rx). These half-duplex links have RF carriers separated in the frequency domain, namely using a TDD or Frequency Division Duplexing (FDD) scheme. This allows the receiver’s sensitive front-end to be isolated from the high power generated by the co-located transmitter. In this paper, a full duplex communication system is implemented using Universal Software Radio Peripheral (USRP) and interfaced to a system installed with LabVIEW software. IQ signals transmission scenario was applied and tested.

2.4 GHz dual polarised monostatic antenna with simple two‐tap RF self‐interference cancellation (RF‐SIC) circuitry

This Letter presents a dual polarised monostatic patch antenna with a simple two-tap RF/analogue domain-based self-interference cancellation (SIC) (RF-SIC) circuitry to achieve high interport isolation in a comparatively wider bandwidth for a 2.4 GHz in-band full duplex wireless transceiver. A brief mathematical description for the deployed two-tap RF-SIC is also presented to provide insight into self-interference (SI) suppression in a comparatively wider bandwidth. The implemented antenna with a two-tap RF-SIC circuitry achieves around 80 dB T-x-R-x isolation for a 20 MHz bandwidth in addition to more than 90 dB peak isolation for measurements performed in a lab environment where SI may result from the nearby placed objects. The deployed two-tap RF-SIC circuit can be tuned to effectively cancel out SI caused by reflections of the radio signal from the surroundings. Moreover, an 80 dB isolation bandwidth can be tuned within a 10 dB return loss bandwidth of the implemented dual polarised antenna.

System-Level Analysis of Phase Noise in Full-Duplex Wireless Transceivers

A system-level analysis of phase noise in full-duplex wireless transceivers is presented. It quantitatively relates phase-noise-induced residual self-interference (SI) noise power spectral density with full-duplex system design parameters, such as the amount of SI suppression in the antenna and RF domains, the SI channel delay, voltage-controlled oscillator (VCO) phase noise and figure of merit, and VCO power consumption. Full-duplex transceiver noise simulations and SI cancelation measurements validate our results.

Integrated Quasi-Circulator With RF Leakage Cancellation for Full-Duplex Wireless Transceivers

An integrated reconfigurable CMOS quasi-circulator operating at 2.4 GHz is presented. A passive structure delivers transmit power amplifier (PA) output signal to the differential low-noise amplifier (LNA) input as a common-mode signal and simultaneously delivers received signal as a differential-mode signal at the LNA input. The leakage of the PA output signal at the LNA input is reduced in two steps. First, the use of a reconfigurable impedance matching circuit, instead of a fixed 50- $\Omega $ resistance reduces the leakage by compensating the antenna impedance mismatch, and improves transmitter–receiver isolation. Second, a reconfigurable summing stage adds amplitude and phase adjusted PA output signal to LNA output to cancel the residual PA output leakage. Measurement results show that the receiver achieves a reduction of 90 dB for a single tone and more than 50 dB for a QPSK modulated 40-MHz bandwidth transmit signal. The receiver gain is more than 10 dB and the noise figure in the receiver path is 4.5 dB. The reconfigurable quasi-circulator along with the receiver LNA is designed and fabricated on a 130-nm CMOS technology. The cancellation circuitry occupies 0.27 mm2 and consumes 30-mW quiescent power, while the total active area of the chip is 1 mm2, and it consumes 65-mW power.

Full-duplex radios for vehicular communications

Recent significant advances in self-interference cancellation techniques pave the way for the deployment of full-duplex wireless transceivers capable of concurrent transmission and reception on the same channel. Despite the promise to theoretically double the spectrum efficiency, full-duplex prototyping in off-the-shelf chips of mobile devices is still in its infancy, mainly because of the challenges in mitigating self-interference to a tolerable level and the strict hardware constraints. In this article, we argue in favor of embedding full-duplex radios in onboard units of future vehicles. Unlike the majority of mobile devices, vehicular onboard units are good candidates to host complex full-duplex transceivers because of their virtually unlimited power supply and processing capacity. Taking into account the effect of imperfect self-interference cancellation, we investigate the design implications of full-duplex devices at the higher-layer protocols of next-generation vehicular networks and highlight the benefits they could bring with respect to half-duplex devices in some representative use cases. Early results are also provided that give insight into the impact of self-interference cancellation on vehicle-to-roadside communications, and showcase the benefits of FD-enhanced medium access control protocols for vehicle-to-vehicle communications supporting crucial road safety applications.

System-Level Design of a Full-Duplex Wireless Transceiver for Brain–Machine Interfaces

We propose a new wireless communication architecture for implanted systems that simultaneously stimulates neurons and record neural responses. This architecture can support large numbers of electrodes (>500), providing 100 Mb/s for the downlink of stimulation signals, and gigabits per second for the uplink of neural recordings. We propose a full-duplex transceiver architecture that shares one antenna for both the ultrawideband (UWB) and the 2.45-GHz industrial, scientific, and medical band. A new pulse shaper is used for the gigabits per second uplink to simplify the transceiver design, while supporting several modulation formats with high data rates. To validate our system-level design for brain–machine interfaces, we present an ex-vivo experimental demonstration of the architecture. While the system design is for an integrated solution, the proof-of-concept demonstration uses discrete components. Good bit error rate performance over a biological channel at 0.5-, 1-, and 2-Gb/s data rates for uplink telemetry (UWB) and 100 Mb/s for downlink telemetry (2.45-GHz band) are achieved.