Full-bridge Power Factor Correction Research Articles

A duty cycle generation scheme for the three‐phase single‐stage full‐bridge PFC in balanced‐grid

In this Letter, the duty cycle generation scheme is presented and implemented, which can improve the input performances of the three-phase single-stage full-bridge power factor correction (PFC) converter. The analysis and discussion is aiming at the operation of the PFC converter in balanced grid condition. On the basis of the instantaneous expression of the three-phase input current, the ideal duty cycle of each phase is obtained. To achieve a good PF for each phase, a simplified duty cycle generation scheme is presented and implemented in the three-phase PFC converter. The simulating and experimental results based on a 500 W prototype show that after adoption of the presented duty cycle generation scheme, a higher PF has been achieved for each phase of the three-phase PFC converter.

Design of an 11 kW power factor correction and 10 kW ZVS DC/DC converter for a high-efficiency battery charger in electric vehicles

Usually a battery charger for the electric vehicle consists of a power factor correction (PFC) and a DC/DC converter, both of which require the high-efficiency operation. In this study, a three-phase 11 kW full-bridge PFC is designed to transform the grid voltage to 400 VDC and reach the grid-side power factor equal to 1. This circuit adopts the symmetric space vector pulse width modulation, which effectively decreases the electrical stress of switches compared with other algorithms. The generated 400 VDC directly drives a CoolMOS-based 10 kW full-bridge DC/DC converter, that utilises the zero-voltage-switching technique to maintain the high efficiency. Experimental results validate that (i) the PFC part could reach 97–98% efficiency from 5 to 10 kW and (ii) the efficiency of the DC/DC part could reach ∼97%at10 kW for 200–400 V output and 95.9% for 400–450 V output. Fast reverse recovery diodes and SiC Schottky diodes are also experimentally compared in this prototype.

PFC Full Bridge Rectifiers EMI Modeling and Analysis—Common Mode Disturbance Reduction

Switched mode power supplies must comply with electro-magnetic interference (EMI) regulations. Due to technological improvements, switching frequencies have been increased leading to reduced passive component values but also greater EMI levels, especially conducted common mode disturbances. This paper presents a simple and effective EMI forecast method to study and to analyze the conducted EMI effects before prototype testing. The methodology is validated and applied to the single phase full bridge power factor correction (PFC) rectifier. Several techniques to reduce common mode current (CMC) levels created by the converter are presented. The study is based on high frequency models and understanding of phenomenon. Looking at the control strategies and/or the propagation paths, it is demonstrated that EMI levels may be reduced. It is shown that with symmetrical EMI propagation paths, synchronized control strategies such as bipolar pulse width modulation (PWM) are preferred and lead to reduced CMC levels. On the other hand, with asymmetrical propagation paths, unipolar and half bridge control strategies may be preferred to reduce both differential mode current (DMC) and CMC levels. Results are validated using practical experiments performed under EMI regulation testing conditions.