Free-running Injection-locked Frequency Divider Research Articles

Frequency tuning hysteresis of a dual‐resonance divide‐by‐three cross‐coupled injection‐locked frequency divider

This paper studies the frequency tuning effect on the locking range property of a dual-resonance 3:1 injection-locked frequency divider (ILFD) fabricated in a foundry 0.18 μm BiCMOS process. The ILFD architecture is based on a capacitive cross-coupled oscillator in conjunction with a resistor-degraded dual-resonance resonator for the locking range improvement. At a power consumption of 5.26 mW and at injection power of P inj = 0 dBm the locking range from the measurement is from 6.2 to 12.6 GHz (68.09%). The frequency tuning range of the free-running ILFD shows a frequency tuning hysteresis effect; at low input power level the locking range shows bipolar locking ranges and at high injection power the locking range is independent of the measured voltage tuning direction.

A triple-band divide-by-2 CMOS injection-locked frequency divider

A triple-band and wide operation range divide-by-2 injection-locked frequency divider (ILFD) using a TSMC 0.18 μm 1P6 M CMOS technology is presented. The ÷2 ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator with a 6th order LC resonator constructed from three single-resonance parallel LC resonators. The core power consumption of the ILFD core is 11.6 mW at the supply voltage of 1 V. The free-running ILFD can operate at three frequency bands: 8.75, 5.79 and 3.7 GHz, and the ILFD operation range covers a high-band frequency range from 17.1 to 18.3 GHz, a middle-band from 10.1 to 12.7 GHz, and a low-band from 6.0 to 7.7 GHz. The band selection is obtained by tuning the varactor's control bias.

Low power wide‐locking range CMOS quadrature injection‐locked frequency divider

AbstractThis letter presents a new low power and wide‐locking range divide‐by‐2 injection‐locked frequency divider (ILFD). The ILFD consists of a new 5.35 GHz quadrature voltage controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.18 μm CMOS technology and the core power consumption is 5.72 mW at the supply voltage of 0.8 V. The free‐running frequency of the QILFD is tunable from 5.24 to 5.55 GHz. At the input power of 0 dBm, the divide‐by‐2 locking range is from 8.2 to 13.3 GHz as the tuning voltage is biased at 0.8 V. The phase noise of the locked output spectrum is lower than that of free running ILFD in the divide‐by‐2 mode. The phase deviation of quadrature output is about 1.28°. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2420–2423, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24640

Low-power divide-by-3 injection-locked frequency dividers implemented with injection transformers

A new divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD consists of a 7.6 GHz voltage controlled oscillator (VCO) and two transformers, which are in series with the cross-coupled transistors in the VCO for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.13 m CMOS technology. At the supply voltage of 0.8 V, the core power consumption is 1.25 mW, and the free-running frequency of the ILFD is tunable from 7.2 to 7.87 GHz. At the input power of 0 dBm, the total divide-by-3 locking range is from 21.56 to 23.63 GHz as the tuning voltage is varied from 0.0 to 0.8 V. The phase noise of the locked ILFD output is lower than that of the free-running ILFD in the divide-by-3 mode.

CMOS top‐series coupling quadrature injection‐locked frequency divider

AbstractThis article presents a new divide‐by‐2 injection‐locked frequency divider (ILFD). The ILFD consists of a 2.1‐GHz top‐series quadrature voltage‐controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed CMOS ILFD uses three‐dimensional inductor to save chip area and has been implemented with the TSMC 0.18‐μm CMOS technology and the core power consumption is 9.36 mW at the supply voltage of 0.9 V. The free‐running frequency of the ILFD is tunable from 2.02 to 2.28 GHz. At the input power of −8 dBm, the total divide‐by‐2 locking range is from 3.6 to 6.05 GHz as the tuning voltage is varied from 0 to 0.9 V. The phase noise of the locked output spectrum is lower than that of free running ILFD in the ÷2 mode. The phase deviation of quadrature output is about 0.19°. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2554–2557, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23724

CMOS switched resonator frequency divider tuned by the switch gate bias

AbstractA switched resonator injection‐locked frequency divider (ILFD) designed and fabricated using a standard 0.18‐μm CMOS process is presented. The designed ILFD consists of double cross‐coupled MOS switching pairs that use the current reuse technique to save power dissipation, and a switched LC resonator. The latter is composed of an inductor, a capacitor, and an inductor–MOS–inductor composite in parallel. The gate bias of MOSFET in the switched resonator is used to tune the free running ILFD frequency and extend the locking range of the ILFD. Measurement results show that at the supply voltage of 1.8 V, the divider free‐running frequency is from 3.8 to 4.5 GHz, and at the incident power of 0 dBm the locking range is from the incident frequency of 7.6 to 9.26 GHz. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 222–225, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23045

A Wide Locking Range Differential Colpitts Injection Locked Frequency Divider

This letter proposes a new wideband Colpitts injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit consists of a differential CMOS LC-tank oscillator and a direct injection topology. The divide-by-two ILFD can provide wide locking range, and the measurement results show that at the supply voltage of 2.4 V, the tuning range of the free running ILFD is from 4.46 to 5.6 GHz, about 1.14 GHz, and the locking range of the ILFD is from 8.03 to 11.63 GHz, about 3.6 GHz, at the injection signal power of 0 dBm. The ILFD dissipates 19.92 mW at a supply voltage of 2.4 V and was fabricated in 1P6M 0.18 mum CMOS process. At the tuning voltage of 1.2 V, the measured phase noise of the free running ILFD is -110.8 dBc/Hz at 1 MHz offset frequency from 4.94 GHz and the phase noise of the locked ILFD is -135.4 dBc/Hz, while the input signal power is -4 dBm.

A complementary Hartley injection‐locked frequency divider

AbstractThis work proposes a new injection‐locked frequency divider (ILFD) based on the differential complementary Hartley VCO topology. At the supply voltage of 1.8 V, the tuning range of the free running ILFD is from 7.54 to 7.94 GHz, about 400 MHz, and the locking range of the ILFD is from 14.94 to 16.05 GHz, about 1.11 GHz, at the injection signal power of 0 dBm. The ILFD dissipates 13.54 mW at the supply voltage of 1.8 V and was fabricated in the 1P6M 0.18 μm CMOS process. The phase noise of the locked ILFD tracks with the low‐phase‐noise injection source. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2817–2820, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22834