FPGA-based Real-time Simulator Research Articles

Optimized Real-Time Stochastic Model of Power Electronic Converters based on FPGA

Stochastic models can effectively describe the operating characteristics of power electronic converters with stochastic parameters. However, it is difficult to implement the models in FPGA-based real-time simulation (RTS) because their high order leads to a large calculation. This paper proposes an optimized real-time stochastic modeling method for power electronic converters based on generalized polynomial chaos (gPC). Firstly, an orthogonal polynomials construction method is used based on Schmidt orthogonalization to describe stochastic variables with atypical probability distributions and provide conditions for simplifying the system model. Secondly, the method of probability space transformation is adopted to divide the system model into multiple sub-models to suppress the exponential growth of the model order while maintaining the statistical properties. This method has performed over the traditional stochastic modeling method. The proposed model is built on FPGA-based hardware-in-the-loop (HIL) experiment platform with 1us simulation step. The optimized model uses approximately 37% fewer resources than the traditional stochastic model while maintaining the same level of accuracy.

An efficient buck-boost converter for fast active balancing of lithium-ion battery packs in electric vehicle applications

This article proposes a fast active cell balancing circuit for lithium-ion battery packs. The proposed architecture incorporates a modified non-inverting buck-boost converter to improve balancing efficiency, an equivalent circuit model technique for battery designing, and an extended Kalman Bucy filter for accurate SOC estimation. The proposed balancing technique analyses a six-series and one parallel (6S1P) battery pack combination in static, charging, and discharging modes. With fewer components, the proposed architecture reduces the losses and improves the balancing performance. The design limitations, balancing principle, loss analysis, and control strategies are thoroughly investigated. The proposed topology is modelled in the MATLAB/Simulink platform to perform energy transformation analysis between stronger and weaker cells. The FPGA-based real-time simulator OPAL-RT (OP5700) validates the balancing performance of the proposed topology. For the 22V, 2200mAh battery pack the proposed topology had an overall balancing efficiency of 97.05% and a balancing speed of 1328s. The proposed topology has a 1.3% deviation in balancing efficiency and a 57s deviation in balancing speed compared to MATLAB and real-time simulation. The proposed active cell balancing architecture considerably increases balancing speed and efficiency.

A Semi-Implicit Parallel Leapfrog Solver With Half-Step Sampling Technique for FPGA-Based Real-Time HIL Simulation of Power Converters

Field Programmable Gate Array (FPGA) based Hardware-in-the-loop (HIL) simulation is an effective tool to verify the performance of physical controllers and shorten the development cycle of power converters. In HIL simulations, sampling accuracy is of concern and is desired to be improved by reducing the step size. However, due to the cost of computational time, the step size is hard to reduce indefinitely to meet the requirements for high switching frequency applications. To improve the sampling accuracy and simulation performance of HIL simulation, this paper proposes a semi-implicit parallel leapfrog (SPL) solver with half-step sampling technique. In this solver, the switches and the rest part of the system are implemented to be computed parallel when the switch leg model operates in continuous current mode. Besides, the solver is formulated in leapfrog format to reduce computational costs and to compute at half-step as a minimum step-size. With this format, the half-step sampling technique can be employed to increase the sampling rate by onefold, even in cases where it is challenging to reduce the simulation step size further. A dual active bridge converter case is implemented on the FPGA board with a 12.5-ns sampling step-size, retaining the simulation accuracy while switched at 400 kHz. To further verify the advantages, the results are compared with other HIL method and experimental results.

Component-Oriented Modeling Method for Real-Time Simulation of Power Systems

This paper proposes a component-oriented modeling method for power system simulation, which optimizes the modeling process of the FPGA-based real-time digital simulator (FRTDS) to enhance its computational efficiency. In this paper, a component modeling method for various types of elements in the power system is presented, which makes the modeling process in FRTDS more user-friendly and highly scalable. By applying the concepts of combination and reconstruction of components to electrical components, the component-oriented modeling method becomes better suited for combined elements with fixed connection modes and elements that require online model replacement in the power system. Utilizing the characteristics of component-oriented modeling, the variable declaration structure and node elimination strategy in the simulation script are optimized, enabling the simulation script to fit better with the hardware structure of FRTDS. Additionally, a substation is simulated in FRTDS with a simulation step size of 50 µs, thus verifying the correctness of the component-oriented modeling method and its ability to improve the computational power of FRTDS.

FPGA-based real-time simulation of LCC-HVDC systems with C-NAM method

FPGA-based real-time simulation of LCC-HVDC systems with C-NAM method

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

An Event-Driven Parallel Acceleration Real-Time Simulation for Power Electronic Systems Without Simulation Distortion in Circuit Partitioning

The trend toward higher switching frequency and larger scale of power electronic systems poses challenges for real-time simulation. This article presents an event-driven hardware-in-the-loop (ED-HIL) simulation framework that does not rely on the small fixed simulation step-size related to the switching frequency. ED-HIL framework can improve the calculation efficiency by positioning switch events and using variable simulation step-size. Further, a parallel acceleration and circuit partitioning (PACP) solver is proposed based on this framework. The PACP solver partitions the circuit with energy storage elements and ensures that the partitioning does not introduce simulation distortion by using the higher order derivatives of the energy storage elements. Meanwhile, it achieves a process-level paralleling through a shared memory architecture in order to accelerate the simulation. As a result, the proposed PACP solver based on the ED-HIL framework can achieve about three times the simulation scale of a commercial FPGA-based real-time simulator at 1/16 the hardware cost under the same conditions. An accurate real-time HIL example of a power electronic transformer with 32 switches at a switching frequency of 20 kHz has been implemented on a personal computer. The simulation results are analyzed by comparing with experiment, offline software, and commercial real-time simulator.

Energy management and control for direct current microgrid with composite energy storage system using combined cuckoo search algorithm and neural network

This paper describes a novel energy management strategy (EMS) based on a combined cuckoo search algorithm and neural network (CCSNN) for the control of a DC microgrid (DCMG) with composite energy storage system (CESS). The presented control technique intends to enhance the power-sharing between batteries and supercapacitors (SCs) in order to handle the demand-generation discrepancy, preserve state-of-charge (SOC) inside predetermined parameters, and manage DC bus voltage (DBV). Furthermore, the efficacy of the suggested technique for enactment in terms of voltage overshoot and settling time was compared to conventional control strategy-based findings. The results are validated by experimental studies employing a hardware-in-loop (HIL) configuration on an FPGA-based real-time simulator.

FPGA-based real-time simulation of mismatched photovoltaic arrays

This paper proposes an approach to the real time simulation of photovoltaic (PV) arrays that are subjected to mismatching conditions, e.g. partial shadowing. The method, which has been named Model by Zone (MbZ), adopts the best PV model depending on the operating conditions of the cells in the module: it switches among single-diode model (SDM), linear model and constant voltage model. An optimized digital hardware architecture exploiting parallelism of operations over a FPGA system is exploited to effectively implement the proposed model. It reduces the computation time and the use of hardware resources. The good trade-off between accuracy and computation time of the proposed technique has been demonstrated in two cases of study: by evaluating the long-term PV power production of a PV field subjected to dynamic shadowing conditions and by analyzing the model performance in a maximum power point tracking (MPPT) application. In the former case, the proposed approach improves the computation time by 182.5% with respect to methods that are available in recent literature, with a Relative Error (RE) at the Global Maximum Power Point (GMPP) lower than 0.39%. In the MPPT application, the proposed technique allows to achieve a MAPE of 0.0319% and 0.1892% in the string voltage and power calculation, respectively.

Parallel kernel solver of an FPGA‐based real‐time simulator for active distribution networks

Field-programmable gate array (FPGA)-based real-time simulators are often applied in simulations of active distribution networks (ADNs) because of their parallel architectures and low cost. The overall performance of an FPGA-based real-time simulator is mainly determined by its kernel solver, which solves the nodal equation at each simulation time step. With the increasing scale of ADNs, real-time simulations of fast switching dynamics, along with limited computation hardware, have increased the requirements of the solver in terms of both time and resource consumption. In this study, a highly parallel kernel solver is proposed to improve the simulation efficiency of the FPGA-based real-time simulator. The multi-level parallel design and its implementation, including the parallelism at the system and module and element levels, are presented in detail. A modified IEEE 123-node system with distributed photovoltaics (PVs) is then simulated using a three-FPGA-based real-time simulator. Simulation results are compared with the commercial simulation tool PSCAD/EMTDC to validate the proposed kernel solver.

Suppression of Chattering in the Real-Time Simulation of the Power Converter

The achievement of the time-step below 500-ns in the field-programmable-gate-arrays (FPGAs)-based real-time simulation is of importance for the power converters having high switching frequencies. However, most of the existing focus on addressing the power converter modeling under the continuous conduction mode (CCM). Nevertheless, toward practical applications, the modeling of discontinuous conduction mode (DCM) with a light-load is of a greater challenge due to the “chattering” around zero point. In order to solve the chattering problem under the light-load, this article proposes a zero-regulation (ZR) method for FPGA-based real-time simulation. The proposed ZR method can not only represent CCM and DCM with a unified formula but also solve the chattering problem and improve accuracy and stability. In addition, results using different switch models are also given to demonstrate the feasibility and the generality of the proposed method. Finally, a case study of the series load resonant converter is presented. Simulation results are validated against a reference model at a 100-ns time step and a 10-kHz switching frequency.

Power management and control of a grid-independent DC microgrid with hybrid energy storage system

In this paper, a novel power management strategy (PMS) for power-sharing among battery and supercapacitor (SC) energy storage systems has been proposed and applied to resolve the demand-generation difference and DC bus voltage regulation. The proposed compensation for PI controller managed hybrid energy storage systems (HESSs) provides for improved DC bus regulation with minimal battery stress levels. Further, redirections of unwaged battery currents to SCs for fast compensations in the proposed PMS enhances battery life span. Moreover, the stability analysis of DC microgrid is also evaluated. The proposed PMS effectiveness was investigated by simulations, including a comparison of peak deviations in dc bus voltage with a traditional control strategy. The results have been experimentally verified by hardware-in-loop (HIL) on an FPGA-based real-time simulator.

FPGA-based real-time simulation for EV station with multiple high-frequency chargers based on C-EMTP algorithm

The electric vehicle (EV) charging station is a critical part of the infrastructure for the wide adoption of EVs. Real-time simulation of an EV station plays an essential role in testing its operation under different operating modes. However, the large numbers of high-frequency power electronic switches contained in EV chargers pose great challenges for real-time simulation. This paper proposes a compact electromagnetic transient program (C-EMTP) algorithm for FPGA-based real-time simulation of an EV station with multiple high-frequency chargers. The C-EMTP algorithm transforms the traditional EMTP algorithm into two parallel sub-tasks only consisting of simple matrix operations, to fully utilize the high parallelism of FPGA. The simulation time step can be greatly reduced compared with that of the traditional EMTP algorithm, and so the simulation accuracy for high-frequency power electronics is improved. The EV chargers can be decoupled with each other and simulated in parallel. A CPU-FPGA-based real-time simulation platform is developed and the proposed simulation of the EV station is implemented. The control strategy is simulated in a CPU with 100 μs time-step, while the EV station circuit topology is simulated in a single FPGA with a 250 ns time-step. In the case studies, the EV station consists of a two-level rectifier and five dual-active bridge (DAB) EV chargers. It is tested under different scenarios, and the real-time simulation results are validated using PSCAD/EMTDC.

Artificial neural network aided real-time simulation of electric traction system

Real-time simulation-based validation plays an essential role in the early stage development of electric traction systems. The high-fidelity real-time simulation relies on the accurate modeling of the power electronics and motors and usually represents the nonlinear characteristics as many as possible while obeying the computing time constraints. In this paper, an artificial neural network (ANN) aided modeling approach is proposed for the field-programmable gate array (FPGA)-based real-time simulation to deal with the nonlinearities in permanent magnet synchronous motor (PMSM) and its drive. With the help of the ANN, the switches power losses, and the PMSM nonlinear flux linkage and electromagnetic torque can be modeled. An electro-thermal model of inverters and the finite element analysis (FEA)-based PMSM model are thus enabled in the FPGA-based real-time simulation, which can significantly improve the performances of the real-time simulation-based test bench. A two-level inverter fed PMSM drive system is modeled using the ANN-aided modeling approach and simulated in the National Instrument PXIe FlexRIO FPGA real-time system. The accuracy and effectiveness of the proposed approaches are tested and validated by comparing the results with the offline simulation tools.

Dynamic current sharing, voltage and SOC regulation for HESS based DC microgrid using CPISMC technique

To cope with uncertainties and intermittent nature of renewable energy resources (RER) such as wind energy and PV needed energy storage systems with higher reliable and robust control techniques. Because of the variable characters of RER to maintain the power demand and generation, voltage stability and also increase the energy storage system lifetime is a challenging task. Therefore, in this paper, a combined PI and sliding mode control technique (CPISMC) is proposed to improve the current sharing between battery and supercapacitor to suit the demand- generation disparity, maintain SOC within boundaries and thereby to regulate the dc bus voltage. The key benefits are that, in the proposed strategy, unwaged battery currents are redirected to the supercapacitor forward with high-frequency current elements resulting in improved battery life. The effectiveness of the proposed control strategy has been investigated through simulations including comparison with conventional control strategy. The advantage of the proposed control strategy over existing conventional control strategy are better dc bus voltage regulation, improved current-sharing among HESS and improved battery life. The results have been experimentally validated through hardware-in -loop (HIL) on FPGA-based real-time simulator.

An FRTDS Real-Time Simulation Optimized Task Scheduling Algorithm Based on Reinforcement Learning

This paper presents a deep reinforcement learning (DRL)-based task scheduling algorithm that is applied to an FPGA-based real-time digital simulation (FRTDS) system to generate arrangements to minimize the makespan of a task sequence with limited resources. The algorithm has two parts, which are synthetic cost construction and DRL processing to make arrangements. The synthetic cost represents the cost of different selections of arrangements in both resource usage and blockage arranging probability. This study uses the cost to measure the state-action value function to process the deep Q network (DQN) procedure to generate an optimized scheduling strategy. We establish the reinforcement learning strategy generation process by instantiating the computing components in the hardware as agents, and RAM resources and communication I/O ports as environment. A hardware-design-based decision rule is constructed to ensure that the computing variables are distributed as evenly as possible in storage, while making full use of the pipeline characteristics of FPGA. A compiler is written to generate an FRTDS binary stream to drive FRTDS. Accuracy and performance of the proposed method are verified and evaluated. We present simulation results of the modeling method, as well as from a classic method. Comparing these results, the makespan obtained by the proposed method is significantly shorter. It corresponds to the possibility of having higher computing power and dealing with larger-scale real-time simulation.

Small Time-Step FPGA-Based Real-Time Simulation of Power Systems Including Multiple Converters

This paper presents an FPGA-based Digital Real-Time Simulation (DRTS) environment for the analysis of Electromagnetic Transients (EMTs) of power systems that include multiple Power Electronic Converters (PECs). The main features of the proposed DRTS platform are that it i) employs two-value resistor switch model for PECs and thus avoids inaccuracies of Associate Discrete Circuit (ADC) model and ii) does not require separation of PECs by transmission lines (stub lines) and thus accurately represents PECs in close electrical proximity of each other. These features respectively result in a time-variant and large system admittance matrix which significantly increases the computation burden in each simulation time-step and can render it infeasible for real-time applications. To overcome this problem this paper introduces i) Switching-Network Partitioning (SNP) method which is tailored for PECs representation in FPGA and ii) Reformulated Modified Nodal Analysis (RMNA) method to enable computational parallelism between the solution of network and component models in FPGA. SNP enables solution-level partitioning of the PECs and the rest of the system. The developed DRTS platform enables sub-microsecond simulation time-step and provides a fixed hardware irrespective of the system configuration. Performance of the platform is evaluated for a study system and verified versus off-line simulation studies.

Device‐level modelling and FPGA‐based real‐time simulation of the power electronic system in fuel cell electric vehicle

Power electronic converters are essential components in the fuel cell electric vehicle (FCEV) powertrain, which precisely control the power output of the fuel cell stack, the charging and discharging process of the battery, and the operation of the traction motor. The hardware-in-the-loop (HIL) simulation plays an important role in the rapid validation of power converters in their early development stages. In this study, a device-level model of the power converters in FCEV powertrain is developed for the FPGA-based real-time simulation. By fulfilling the circuit topology partitioning and the switch model partitioning, the FCEV power electronic system can be simulated with sub-microsecond time-step while producing the detailed switching waveforms with 5 ns resolution. Therefore, the device electrical stress, and the switching power losses can be evaluated in real time. Furthermore, the electro-thermal converter model is developed accordingly, which makes it possible to evaluate the IGBT/Diode thermal behaviour in the HIL simulation. In this study, the FPGA hardware is designed with the NI LABVIEW FPGA module and implemented on the NI-7975R FLEXRIO FPGA board. The accuracy of the FPGA-based simulation results is evaluated by the results from offline simulation tools. The effectiveness of the proposed model is then validated by the controller HIL experiments.

A Network Analysis Modeling Method of the Power Electronic Converter for Hardware-in-the-Loop Application

The application of field-programmable gate array (FPGA) in the hardware-in-the-loop simulation (HiLs) has enabled the time step reaching the range of hundreds of nanoseconds. However, the time performance of FPGA-based real-time simulation remains to be improved. In this article, a network analysis modeling method for FPGA-based real-time simulation of the power electronic converter is proposed. An ideal switching network unit, without requiring a large amount of memory, is used to determine the topology of the circuit and solve interface voltages/currents from the torn circuit. A parallel integration method is then implemented to obtain the status of the circuit element. At last, a diode-clamped three-level voltage source converter is used as a case study to demonstrate the effectiveness of the method. A 40-ns simulation step is finally achieved on the National Instruments (NI) FlexRIO PXIe-7975 platform. The accuracy of the proposed method is also verified against the results from MATLAB/Simulink.

A Universal Design of FPGA-Based Real-Time Simulator for Active Distribution Networks Based on Reconfigurable Computing

Reconfigurable computing is that the logical resources in the system can be reconfigured according to the real-time changing data flow to achieve different calculation functions. The reconfigurable computing system has both high efficiency on hardware and universality of software. The field programmable gate array (FPGA)-based real-time simulator for active distribution networks (ADNs) requires a long compilation time for case modification, with low efficiency and low versatility, making it inconvenient and difficult for users. To solve the problem of long compile time with a new case, a universal design of the FPGA-based real-time simulator for ADNs based on reconfigurable computing is proposed in this paper. It includes the universal design of the simulation parameter configuration, the simulation initial value setting, the linear equations solving module and the simulation result output module. The proposed universal design of the simulator makes the modification and change of the cases and parameters without recompiling and further improves the simulation efficiency. Simulation results are conducted and compared with PSCAD/EMTDC to validate the correctness and effectiveness of the universal design.