Forming Gas Annealing Process Research Articles

Hydrogen Permeation and Its Impacts on the Electrical Performance of Stacked ZrO₂/Al₂O₃/ZrO₂ Films.

In this study, the effects of hydrogenation on the dielectric capacitance and leakage current of ZrO₂/Al₂O₃/ZrO₂ (ZAZ) films for dynamic-random-access memory (DRAM) capacitors were examined. Hydrogen permeation into ZAZ films reduced the dielectric capacitance and increased the leakage current with continued exposure to hydrogen during the forming gas annealing process. More specifically, the hydrogen ions distributed in the grain boundaries and at the Z/A interfaces appeared to disrupt the dipole motion and diminish the dielectric constant of the film, resulting in a decreased dielectric capacitance. Furthermore, the reaction of hydrogen atoms with the pre-existing oxygen of the ZrO₂ films resulted in an oxygen vacancy with two captured electrons. Conduction electrons freed via ionization of the oxygen vacancy increased the conductivity of the ZAZ films, thereby increasing the leakage current throughout the ZAZ films.

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO<sub>2</sub> Gate Dielectric

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VT shift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3 interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VT shift are realized.

LF Noise Analysis for Trap Recovery in Gate Oxides Using Built-In Joule Heater

The importance of the reliability of gate oxide materials is increasing continuously as CMOS technology advancing. Joule heating to induce localized high temperature via a built-in gate heater has recently been introduced as a rapid and efficient method to cure instances of gate oxide damage, including damaged interface traps and bulk traps in the gate oxide. In this paper, spatially distributed deep oxide traps were generated by Fowler–Nordheim (FN) stress, and a recovery process by electrothermal annealing (ETA) using local Joule heat was clearly demonstrated with low-frequency (LF) noise characteristics. The generation and recovery of the oxide traps were quantitatively analyzed with LF noise, and the results showed that the border traps generated by the FN stress were cured by ETA. The recovery process was predominantly affected by the applied gate voltage and the duration. Excessive gate voltage beyond the critical value permanently destroyed the gate oxide. The effect of a forming gas annealing (FGA) process on the gate oxide traps was also analyzed with LF noise and compared with that of ETA. Although electrical Joule heating was applied under a condition of ambient air, not hydrogen-rich atmosphere, the passivation effect was superior to that of a FGA process conducted in diluted H2 ambient.

Improved indium oxide transparent conductive thin films by hydrogen annealing

In2O3 thin films were prepared by reactive evaporation with post-annealing treatment at forming gas of N2 and H2. After post-annealing treatment, the films annealed at forming gas achieved lowest resistivity of 2.70×10−4Ωcm. The XRD results show that the In2O3 films annealed in forming gas and N2 with good recrystallization. In the forming gas annealing process, hydrogen plays a key role in the generation of oxygen vacancies and enhances the formation of In–OH bond which may influence the electrical and optical properties of the In2O3 films.

The impact of forming gas annealing on the electrical characteristics of sulfur passivated Al2O3/In0.53Ga0.47As (110) metal-oxide-semiconductor capacitors

This study reports the impact of forming gas annealing (FGA) on the electrical characteristics of sulfur passivated, atomic layer deposited Al2O3 gate dielectrics deposited on (110) oriented n- and p-doped In0.53Ga0.47 As layers metal-oxide-semiconductor capacitors (MOSCAPs). In combination, these approaches enable significant Fermi level movement through the bandgap of both n- and p-doped In0.53Ga0.47 As (110) MOSCAPs. A midgap interface trap density (Dit) value in the range 0.87−1.8×1012 cm−2eV−1 is observed from the samples studied. Close to the conduction band edge, a Dit value of 3.1×1011 cm−2eV−1 is obtained. These data indicate the combination of sulfur pre-treatment and FGA is advantageous in passivating trap states in the upper half of the bandgap of (110) oriented In0.53Ga0.47 As. This is further demonstrated by a reduction in border trap density in the n-type In0.53Ga0.47 As (110) MOSCAPs from 1.8×1012 cm−2 to 5.3×1011 cm−2 as a result of the FGA process. This is in contrast to the observed increase in border trap density after FGA from 7.3×1011 cm−2 to 1.4×1012 cm−2 in p-type In0.53Ga0.47 As (110) MOSCAPs, which suggest FGA is not as effective in passsivating states close to the valence band edge.

Mechanism underlying the beneficial effect of forming gas annealing on screen-printed Ag contacts of crystalline Si solar cells

Forming gas annealing (FGA) has been known to be beneficial for improving the contact resistance of crystalline Si (c-Si) solar cells containing overfired front-side Ag contacts. This study examines the microstructural changes responsible for the beneficial effect of FGA through the use of ultrahigh-resolution scanning electron microscopy. The FGA process at 400°C under N2+10% H2 led to the formation of a layer of fine (<300nm) Ag particles on the glass surface of the interfacial pores, which were connected to the open channels in the porously sintered Ag bulk. Aside from the pore surfaces, FGA had little influence on the contact microstructure, and there was no noticeable formation of Ag or other metallic particles within the interfacial glass layer. The present results demonstrate that the Ag+ ions dissolved into the lead borosilicate glass during the firing process, and subsequently diffused out only to be reduced in the vicinity of the pore surfaces during FGA. This result suggests that the permeation rate of hydrogen into the lead borosilicate glass should be negligible, compared to the out-diffusion rate of the Ag+ ions during FGA. Furthermore, the conductivity measurements indicated that the pore surfaces that were decorated with a dense layer of fine Ag particles after FGA could act as an additional path for current transport across the contact interface, thereby lowering the contact resistance.

Electrical characteristics of a ZrO 2/SiO 2 modified tunnel barrier for low-temperature non-volatile memory

The electrical characteristics of nonvolatile memory, which consists of an asymmetrical ZrO 2/SiO 2 (ZO) modified tunnel barrier, a high-k HfO 2 trapping layer and an Al 2O 3 blocking layer, were investigated for the application of a tunnel barrier engineered nonvolatile memory at low process temperatures. The efficiency of the ZO modified tunnel barrier on the charge trap flash (CTF) memory cell was compared to a conventional single SiO 2 tunnel barrier. The ZO tunnel barrier revealed field sensitivity larger than the single SiO 2 tunnel barrier. The programming and erasing speeds as well as the retention and endurance characteristics of CTF memory were largely enhanced. Moreover, the forming gas annealing process in 2% diluted H 2/N 2 ambient improved the charging trapping property and tunneling sensitivity of the ZO modified tunnel barrier.

Schottky Barrier N-Type Thin Film Transistors With Polycrystalline Silicon Channel and Er-Silicided Metallic Junctions

N-type Schottky barrier thin film transistors (SB-TFTs) with polycrystalline silicon channel and metallic junctions were fabricated by using Er silicidation, and electrical structural properties were compared to conventional TFTs with phosphorous-doped source/drain regions. The performances of SB-TFTs are better than that of the conventional TFTs. A forming gas annealing process leads to a great improvement in the characteristics of both devices. In particular, excellent electrical characteristics were obtained from the forming gas annealed SB-TFTs: the subthreshold swing of 180 mV/dec, the drive current of 1.47 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-5</sup> A, and the on/off current ratio of 5 times 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> .

Influences of annealing in reducing and oxidizing ambients on flatband voltage properties of HfO2 gate stack structures

We have applied a combinatorial technique to fabricate work function (WF) tuned Pt-W alloy films and used the films as metal electrodes for HfO2∕SiO2∕Si capacitors. As the ratio, RPt, of Pt to W changes from 0 to 1, the WF value varies continuously from 4.7 to 5.5 eV. This tunability enables us to systematically investigate the effect of WF variation on electrical properties. After a forming gas annealing process, the values of flatband voltage (Vfb) from capacitance-voltage properties are almost constant, regardless of the WF variation, because of oxygen vacancy formation that results in Fermi level pinning. On additional oxidizing gas annealing (OGA), the effect of WF value on Vfb becomes dominant. However, the difference in Vfb between W and Pt is 0.34 V, which is much smaller than the observed WF difference of 0.8 eV. We attribute this phenomenon to the lowering of the effective WF due to an electric dipole, induced by oxygen vacancy formation at the metal/HfO2 interface. Moreover, a decrease in Vfb in W-rich regions was observed following the OGA, suggesting the formation of a W-O bond at the interface. These results clearly indicate that the control of bonding states at the metal/HfO2 interfaces on an atomic scale is essential for the realization of a combination of metal and high-k dielectric films in future complementary metal-oxide-semiconductor devices.

Hydrogen-Induced Degradation Mechanisms in Ferroelectric PbZr0.4Ti0.6O3 and Bi3.25La0.75Ti3O12 Thin Films

Hydrogen-induced degradation in PbZr0.4Ti0.6O3 and Bi3.25La0.75Ti3O12 (BLT) capacitors was investigated after forming gas annealing (FGA). By comparison, the BLT capacitors were found to have a high resistance against hydrogen-induced degradation at the low temperature FGA below 350°C. The BLT capacitors showed only a small reduction of remanent polarization and no deformation of hysteresis loops while the PZT showed a large polarization degradation after the same FGA process. The degradation of PZT at the low temperature FGA was investigated systematically by measuring the voltage shifts of hysteresis loop, and current–voltage and capacitance–voltage characteristics. Different degradation mechanisms are suggested for PZT and BLT by comparing experimental results including those of thermogravimetric analysis. For PZT films, pinning of domains and defect dipoles due to charged defects is inferred to dominate the initial stage of the degradation. On the other hand, for BLT films, hydrogen-induced decomposition seems to govern the degradation resulting in the increase of leakage current density and production of non-ferroelectric oxide(s).