Float-zone Wafers Research Articles

Influence of oxygen on trap-limited diffusion of hydrogen in proton-irradiated n-type silicon for power devices

The growing demand for power devices has led to the use of magnetic field-applied Czochralski (m:Cz) wafers owing to the limited production capacity and available diameters of the traditionally used floating zone (FZ) wafers. Consequently, the influence of oxygen impurities in the wafers on the electrical properties of devices, regardless of the growth method, needs to be investigated to achieve a stable fabrication process for power devices. Using the proton irradiation doping process and spreading resistance profiling technique, we evaluated the effective diffusion coefficient (Deff) related to trap-limited diffusion of hydrogen and the effects of impurities on diffusivity. We irradiated n-type silicon wafers, which have different carbon, oxygen, and phosphorus concentrations, with 2 MeV protons and annealed them at 300–400 °C. By analyzing the width of the n-type region, where hydrogen-related shallow donors (HDs) are induced, we estimated Deff to be five to six orders of magnitude lower than the intrinsic diffusion coefficient, indicating that hydrogen motion is highly trap-limited. Deff was significantly dependent on the oxygen concentration, and the activation energy of hydrogen diffusion varied from 0.57 ± 0.15 eV (pure epitaxial wafer) to 2.19 ± 0.15 eV (m:Cz wafer). This trend suggests that oxygen-related defects preferentially trap the mobile hydrogen released from thermally dissociated HDs. This study also reveals that the diffusion coefficients of different materials when annealed at 400 °C are comparable. This information is essential to realize the cost-effective production of power devices because we can treat m:Cz and FZ wafers equivalently during the doping process.

Effect of Surface Oxygen Concentration on Wafer Strength in Floating Zone Si Wafers

The critical stress behavior of low-oxygen-concentration silicon wafers was elucidated by measuring the critical stress of slip generated owing to scratches using the high-temperature three-point bending test method. It is well known that floating zone (FZ) wafers with low oxygen concentrations tend to easily cause slips from dislocation sources such as scratches. The first point observed in the study is that the critical shear stress of FZ wafers had no temperature dependence above 973 K, which may suggest the presence of long-range obstacles for dislocation motion. The second point is that slip generation from scratches was less likely to occur when oxygen atoms were inwardly diffused into the wafer surface by high-temperature thermal treatment. These results will contribute to solving the problem of slip generation from backside scratches, often created during the insulated gate bipolar transistor manufacturing process in which FZ wafers are used.

Application of hydrosilane-free atmospheric pressure chemical vapor deposition of SiOx films in the manufacture of crystalline silicon solar cells

In this work we present SiOx films deposited in cost-effective laboratory scale three-dimensional printed atmospheric pressure chemical vapor deposition setup. As SiOx films are deposited at room temperature without complex vacuum systems, they can be a good candidate for the use in commercial c-Si solar cell production lines. The quality of the deposited films was investigated as to their integrity, conformity with various surfaces, and post-treatment resilience such as stability against etchants and annealing. Several applications of the SiOx film prepared with the atmospheric pressure chemical vapor deposition (APCVD) were discussed. In one application, the APCVD SiOx was utilized to effectively promote single-side texturing of Float Zone and Czochralski Si wafers by coating only one side with SiOx and subsequently annealing prior to texturing in an alkaline aqueous solution. Another application was to exploit the APCVD SiOx as a plating mask for silicon heterojunction solar cells. Two processing options prior to the oxide-film deposition were investigated: i) application of an Ag seed-layer, which promotes subsequent electroplating, and ii) printing of an organic grid, which, after stripping, creates openings in the SiOx that facilitate electroplating of the solar cell's electrode on the underlying transparent conducting oxide. In a different application, the APCVD SiOx films acted as protection against parasitic plating on the front side of passivated emitter and rear solar cells. The deposited films were characterized by ellipsometry, hemispherical reflectance measurements, scanning electron microscopy, energy dispersive X-ray spectroscopy and optical microscopy.

Design of the first full size ATLAS ITk strip sensor for the endcap region

The ATLAS collaboration is designing the all-silicon Inner Tracker (ITk) that will operate in the HL-LHC replacing the current design. The silicon microstrip sensors for the barrel and the endcap regions in the ITk are fabricated in 6 inch, p-type, float-zone wafers, where large-area strip sensor designs are laid out together with a number of miniature sensors. The radiation tolerance and specific system issues like the need for slim edge of 450 μm have been tested with square shaped sensors intended for the barrel part of the tracker. This work presents the design of the first full size silicon microstrip sensor for the endcap region with a slim edge of 450 μm. The strip endcaps will consist of several wheels with two layers of silicon strip sensors each. The strips have to lie along the azimuthal direction, apart from a small stereo angle rotation (20 mrad on each side, giving 40 mrad total) for measuring the second coordinate of tracks. This stereo angle is built into the strip layout of the sensor and, in order to avoid orphan strips, the sensor edges are inclined by the stereo angle. On top of this, the top and bottom edges are designed as arcs to have equal length strips. Together with the design of this new Stereo Annulus sensor, we will report on the initial measurements of the leakage current as a function of bias voltage, after dicing, and the depletion voltage.

Investigation of Atomic Layer Deposition Al2O3Passivation for Screen-Printed Large-Area Solar Cells

Thermal and plasma-assisted atomic layer deposition (ALD) ${\mathrm{A}}{{\mathrm{l}}_2}{{\mathrm{O}}_3}$ films for surface passivation of Si solar cells are investigated. ALD ${\mathrm{A}}{{\mathrm{l}}_2}{{\mathrm{O}}_3}$ films were deposited on both Czochralski (Cz) and float-zone wafers with textured and planar surface, and then, surface recombination velocity (SRV) was measured. An extremely low SRV of 3 cm/s after annealing and 13 cm/s after contact firing was achieved from plasma-assisted ALD ${\mathrm{A}}{{\mathrm{l}}_2}{{\mathrm{O}}_3}$ on a 2-Ω⋅cm Cz wafer. In addition, screen-printed large-area (239-cm2) textured solar cells were fabricated using plasma-assisted ALD ${\mathrm{A}}{{\mathrm{l}}_2}{{\mathrm{O}}_3}$ films and compared with ${\mathrm{Si}}{{\mathrm{O}}_{\rm{2}}}$ -passivated solar cells. Superior conversion efficiency of 20.0% (n-type) and 18.6% (p-type) was achieved from ALD ${\mathrm{A}}{{\mathrm{l}}_2}{{\mathrm{O}}_3}$ passivation, while ${\mathrm{Si}}{{\mathrm{O}}_{\rm{2}}}$ -passivated solar cells provide 19.8% (n-type) and 17.7% (p-type).

Permanent annihilation of thermally activated defects which limit the lifetime of float‐zone silicon

We have observed very large changes in the minority carrier lifetime when high purity float‐zone (FZ) silicon wafers are subject to heat‐treatments in the range of 200–1100 °C. Recombination centres were found to become activated upon annealing at 450–700 °C, causing significant reductions in the bulk lifetime, detrimental for high efficiency solar cells and stable high powered devices. Photoluminescence imaging of wafers annealed at 500 °C revealed concentric circular patterns, with lower lifetimes occurring in the centre, and higher lifetimes around the periphery. Deep level transient spectroscopy measurements on samples extracted from the centre of an n‐type FZ silicon wafer annealed at 500 °C revealed a large variety of defects with activation energies ranging between 0.16–0.36 eV. Our measurements indicate that vacancy related defects are causing the severe degradation in lifetime when FZ wafers are annealed at 450–700 °C. Upon annealing FZ silicon at temperatures >800 °C, the lifetime is completely recovered, whereby the defect‐rich regions vanish and do not reappear (permanently annihilated). Our results indicate that, in general, as‐grown FZ silicon should not be assumed to be defect lean, nor can it be assumed that the bulk lifetime will remain stable during thermal processing, unless annealed at temperatures >1000 °C.

First measurements of segmented silicon tracking detectors with built-in multiplication layer

Silicon sensors with a built-in multiplication layer, also known as Low Gain Avalanche Detectors (LGAD), are a new technology of potentially radiation hard silicon sensors developed at CNM (Centro Nacional de Microelectrónica) in the framework of the CERN-RD50 collaboration. The concept of the LGAD technology is to produce a tracking sensor with an intrinsic low gain due to charge multiplication in order to enhance the signal-to-noise ratio. This makes LGAD detectors appealing for the high energy physics community which foresees a possible application in harsh radiation environments such as the inner detectors of the experiments at the High Luminosity LHC, where a fluence of 2×1016 neq/cm2 is expected in the innermost pixel layer of the tracker.LGAD pad diodes with a multiplication factor of 10 at 200V before irradiation have been produced and studied but it still has to be proven that this technology can be applied to segmented devices. The electric field profile at the p–n junction plays a crucial role for the multiplication mechanism that could be affected by implantation edge effects in highly segmented devices.In this paper the results of the first measurements of segmented LGAD devices from 285μm thick float zone wafers will be discussed. Time resolved Transient-Current-Technique analysis has been performed on strip devices and charge collection measurements have been carried out on pixel detectors to test the LGAD technology on highly segmented devices.

Development of n+-in-p large-area silicon microstrip sensors for very high radiation environments – ATLAS12 design and initial results

We have been developing a novel radiation-tolerant n+-in-p silicon microstrip sensor for very high radiation environments, aiming for application in the high luminosity large hadron collider. The sensors are fabricated in 6in., p-type, float-zone wafers, where large-area strip sensor designs are laid out together with a number of miniature sensors. Radiation tolerance has been studied with ATLAS07 sensors and with independent structures. The ATLAS07 design was developed into new ATLAS12 designs. The ATLAS12A large-area sensor is made towards an axial strip sensor and the ATLAS12M towards a stereo strip sensor. New features to the ATLAS12 sensors are two dicing lines: standard edge space of 910μm and slim edge space of 450μm, a gated punch-through protection structure, and connection of orphan strips in a triangular corner of stereo strips. We report the design of the ATLAS12 layouts and initial measurements of the leakage current after dicing and the resistivity of the wafers.

Impact of doped microcrystalline silicon oxide layers on crystalline silicon surface passivation

This paper reports on a comparative study of the impact of phosphorous and boron doped microcrystalline silicon oxide (μc-SiOx:H) layers on the surface passivation of n- and p-type doped crystalline silicon float zone wafers in correlation with the material properties of the μc-SiOx:H layers. The poor surface passivation of μc-SiOx:H films deposited directly on c-Si surface might be attributed to the incorporation of doping impurities, the surface damaging by ion bombardment and (or) the low amount of hydrogen at the μc-SiOx:H/c-Si interface. The different impact of n- and p-type doped μc-SiOx:H films on the passivation of n- and p-type doped wafers with and without an additional a-SiOx:H passivation layer are correlated to the differences in the strength of the field effect at the heterojunction and to the presence of boron atoms that can cause the rupture of Si–H bonds.

Excellent c-Si surface passivation by thermal atomic layer deposited aluminum oxide after industrial firing activation

We demonstrate that by using a water (H2O)-based thermal atomic layer deposited (ALD) aluminum oxide (Al2O3) film, excellent surface passivation can be attained on planar low-resistivity silicon wafers. Effective carrier lifetime values of up to 12 ms and surface recombination velocities as low as 0.33 cm s−1 are achieved on float-zone wafers after a post-deposition thermal activation of the Al2O3 passivation layer. This post-deposition activation is achieved using an industrial high-temperature firing process which is commonly used for contact formation of standard screen-printed silicon solar cells. Neither a low-temperature post-deposition anneal nor a silicon nitride capping layer is required in this case. Deposition temperatures in the 100–400 °C range and peak firing temperatures of about 800 °C (set temperature) are investigated. Photoluminescence imaging shows that the surface passivation is laterally uniform. Corona charging and capacitance–voltage measurements reveal that the negative fixed charge density near the AlOx/c-Si interface increases from 1.4 × 1012 to 3.3 × 1012 cm−2 due to firing, while the midgap interface defect density reduces from 3.3 × 1011 to 0.8 × 1011 cm−2 eV−1. This work demonstrates that direct firing activation of thermal ALD Al2O3 is feasible, which could be beneficial for solar cell manufacturing.

Stability of the regeneration of the boron–oxygen complex in silicon solar cells during module integration

Light-induced degradation (LID) in boron-doped p-type Czochralski (Cz) silicon is caused by a boron–oxygen (BO) complex, which may be permanently deactivated by simultaneous illumination and heating leading to a permanent regeneration of carrier lifetime and solar cell performance. Up to now, regeneration has only been investigated on wafer and solar cell level. In this work, we investigate whether the regeneration gain on solar cell level can be transferred to module level. For this purpose, we fabricated solar cells with passivated emitter and rear on boron-doped p-type Cz and float zone wafers. The cells are extensively characterised regarding losses in cell performance due to LID by preparing different defect states with certain temperature and illumination treatments. The effect of the injection-dependent carrier lifetime caused by the BO complex in its active state on fill factor is investigated in detail theoretically and experimentally, developing a descriptive explanation. Finally, it is shown by integrating solar cells in the degraded and regenerated state into solar modules, that the regeneration effect can be transferred to module level and is stable upon subsequent illumination of the module.

Optimized amorphous silicon oxide buffer layers for silicon heterojunction solar cells with microcrystalline silicon oxide contact layers

We report on the systematic optimization of the intrinsic amorphous silicon oxide buffer layer in interplay with doped microcrystalline silicon oxide contact layers for silicon heterojunction solar cells using all silicon oxide based functional layers on flat p-type float-zone wafers. While the surface passivation quality is comparably good within a wide range of low oxygen contents, the optical band gap increases and the dark conductivity decreases with increasing oxygen content, giving rise to an inevitable trade-off between optical transparency and electrical conductivity. On the cell level, fill factor FF and short circuit current density Jsc losses compete with the open circuit voltage Voc gains resulting from a thickness increase of the front buffer layers, whereas Jsc and Voc gains compete with FF losses resulting from increasing thickness of the rear buffer layers. We obtained the highest active area efficiency of ηact = 18.5% with Voc = 664 mV, Jsc = 35.7 mA/cm2, and FF = 78.0% using 4 nm front and 8 nm rear buffer layer with an oxygen content of 5%.

>21% Efficient Silicon Heterojunction Solar Cells on n- and p-Type Wafers Compared

The properties and high-efficiency potential of front- and rear-emitter silicon heterojunction solar cells on n- and p-type wafers were experimentally investigated. In the low-carrier-injection range, cells on p-type wafers suffer from reduced minority carrier lifetime, mainly due to the asymmetry in interface defect capture cross sections. This leads to slightly lower fill factors than for n-type cells. By using high-quality passivation layers, however, these losses can be minimized. High open-circuit voltages (Vocs) were obtained on both types of float zone (FZ) wafers: up to 735 mV on n-type and 726 mV on p-type. The best Voc measured on Czochralski (CZ) p-type wafers was only 692 mV, whereas it reached 732 mV on CZ n-type. The highest aperture-area certified efficiencies obtained on 4 cm2 cells were 22.14% (Voc = 727 mV , FF = 78.4%) and 21.38% (Voc = 722 mV, FF = 77.1%) on n- and p-type FZ wafers, respectively, proving that heterojunction schemes can perform almost as well on high-quality p-type as on n-type wafers. To our knowledge, this is the highest efficiency ever reported for a full silicon heterojunction solar cell on a p-type wafer, and the highest Voc on any p-type crystalline silicon device with reasonable FF.

Role of Annealing Conditions on Surface Passivation Properties of ALD Al2O3 Films

The surface passivation performance of Al2O3 films attracted attention in the field of solar cells and semiconductor devices and depends on the conditions of the applied post-deposition annealing step. The effect of annealing temperature and different annealing atmospheres on the surface passivation quality of atomic layer deposited Al2O3 films was investigated on n-type float-zone Si wafers. Photoconductance decay measurements were carried out to characterize recombination velocities and carrier lifetimes. The chemical and field-effect passivation mechanism, i.e. the interface trap density and the fixed charge density, respectively, were studied by capacitance-voltage experiments. Low surface recombination velocities of Seff,max ∼1cm/s corresponding to a carrier lifetime of 9.0ms were achieved for samples annealed in O2 atmosphere whereas annealing in H2 and N2 led to slightly higher Seff,max-values ∼2cm/s. The annealing temperature was found to affect both the fixed charge density and the interface trap density whereas in contrast the annealing atmosphere affected only the interface trap density, i.e. the chemical passivation. According to the expectations the highest surface passivation quality is based on a high fixed charge density and a low interface trap density.

Performance of p-bulk microstrip sensors under 60Co [formula omitted] irradiation at rates expected at the HL-LHC

We are developing p-bulk microstrip sensors for the high luminosity upgrade of the LHC accelerator, HL-LHC. The stability of FZ (float zone) wafers available to Hamamatsu Photonics was examined by irradiating them at rates expected at the HL-LHC. They show degradation in the operational voltage at low dose but recover after the dose is accumulated. The instability is dependent on the bias voltage and dose rate, and also on the irradiation history. We have characterized the instability and attributed the cause to the charge concentration at the electrode edge. The strip isolation, which is degraded while in irradiation, is shown not to induce any practical problem for the operation.

Plasma-enhanced and thermal atomic layer deposition of Al2O3 using dimethylaluminum isopropoxide, [Al(CH3)2(μ-OiPr)]2, as an alternative aluminum precursor

The authors have been investigating the use of [Al(CH3)2(μ-OiPr)]2 (DMAI) as an alternative Al precursor to [Al(CH3)3] (TMA) for remote plasma-enhanced and thermal ALD over wide temperature ranges of 25–400 and 100–400 °C, respectively. The growth per cycle (GPC) obtained using in situ spectroscopic ellipsometry for plasma-enhanced ALD was 0.7–0.9 Å/cycle, generally lower than the >0.9 Å/cycle afforded by TMA. In contrast, the thermal process gave a higher GPC than TMA above 250 °C, but below this temperature, the GPC decreased rapidly with decreasing temperature. Quadrupole mass spectrometry data confirmed that both CH4 and HOiPr were formed during the DMAI dose for both the plasma-enhanced and thermal processes. CH4 and HOiPr were also formed during the H2O dose but combustion-like products (CO2 and H2O) were observed during the O2 plasma dose. Rutherford backscattering spectrometry showed that, for temperatures >100 °C and >200 °C for plasma-enhanced and thermal ALD, respectively, films from DMAI had an O/Al ratio of 1.5–1.6, a H content of ∼5 at. % and mass densities of 2.7–3.0 g cm−3. The film compositions afforded from DMAI were comparable to those from TMA at deposition temperatures ≥150 °C. At lower temperatures, there were differences in O, H, and C incorporation. 30 nm thick Al2O3 films from the plasma-enhanced ALD of DMAI were found to passivate n- and p-type Si floatzone wafers (∼3.5 and ∼2 Ω cm, respectively) with effective carrier lifetimes comparable to those obtained using TMA. Surface recombination velocities of < 3 and < 6 cm s−1 were obtained for the n- and p-type Si, respectively. Using these results, the film properties obtained using DMAI and TMA are compared and the mechanisms for the plasma-enhanced and thermal ALD using DMAI are discussed.

Optimisation of NaOH texturisation process of silicon wafers for heterojunction solar-cells applications

Abstract The formation of a pyramidal structure on the surface of 〈1 0 0〉-oriented monocrystalline-silicon wafers is an effective and well known method to reduce reflection losses from the front surface of both silicon solar cells and silicon-heterojunction solar cells (SHJs). The consequence of this texturisation is an important optical gain, with a subsequent increase of the short-circuit current density (Jsc) and thus of the conversion efficiency of the devices. On the other hand, silicon-heterojunction solar cells are critically affected by the surface quality of the c-Si substrates, so the right combination of optimum texturisation- and cleaning steps previous to emitter (a-Si:H) deposition are indispensable in the fabrication process. The main goal of this work has been to perform a systematic and comprehensive analysis aimed at optimising the texturisation process based on the use of alkali solutions of NaOH with de-ionised water (DIW) and isopropyl alcohol (IPA) in different types of monocrystalline-silicon wafers for silicon-heterojunction solar-cell (a-Si:H/c-Si) applications. Three types of 〈1 0 0〉 silicon substrates have been used: polished float-zone (FZ) wafers and rough- (as-cut) and polished Czochralski (CZ) wafers. The texturisation process has been evaluated from images obtained by Scanning Electron Microscopy (SEM) and from hemispherical-reflectance spectra. Different etching times, temperatures and NaOH concentrations of the solutions as well as cleaning treatments of the wafers prior to the texturisation process have been analysed. Results show different conditions of the optimum texturisation process for each type of silicon wafers. An effective texturisation of FZ and CZ substrates has been achieved. Finally, SHJ solar cells have been obtained from FZ and CZ silicon wafers textured by the chemical processes optimised in this work.

Detailed Investigation of Surface Passivation Methods for Lifetime Measurements on P-Type Silicon Wafers

The effect of five different common surface passivation techniques on the measured bulk lifetime values of multi- and monocrystalline p-type silicon wafers was investigated. Mono-[Czochralski (Cz) and floatzone (FZ)] and multicrystalline [mc and edge-defined film-fed growth (EFG)] silicon wafers were either deposited with a dielectric passivating layer of SiNx, Al2O3, or amorphous silicon (a-Si) or were passivated chemically with 0.08 M iodine-ethanol (IE) or 0.07 M quinhydrone-methanol (QM) solutions. The temporal stability of annealed and nonannealed Cz wafers that were passivated with QM and IE was tested. The lifetime values of EFG, mc, and FZ wafers that were subjected to repeated QM passivation and mc wafers that were subjected to IE passivation without a surface etching between passivations were found to decrease with each passivation. Lifetime values of a set of 11 mc wafers that were passivated with Al2O3 were found to decrease about 30% after a period of four weeks in darkness. The decrease was reversible by annealing the samples. The lifetime values of annealed Cz samples that were passivated with Al2O3 and a-Si were found to decrease by >;20% within 5 h of annealing. Subsequent tests on 200-Ω·cm FZ material did (for a-Si) and did not (for Al2O3) show surface passivation degradation over this time period. Neighboring mc wafers were passivated dielectrically or wet chemically with IE or QM and characterized with photoluminescence imaging. All mc wafers that were subjected to dielectric passivation methods that include annealing at 400 °C displayed a greater area of high lifetime values but fewer areas of very high lifetime values, providing visible evidence of internal gettering and/or defect redistribution.

Understanding and Fabrication of 20% Efficient Cells Using Spin-on-Based Simultaneous Diffusion and Dielectric Passivation

Low-cost high-efficiency solar cells are the key to achieve grid parity with photovoltaic devices. High-quality rear passivation is essential for the achievement of this goal. Thick thermal oxide is known to provide the required back surface passivation, but it can lead to long process steps at a high temperature. A combination of 2-D simulations and experiments is used to identify a dielectric stack that provides passivation comparable with that of a thick thermal oxide. This dielectric stack, in conjunction with a local back surface field and 75-Ω/sq emitter, produced solar cell efficiency exceeding 20%. In addition, a streamlined process sequence, involving a single high temperature step for simultaneous formation of emitter and rear passivation, is used. The peak efficiency of 20.1% was achieved with JSC of 39.4 mA/cm2 and VOC of 652 mV on float zone wafers of 2.3 Ω·cm resistivity. Detailed characterization and modeling revealed that the increase in VOC and JSC is the result of increased back surface reflectance from 67% to 93% and reduced back surface recombination velocity from 325 to 125 cm/s. Improved rear passivation was found to be an effective method to control charge-induced inversion or parasitic shunting at the rear surface. According to model calculations, further optimization can result in efficiencies of over 20% on much thinner wafers (~100 μm) using an identical cell structure.

High effective minority carrier lifetime on silicon substrates using quinhydrone-methanol passivation

Iodine-methanol (I2/ME), a chemical passivation method, is extensively used in silicon (Si) solar cell fabrication for measuring minority carrier lifetime in bulk regions. We demonstrate that quinhydrone-methanol (QHY/ME) provides higher lifetimes than I2/ME. For 0.01 mol/dm−3 QHY/ME on float-zone (FZ) wafers at 1×1015 cm−3 injection level, a high lifetime of 3.3 ms and surface recombination velocity of 7 cm/sec on n-type (100 Ω cm) and 1.1 ms on p-type (2 Ω cm) is reported. The surface recombination velocity is also measured out of solution for several days. Chemical characterization results indicate increasing surface oxidation with decreasing passivation, consistent with proposed bonding mechanism.