Five-level Multilevel Inverter Research Articles

Enhancing power conversion efficiency in five-level multilevel inverters using reduced switch topology

This paper presents extensive research on improving the power conversion efficiency of five-level multilevel inverters (MLIs) by utilizing a reduced switch topology. MLIs have received an abundance of focus because of their ability to generate high-quality output waveforms and have better harmonic outcomes than traditional two-level inverters. The high number of switches in MLIs, on the other hand, can result in increased power losses and lower overall efficiency. In this paper, a novel reduced switch topology for five-level MLIs, which is having five switches is proposed with the aim of minimizing power losses while preserving superior performance due to lesser number of switches. To achieve efficient power conversion, the proposed topology employs advanced pulse width modulation control strategies and optimized switching patterns. The simulation results show that the minimized switch topology improves the power conversion efficiency of the five-level MLI, resulting in lower losses and better overall system performance. The total harmonic distortion (THD) value of the output current has been reduced to 7.12% and the efficiency has been achieved to 96.92%. The findings of this investigation help to advance MLI technology, allowing for more efficient and reliable power conversion in a variety of applications such as renewable energy systems, electric vehicles, and industrial drives.

A Novel Three-Phase Switched-Capacitor Five-Level Multilevel Inverter with Reduced Components and Self-Balancing Ability

This paper proposes a step-up 3-Ф switched-capacitor multilevel inverter topology with minimal switch count and voltage stresses. The proposed topology is designed to provide five distinct output voltage levels from a single isolated dc source, making it suitable for medium and low-voltage applications. Each leg of the proposed topology contains four switches, one power diode, and a capacitor. The switching signals are also generated using a staircase universal modulation method. As a result, the proposed topology will operate at both low and high switching frequencies. To highlight the proposed topology’s advantages, a comparison of three-phase topologies wasperformed in terms of the switching components, voltage stress, component count per level factor, and cost function withthe recent literature. The topology achieved an efficiency of about 96.7% with dynamic loading, and 75% of the switches experienced half of the peak output voltage (VDC), whereas the remaining switches experienced peak output voltage (2VDC) as voltage stress. The MATLAB/Simulink environment was used to simulate the proposed topology, and a laboratory prototype was also built to verify the inverter’s theoretical justifications and real-time performance.

Fault diagnosis in a five-level multilevel inverter using an artificial neural network approach

Introduction. Cascaded H-bridge multilevel inverters (CHB-MLI) are becoming increasingly used in applications such as distribution systems, electrical traction systems, high voltage direct conversion systems, and many others. Despite the fact that multilevel inverters contain a large number of control switches, detecting a malfunction takes a significant amount of time. In the fault switch configurations diode included for freewheeling operation during open-fault condition. During short circuit fault conditions are carried out by the fuse, which can reveal the freewheeling current direction. The fault category can be identified independently and also failure of power switches harmed by the functioning and reliability of CHB-MLI. This paper investigates the effects and performance of open and short switching faults of multilevel inverters. Output voltage characteristics of 5 level MLI are frequently determined from distinctive switch faults with modulation index value of 0.85 is used during simulation analysis. In the simulation experiment for the modulation index value of 0.85, one second open and short circuit faults are created for the place of faulty switch. Fault is identified automatically by means of artificial neural network (ANN) technique using sinusoidal pulse width modulation based on distorted total harmonic distortion (THD) and managed by its own. The novelty of the proposed work consists of a fast Fourier transform (FFT) and ANN to identify faulty switch. Purpose. The proposed architecture is to identify faulty switch during open and short failures, which has to be reduced THD and make the system in reliable operation. Methods. The proposed topology is to be design and evaluate using MATLAB/Simulink platform. Results. Using the FFT and ANN approaches, the normal and faulty conditions of the MLI are explored, and the faulty switch is detected based on voltage changing patterns in the output. Practical value. The proposed topology has been very supportive for implementing non-conventional energy sources based multilevel inverter, which is connected to large demand in grid.

Single-Phase Five-Level Multilevel Inverter Based on a Transistors Six-Pack Module

This article introduces a single-phase five-level multilevel inverter based on six switches and two transformers. The proposed converter requires a single dc input source with low voltage. The disposition of switches makes it possible to build the converter with a transistors six-pack module off-the-shelves, traditionally used to build three-phase inverters, which simplifies the manufacturing process. The converter increases the voltage with two transformers; for that reason, it does not require an auxiliary step-up converter. The use of transformers (with the transformer’s turns ratio) allows for using the same topology for several input voltage levels. To verify the operation of the proposed multilevel inverter, a computer-based simulation was performed with PSIM, a software that considers parasitic components. The results show that the proposed converter can work properly.

Development of Open Switch Fault-Tolerant Capability in CCS-MLI Topology

Multilevel inverters (MLIs) are very popular in renewable energy applications and other DC to AC conversion systems due to their reliability, reduced voltage stress, low total harmonic distortion (THD), reduced filter size, low electromagnetic interference, etc. Consequently, the photovoltaic (PV) generation systems, mainly installed in remote areas, require highly reliable systems. The high failure rate of sources and power semiconductor devices results in very low reliability for inverters used in PV generation systems. The aim of this study is to develop a five-level MLI topology with fault-tolerant (FT) characteristics. Therefore, a highly resilient fault-tolerance topology, based on a cross-connected source-based MLIs (CCS-MLI) structure, is proposed in this paper. The developed CCS-MLI topology can tolerate open switch faults in any single switch failure. The proposed system and results developed in a MATLAB/Simulink environment are discussed under normal and faulty states. The simulation results are validated experimentally. Finally, the quantitative and qualitative superiority of the proposed CCS-MLI is demonstrated through the comparative analysis of other recent topologies.

Open circuit fault-tolerant operation of 3-Φ multilevel inverter

A modified Fault-Tolerant (FT) structure is presented for the five-level Multi-Level Inverter (MLI) in this research work. A self capacitor voltage balancing control regulates the voltage across the capacitor by a half magnitude of the DC source value to produce a five-level output voltage waveform. Furthermore, the self capacitor voltage balancing control reduces complexity and enhances system reliability. A possible Open Circuit (OC) fault in the switches of the proposed structure is further analyzed. On the basis of a comparative analysis between the five-level MLI and the proposed faulttolerant structure, this structure is presented. When compared with the most recent FT topologies, it contains fewer devices. MATLAB/Simulink are used to study the proposed single-phase and three-phase FT structures under pre-fault, fault and post-fault operation.

Power quality analysis of an AC utility-grid interfaced multilevel inverter systems

ABSTRACT This paper unveils an assessment of Power Quality (PQ) and its analysis for Three-Level and Five-Level Multilevel Inverter (TL:FL-MLI) in phase control and continuous conduction mode. TLMLI and FLMLI topologies are more weighted than traditional two-level inverters due to decreased filter size and modularity. The proposed MLI systems yield increase in active power output and decrease in Total Harmonic Distortion (THD) levels. Accuracy of systems is computed by connecting a resistance-inductance and DC source load. It is envisaged that the level of THD is mitigated under variable switching control modes while injecting active power to AC utility-grid. Subsequently, the control of switching angle is achieved through Sine Pulse Width Modulation (SPWM) technique and kept in the range of 90֯ to 165֯ for optimal control. SPWM control accomplishes the task to enhance the performance of MLIs under dynamic conditions. Furthermore, the superiority of FLMLI over TLMLI is established in synthesising ripple-free and balanced waveforms with reduced harmonic levels. The efficacy and feasibility of simulations for proposed schemes is validated through a small prototype. Comprehensive comparisons with earlier attempts in literature are provided with case studies which verify the ultimate performance of proposed topologies.

Classical Control for Unequal DC Sources Five-Level Inverter-Based SHE Technique

This study proposes a classical control algorithm for solving the transcendental set of equations for the unequal DC sources of five-level multilevel inverters (MLIs). Such sources can be generated from renewable energy sources. Two DC sources with different values are used to produce an output voltage with five levels. Then, a set of two transcendental equations is formulated with two targeted functions to control the fundamental component and cancel the stipulated single harmonic order. The proposed solution uses a simple classical proportional control with two loops to generate two switching angles. The first switching angle is assigned with an initial value, whereas the second one is calculated from the inner loop. The outer loop is used to cancel the specified harmonic by sending the error signal to the proposed proportional control that tunes the switching angles. The proposed algorithm is easy, fast, and accurate, and has a wide-range solution in terms of modulation index (MI ) and input DC source ratio (x=V1V2≤1). The proposed algorithm is tested for a wide range of MI and x to verify its feasibility. Moreover, several simulation and laboratory tests are presented to further validate the applicability of the proposed approach.

A new three-phase multilevel DC-link inverter topology with reduced switch count for photovoltaic applications

PurposeThis paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels.Design/methodology/approachThis paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications.FindingsThe comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD.Originality/valueThe proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.

Combined Harmonic Reduction and DC Voltage Regulation of A Single DC Source Five-Level Multilevel Inverter for Wind Electric System

Wind power generation has increased in the past twenty years due to the development of power electronic converters. Power generation through wind has advantages over other renewable sources, such as having more efficiency, being pollution-free, and its abundant availability. Power electronic converters play a vital role in the wind energy conversion system. This paper presents a wind-electric system with a permanent magnet synchronous generator, diode rectifier, DC-DC converter (buck-Boost or Cuk converter), and a three-phase five-level inverter. The five-level inverter is a modified form of a cascaded H-bridge inverter that uses a single DC source as an input irrespective of several levels and phases. As the wind speed changes, the Permanent Magnet Synchronous Generator (PMSG) voltage and frequency changes, but for practical applications, these changes should not be allowed; hence, a voltage controller is used that maintains the output voltage of a DC converter, andthus a constant AC output is obtained. The DClink voltage is maintained at the desired voltage by a Proportional plus Integral (PI)-based voltage controller. The DC link voltage fed to the multilevel inverter (MLI) is converted to AC to feed the load. The MLI is controlled with a new Selected Harmonic Elimination (SHE), which decreases the total harmonic distortion (THD). The system is simulated with an Resistive plus Inductive (RL) load and is tested experimentally with the same load;the results prove that the Cuk converter has a better efficiency compared to the Buck-Boost converter, and the system has less THD when compared with the conventional SHE Pulse Width Modulation (PWM) technique.

Five‐level one‐capacitor boost multilevel inverter

Multilevel inverter configurations are a suitable candidate for medium and high power applications. This study presents a new one-capacitor-based five-level (2 V dc , V dc , 0, − V dc , − 2 V dc ) boost multilevel inverter. The single-phase version of the proposed formation has one dc-source, eight switches and one capacitor. To provide boosting ability, the inverter is operating based on charge-pump theory, where the capacitor is charging in parallel and discharging in series connections to provide a higher output voltage. The proposed configuration requires simple control tasks, and for this purpose, level-shift pulse width modulation strategy, where the reference signal is compared with four carriers, is implemented to drive the switches and generates the required pulses pattern. The developed inverter has some distinct features like the usage of only one dc-source and one-capacitor, compact size, simple control requirements and boosting ability. The system is simulated with MATLAB/Simulink and a hardware prototype is developed to verify the performance of the developed five-level configuration. The results show that the developed five-level multilevel inverter reaches the expected performance

Simulation and analysis of three-phase parallel inverter using multicarrier PWM control schemes

Simulation and analysis of three-phase parallel inverter using multicarrier pulse width modulation such as phase disposition (PD), phase opposition disposition (POD) and alternate phase alternate disposition (APOD) are presented in this article. In this proposed work, reduced active switching count, transformers, single DC input, a high degree of modularity and redundancy are key merits and also suitable for renewable energy systems. The proposed three-phase five-level multilevel inverter with single DC source using a three-phase transformer is controlled by multicarrier pulse width modulation schemes. To generate switching pulses for five-level inverter, four carrier signals can be compared with a reference signal. The performance of the inverter is examined by using PD, POD, and APOD by modulation index (MI) starting from 0.4 to 1. Furthermore, the over-modulation region is also analyzed in this paper. The effectiveness of the system is analyzed in terms of total harmonic distortion by varying the MI of the inverter. The simulation results are verified through MATLAB/Simulink.

New Topology Multilevel Inverter Type Diode Clamped Five Level Single Phase

Multilevel inverter is a converter that converts DC power sources into AC power sources with the voltage output higher than two levels. Conventional multilevel inverter topology for five levels that is currently developing generally uses eight components of power switches. In this paper, a five-level multilevel inverter topology is proposed by reducing the power switch component to four and aided with two pin diodes and capacitors as voltage couplings. The simulation with MATLAB that has been done shows various advantages of this topology compared to conventional multilevel inverter topologies. Results and discussion This topology compare the switching techniques used between Pulse Width Modulation (PWM) and Sinus Pulse Width Modulation (SPWM) for five-level multilevel inverter. Cohesiveness in switching techniques topology is proposed and validated by using passive filter. The harmonic analysis performed by the proposed topology could reduce the output voltage with the low harmonics.

A Symmetrical Multilevel Inverter Topology with Minimal Switch Count and Total Harmonic Distortion

A multilevel inverter (MLI) with reduced number of power devices, especially for the higher output levels, is presented in this paper. The generalized topology for ([Formula: see text]) level MLI is developed with symmetrical isolated dc sources and ([Formula: see text]) number of switches. A five-level MLI is developed with five power switches and then by adding each one additional switch two more levels are added in the output voltage waveform. With the help of lookup table, the working principle of the proposed five-level MLI topology is explained. Sinusoidal pulse width modulation–phase disposition control technique has been used to get a minimal total harmonic distortion (THD). The proposed MLI topology is simulated on the MATLAB platform. The laboratory prototype is developed for five-level MLI, and the experimental results obtained validate the simulation studies. The dSPACE 1104 is used for generating gate pulses in case of experimentation. The output voltage and current THDs obtained are 9.20% and 4.60%, respectively; the harmonics are mitigated more with five-level inverter. The proposed topology is compared with the cascaded H-bridge multilevel inverter.

Performance Analysis and control strategies of Cascaded Multilevel Converters

Multilevel inverters have been widely used for high-voltage and high-power applications. Their perf0rmance is greatly superi0r t0 that 0f c0nventi0nal tw0-level inverters due t0 their reduced t0tal harm0nic dist0rti0n (THD),. This t0p0l0gy requires fewer c0mp0nents when c0mpared t0 di0de clamped, flying capacit0r and Bridgeless cascaded inverters and it requires fewer carrier signals and gate drives. Theref0re, the 0verall c0st and circuit c0mplexity are greatly reduced. This paper presents a n0vel reference and multicarrier based PWM scheme It als0 c0mpares the perf0rmance 0f the pr0p0sed scheme with that 0f c0nventi0nal cascaded bridge less rectifier (CBR) multilevel inverters. finally Simulati0n results fr0m MATLAB/SIMULINK are presented t0 verify the perf0rmance 0f the Five-level Multilevel Inverter

Comparative Study of Fuzzy Logic Based Speed Control of Multilevel Inverter fed Brushless DC Motor Drive

This paper presents a comparative analysis of speed control of brushless DC motor (BLDC) drive fed with conventional two-level, three and five level diode clamped multilevel inverter (DC-MLI). The performance of the drive system is successfully evaluated using Fuzzy Logic (FL) based speed controller. The control structure of the proposed drive system is described. The speed and torque characteristic of conventional two-level inverter is compared with the three and five-level multilevel inverter (MLI) for various operating conditions. The three and five level diode clamped multilevel inverters are simulated using IGBT’s and the mathematical model of BLDC motor has been developed in MATLAB/SIMULINK environment. The simulation results show that the Fuzzy based speed controller eliminate torque ripples and provides fast speed response. The developed Fuzzy Logic model has the ability to learn instantaneously and adapt its own controller parameters based on disturbances with minimum steady state error, overshoot and rise time of the output voltage. DOI: http://dx.doi.org/10.11591/ijpeds.v4i1.4745

Three-phase, Five-level Multi-level Inverter Topology

This article reports a three-phase multilevel inverter topology. The multilevel inverter configuration generates voltage levels similar to the corresponding well-known conventional diode-clamped, flying capacitors and cascaded H-bridge inverters but with fewer power circuit components and simplicity. By optimizing the proposed switching patterns through analysis, the total harmonic distortion of the inverter output line voltage waveforms have been reduced. The validity of the proposed cascaded multilevel inverter is verified through simulation and experiments.