Finite Series Resistance Research Articles

Modelling of current-voltage characteristics of infrared photo-detectors based on type – II InAs/GaSb super-lattice diodes with unipolar blocking layers

It is shown that current-voltage characteristics of infrared photo-detectors based on type-II InAs/GaSb super-lattices with uni-polar blocking layers can be modelled similar to a junction diode with a finite series resistance on account of blocking barriers. As an example this paper presents the results of a study of current-voltage characteristics of a type II InAs/GaSb super-lattice diode with PbIbN architecture using a recently proposed [J. Appl. Phys. 116, 084502 (2014)] method for modelling of illuminated photovoltaic detectors. The thermal diffusion, generation – recombination (g-r), and ohmic currents are found as principal components besides a component of photocurrent due to background illumination. The experimentally observed reverse bias diode current in excess of thermal current (diffusion + g-r), photo-current and ohmic shunt current is reported to be best described by an exponential function of the type, Iexcess = Ir0 + K1exp(K2 V), where Ir0, K1 and K2 are fitting parameters and V is the applied bias voltage. The present investigations suggest that the exponential growth of excess current with the applied bias voltage may be taking place along the localized regions in the diode. These localized regions are the shunt resistance paths on account of the surface leakage currents and/or defects and dislocations in the base of the diode.

Cooling, conductance, and thermometric performance of nonideal normal metal-superconductor tunnel junction pairs

We have investigated the effect of a difference in the tunnelling resistances of the individual normal metal-insulator-superconductor (NIS) tunnel junctions in a double junction SINIS device, with particular emphasis on the impact on the conductance, cooling and thermometric performance. By solving the electrical and thermal equations of the junctions in a self-consistent way, we find that asymmetry gives rise to many new features, such as appearance of an excess sub-gap current, improved cooling performance, exhibition of negative differential resistance, and improved temperature range of thermometric sensitivity. Experiments were also carried out to complement some of the numerical results. In addition, we studied theoretically and experimentally the effect of a finite series resistance, which also causes an excess current in the subgap region, and a suppression of the conductance maxima at the gap edge. Experimental results agree well with the theoretical predictions.

The behavior of the I-V-T characteristics of inhomogeneous (Ni∕Au)–Al0.3Ga0.7N∕AlN∕GaN heterostructures at high temperatures

We investigated the behavior of the forward bias current-voltage-temperature (I-V-T) characteristics of inhomogeneous (Ni∕Au)–Al0.3Ga0.7N∕AlN∕GaN heterostructures in the temperature range of 295–415K. The experimental results show that all forward bias semilogarithmic I-V curves for the different temperatures have a nearly common cross point at a certain bias voltage, even with finite series resistance. At this cross point, the sample current is temperature independent. We also found that the values of series resistance (Rs) that were obtained from Cheung’s method are strongly dependent on temperature and the values abnormally increased with increasing temperature. Moreover, the ideality factor (n), zero-bias barrier height (ΦB0) obtained from I-V curves, and Rs were found to be strongly temperature dependent and while ΦB0 increases, n decreases with increasing temperature. Such behavior of ΦB0 and n is attributed to Schottky barrier inhomogeneities by assuming a Gaussian distribution (GD) of the barrier heights (BHs) at the metal∕semiconductor interface. We attempted to draw a ΦB0 versus q∕2kT plot in order to obtain evidence of the GD of BHs, and the values of Φ¯B0=1.63eV and σ0=0.217V for the mean barrier height and standard deviation at a zero bias, respectively, were obtained from this plot. Therefore, a modified ln(I0∕T2)−q2σ02∕2(kT)2 versus q∕kT plot gives ΦB0 and Richardson constant A* as 1.64eV and 34.25A∕cm2K2, respectively, without using the temperature coefficient of the barrier height. The Richardson constant value of 34.25A∕cm2K2 is very close to the theoretical value of 33.74A∕cm2K2 for undoped Al0,3Ga0,7N. Therefore, it has been concluded that the temperature dependence of the forward I-V characteristics of the (Ni∕Au)–Al0.3Ga0.7∕AlN∕GaN heterostructures can be successfully explained based on the thermionic emission mechanism with the GD of BHs.

Limitations on the extraction of loss tangent from submicron transmission line test structures

When two-port S-parameters are used to characterize microstrip transmission line test structures, finite phase measurement precision, small reference plane offsets, and signals below the measurement threshold can significantly limit the ability to extract loss tangent from transmission lines with finite series resistance. By considering these errors, it is possible to select test structure geometries that minimize the impact of these errors.

Study of 18-cm long single-sided AC-coupled silicon microstrip detectors

The SSC GEM silicon Central Tracker design incorporated 18-cm long single-sided AC-coupled silicon microstrip ladders. Compared to the 12-cm long ladders considered in the preliminary stages of the tracker design, the 18-cm long ladders have the advantage of reduced cost, channel count and overall power consumption, and led to a simplified tracker assembly. However, such long ships also present the challenge of maintaining satisfactory performance. The increased capacitance and series resistance contribute to lower signal-to-noise ratios, longer time walk, higher power consumption per channel and increased probability of crosstalk to neighboring channels. In this paper, an accurate method to calculate the geometric capacitance of the AC-coupled microstrips is presented and the calculated results are compared with measurements, SPICE simulations are performed to predict the noise, the extent of interstrip capacitive coupling and the dispersion of the detector signal due to the finite series resistance of the metal strips and the long length of the detector. The influence of the preamplifier current and the shaping time on the signal and noise levels is also presented. The study concludes that the 18-cm long ladders can successfully satisfy the performance goals of the GEM silicon Central Tracker.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A method for the direct measurement of the solar cell junction ideality factor

A method, which can measure the junction ideality factor n directly from the illuminated output J-V curve, is described. The following cases are treated separately: infinite shunt resistance and zero series resistance; finite shunt resistance or finite series resistance; finite shunt resistance and finite series resistance. The method is used to measure the junction ideality factor of metal/insulator n-p, metal/insulator/semiconductor and n +-p silicon solar cells which are fabricated in our laboratory. The n values are in the range 1.25–1.89.

Energy Losses in Charging and Discharging of Capacitors

Analytical expressions are derived for the energy loss incurred in charging and discharging of lossy, i.e. dispersive capacitors under nearly step-function voltage, such as might be expected in the presence of a finite series resistance and with step-function rise and fall of the voltage. It is shown that the energy loss in the process of charging and discharging may amount to a large fraction of the total stored energy in the capacitor and this may give rise to a significant amount of heating. A physically realistic characteristic function is assumed for the capacitor, corresponding to a frequency-independent pendent loss over a large range of frequencies, such as might be obtained in many low-loss materials.