Finite Inversion Layer Thickness Research Articles

Current Drive Improvement Using Enhanced Body Effect Factor Due to Finite Inversion Layer Thickness in Variable-Threshold-Voltage Complementary MOS (VTCMOS)

A new scheme for recovering the current drive that is degraded due to the finite inversion layer thickness and gate depletion, using a high-speed mode variable-threshold-voltage complementary metal oxide semiconductor (VTCMOS), has been proposed. This scheme utilizes the body effect. The effects of finite inversion layer thickness and gate depletion enhance the body effect, and therefore substrate bias works more effectively. This enhancement of body effect is experimentally examined by measuring fully depleted silicon-on-insulator (FD SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs). The effect of gate oxide thickness, the scalability of this scheme, and the impact of the short-channel effect are also discussed.

Analytical charge-control and I-V model for submicrometer and deep-submicrometer MOSFETs fully comprising quantum mechanical effects

A new analytical current-voltage (I-V) model for submicrometer and deep-submicrometer metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed based on a newly developed charge-control model for the metal-oxide-semiconductor structure. Threshold-voltage shift due to quantum mechanical effects, finite inversion layer thickness effects (inversion layer capacitance), as well as increased depletion layer charge density after the strong inversion point are incorporated in the model. Inversion layer charge density with respect to the gate voltage from depletion through weak inversion to strong inversion regions with smooth transition between different regions is given by one expression. Two-dimensional short channel effects such as channel length modulation, drain-induced barrier lowering, mobility degradation, and carrier velocity saturation, as well as polysilicon depletion effects are included in the I-V model. Model results are compared with both numerical results of carrier sheet density and surface potential in the channel, and experimental results of I-V data for submicrometer and deep-submicrometer MOSFETs down to 0.09-/spl mu/m effective gate length and the accuracy of the model are demonstrated.

Comprehensive analytical physical model of quantized inversion layer in MOS structure

A new analytical charge model in quantized inversion layer in MOS structure is developed by comprehensively considering the quantum mechanical effects. The model is based on the newly proposed concept of space charge capacitance. Explicit expressions of surface potential and inversion layer carrier density are given which have smooth transition characteristics from depletion to weak to strong inversion regions. Threshold voltage shift, finite inversion layer thickness and the increment of depletion charge after strong inversion are properly modeled. Model results are compared with numerical data by self-consistent solution of Schrodinger and Poisson equation and the high accuracy of the model is demonstrated.

Experimental studies on deep submicron CMOS scaling

N- and surface channel p-MOSFETs and CMOS ring oscillators with channel lengths down to and physical gate oxide thicknesses of 2.5 nm-5.8 nm were fabricated. The parasitic SD series resistance, threshold voltages, finite thickness of inversion layer including quantum and polysilicon gate depletion effects, drain saturation current, load capacitance of ring oscillator and ring oscillator speed were characterized at voltages from 1.5 to 3.3 V. The results confirmed the accuracy of the analytical models recently developed. The existence of an optimum gate oxide for given , , and is demonstrated from both the analytical model and the experimental data.

Quantitative understanding of inversion-layer capacitance in Si MOSFET's

The inversion-layer capacitance (C/sub inv/) in n-channel Si MOSFET's is studied experimentally and theoretically with emphasis on the surface carrier concentration (N/sub s/) dependence of C/sub inv/, which is important in the quantitative description of the inversion-layer capacitance. Based on the experimental N/sub s/ and temperature dependencies, the physical origin of C/sub inv/ is discussed. It is shown that, at lower N/sub s/, C/sub inv/ is determined by the finite effective density of states, while, at higher N/sub s/ C/sub inv/ is determined quantum mechanically by the finite inversion-layer thickness. Also, the results of the surface orientation dependence of C/sub inv/ are presented as the first direct evidence for the fact that surface quantization plays a significant role in C/sub inv/ even at room temperature. The self-consistent Poisson-Schrodinger calculation of C/sub inv/ is performed and found to represent the experimental results accurately. The influence of C/sub inv/ on the gate capacitance is discussed in terms of the device scaling on basis of the experimental and calculated values of C/sub inv/.

On the performance limit for Si MOSFET's: experimental study

Short-channel MOSFETs fabricated by direct-write electron-beam lithography have been examined with regard to parameters such as channel length, oxide thickness, and substrate doping concentration. A simple relationship between channel length and transconductance in the saturated region has been derived from the experimental results, and the performance of MOSFETs with zero channel lengths has been evaluated as a function of oxide thickness. The ultimate performance of MOSFETs with both zero channel length and zero oxide thickness has been estimated to be about 3000 mS/mm. This limitation is attributed to the saturation velocity and the finite inversion layer thickness. The electron saturation velocity in the inversion layer has been confirmed experimentally to be 1.0*10/sup 7/ cm/s.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's

In this paper, we discuss the low-drain voltage transconductance behavior of the MOSFET due to surface mobility variation, interface states and small geometry, and its application in threshold voltage determination. We modify the Pao-Sah drain current model to incorporate a mobility model and obtain 3% accuracy from subthreshold to very strong inversion for a wide range of substrate biases. The effects of non-ideal scaling, finite inversion layer thickness, surface roughness mobility degradation under high normal electric fields and interface states on the transconductance behavior are discussed. We observe the peak transconductance increases with substrate bias in short-channel devices and decreases with substrate bias in long-channel devices. Finally, we show the threshold voltage can be determined from the gate voltage at which the rate of transconductance change ( ∂g m ∂V GS ) is a maximum. This threshold voltage is identifiable with a known band-bending (surface potential) of the substrate (φ s ⋍ 2φ F + V SB ) , from which the band-bending at all gate biases can be calculated. The transconductance change (TC) method is insensitive to device degradations (e.g. mobility, series resistance, hot-carrier) in contrast to the conventional method of linear extrapolation to zero drain current.

Experimental determination of finite inversion layer thickness in thin gate oxide MOSFETS

Experimental determination of finite inversion layer thickness in thin gate oxide MOSFETS

Experimental determination of finite inversion layer thickness in thin gate oxide MOSFETS

The influence of finite inversion layer thickness on the channel current in ultra thin gate oxide MOSFETs is investigated. The dependences of the channel current on gate bias, temperature, surface doping concentration and substrate bias indicate that the carrier transport is well characterized by introducing an effective oxide thickness which is an actual oxide thickness plus an average thickness of charge distribution in inversion layer. It is also confirmed that the mobility is independent of the gate oxide thickness in the range from 360 to 31 Å