Fermi Level Movement Research Articles

Temperature Modulating Fermi Level Pinning in 2D GeSe for High‐Performance Transistor

Abstract2D layered germanium selenide (GeSe) material possesses in‐plane anisotropy because of low‐symmetry crystal structure with a new degree of freedom for enhanced optical and electronic properties. However, their systematic vibrational and electronics properties are still under the scope to study. Herein, the vibrational properties of GeSe sheets are studied by Raman spectroscopy. Whereas, the temperature‐dependent electronic band structure is studied using angle‐resolved photoemission spectroscopy (ARPES) combined with density functional theory calculations. Moreover, the field‐effect transistor (FET) is fabricated on a few‐layer GeSe with high performance. The vibrational modes and demonstrates linear softening as the temperature increases, with temperature coefficient value associated by anharmonic phonon–phonon/electron coupling. Besides, the enhanced dielectric screening effect of long‐range Coulomb and interlayer interaction is observed from bulk to monolayer. Similarly, ARPES results further show Fermi level movement toward the valance band as increased temperature represents hole doping to pining the Fermi level, which indicates superior carrier concentration for electronic properties. The fabricated FET device on six layers GeSe exhibits high carrier mobility of 52.89 cm2 V−1 s−1 with an on/off ratio above 4 × 105 at room temperature, while it decreased below the room temperature. Our results provide the important figure of merit for GeSe‐based novel nanoelectronic and thermoelectric devices.

In-situ generation Bi12O15Cl6/BiOI core-shell photocatalyst with efficient LED light-driven degradation and antibacterial properties: Factors, degradation pathway and mechanism

• New core/shell Bi 12 O 15 Cl 6 /BiOI hybrid junction was prepared by a facile in-situ generation method. • Bi 12 O 15 Cl 6 /BiOI can effectively remove MO, TC and E.coli under LED light. • h + , •O 2 - and •OH are all active substances in photocatalytic reactions and possible degradation pathway of TC was proposed. • Fermi level reached new equilibrium between p-type BiOI and n-type Bi 12 O 15 Cl 6 . • The core-shell structure and n-p junction effectively promote the separation and migration of photogenic carriers. The construction of composite photocatalytic materials with compact heterojunction is of great significance for improving the properties of materials. To achieve this goal, novel core/shell Bi 12 O 15 Cl 6 /BiOI photocatalyst, with n-p junction heterojunction, was prepared by using p-type BiOI nanosheet coating with lamellar n-type Bi 12 O 15 Cl 6 . A series of techniques including XRD, TEM, HRTEM and BET confirmed the structure of Bi 12 O 15 Cl 6 /BiOI. As expected, methyl orange (MO), tetracycline (TC) and E. coli can be effectively removed by the novel photocatalyst under LED light illumination. The optimal sample Bi 12 O 15 Cl 6 /BiOI can degrade 90.3% MO in 90 min, degrade 75.5% TC in 180 min, and completely destroy E. coli in 40 min. Photocurrent and electrochemical impedance analysis (EIS) show that the separation efficiency of photo-excited electron-hole pairs in the composite material is significantly improved. Between n-type Bi 12 O 15 Cl 6 and p-type BiOI semiconductor, a Fermi level movement produced a more negative conduction band position and a more positive valence band position, which is conducive to the production of active species and the photocatalytic redox reaction. Moreover, the effects of catalyst dosage and pollutant concentration on the degradation of MO and TC were systematically investigated. The capture experiment proved that the superoxide anion radicals (•O 2 − ) and holes (h + ) are main active species in photocatalytic reaction. The intermediates were identified by mass spectrometry analysis (MS), and the possible photocatalytic degradation pathway of TC was proposed.

Misfit epitaxial strain manipulated transport properties in cubic In2O3 hetero-epilayers

In this Letter, we report on the evolution of electronic properties governed by epitaxial misfit strain in cubic In2O3 epilayers grown on sapphire. At elevated growth temperature, the competition between the film/substrate lattice mismatch and the thermal expansion mismatch alters the macroscopic biaxial strain from compressive to tensile. Simultaneously, the electron concentration is tuned from degeneration to non-degeneration density below the Mott criterion. The observed surface electron accumulation and metal-insulator transition result from the oxygen deficiency formed at low growth temperature, while high-temperature epitaxy is favorable to achieve remarkably enhanced mobility. The effective strain-property coupling suggests that the improved oxygen stoichiometry and the Fermi level movement controlled by the biaxial strains are responsible for the Mott transition. The strain-mediated reduction of the electron effective mass contributes to the enhanced intrinsic mobility in tensile-strained In2O3 epilayers. These results highlight that strain engineering is an effective stimulus to manipulate the transport properties of oxide semiconductors with improved performance and unexpected functionalities.

The impact of forming gas annealing on the electrical characteristics of sulfur passivated Al2O3/In0.53Ga0.47As (110) metal-oxide-semiconductor capacitors

This study reports the impact of forming gas annealing (FGA) on the electrical characteristics of sulfur passivated, atomic layer deposited Al2O3 gate dielectrics deposited on (110) oriented n- and p-doped In0.53Ga0.47 As layers metal-oxide-semiconductor capacitors (MOSCAPs). In combination, these approaches enable significant Fermi level movement through the bandgap of both n- and p-doped In0.53Ga0.47 As (110) MOSCAPs. A midgap interface trap density (Dit) value in the range 0.87−1.8×1012 cm−2eV−1 is observed from the samples studied. Close to the conduction band edge, a Dit value of 3.1×1011 cm−2eV−1 is obtained. These data indicate the combination of sulfur pre-treatment and FGA is advantageous in passivating trap states in the upper half of the bandgap of (110) oriented In0.53Ga0.47 As. This is further demonstrated by a reduction in border trap density in the n-type In0.53Ga0.47 As (110) MOSCAPs from 1.8×1012 cm−2 to 5.3×1011 cm−2 as a result of the FGA process. This is in contrast to the observed increase in border trap density after FGA from 7.3×1011 cm−2 to 1.4×1012 cm−2 in p-type In0.53Ga0.47 As (110) MOSCAPs, which suggest FGA is not as effective in passsivating states close to the valence band edge.

Adsorption study of copper phthalocyanine on Si(111)(√3 × √3)R30°Ag surface

The adsorption of copper phthalocyanine (CuPc) molecules on Si(111)(√3×√3)R30°Ag surface is studied at room temperature under ultra high vacuum. Crystallographic, chemical and electronic properties of the interface are investigated by low energy electron diffraction (LEED), ultraviolet and X-ray photoemission spectroscopies (UPS, XPS) and X-ray photoemission diffraction (XPD). LEED and XPD results indicate that after one monolayer deposition the molecular layer is highly ordered with a flat lying adsorption configuration. The corresponding pattern reveals the coexistence of three symmetrically equivalent orientations of molecules with respect to the substrate. XPS core level spectra of the substrate reveal that there is no discernible chemical interaction between molecules and substrate; however there is evidence of Fermi level movement. During the growth, the work function was found to decrease from 4.90eV for the clean substrate to 4.35eV for the highest coverage (60 monolayers). Within a thickness of two monolayer deposition an interface dipole of 0.35eV and a band bending of 0.2eV have been found. UPS spectra indicate the existence of a band bending of the highest occupied molecular orbital (HOMO) of 0.55eV. The changes in the work function, in the Fermi level position and in the HOMO state have been used to determine the energy level alignment at the interface.

Interfacial n-Doping Using an Ultrathin TiO2 Layer for Contact Resistance Reduction in MoS2.

We demonstrate a low and constant effective Schottky barrier height (ΦB ∼ 40 meV) irrespective of the metal work function by introducing an ultrathin TiO2 ALD interfacial layer between various metals (Ti, Ni, Au, and Pd) and MoS2. Transmission line method devices with and without the contact TiO2 interfacial layer on the same MoS2 flake demonstrate reduced (24×) contact resistance (RC) in the presence of TiO2. The insertion of TiO2 at the source-drain contact interface results in significant improvement in the on-current and field effect mobility (up to 10×). The reduction in RC and ΦB has been explained through interfacial doping of MoS2 and validated by first-principles calculations, which indicate metallic behavior of the TiO2-MoS2 interface. Consistent with DFT results of interfacial doping, X-ray photoelectron spectroscopy (XPS) data also exhibit a 0.5 eV shift toward higher binding energies for Mo 3d and S 2p peaks in the presence of TiO2, indicating Fermi level movement toward the conduction band (n-type doping). Ultraviolet photoelectron spectroscopy (UPS) further corroborates the interfacial doping model, as MoS2 flakes capped with ultrathin TiO2 exhibit a reduction of 0.3 eV in the effective work function. Finally, a systematic comparison of the impact of selective doping with the TiO2 layer under the source-drain metal relative to that on top of the MoS2 channel shows a larger benefit for transistor performance from the reduction in source-drain contact resistance.

Heteroepitaxial Ge MOS Devices on Si Using Composite AlAs/GaAs Buffer

Structural and electrical characteristics of epitaxial germanium (Ge) heterogeneously integrated on silicon (Si) via a composite, large bandgap AlAs/GaAs buffer are investigated. Electrical characteristics of N-type metal-oxide-semiconductor (MOS) capacitors, fabricated from the aforementioned material stack are then presented. Simulated and experimental X-ray rocking curves show distinct Ge, AlAs, and GaAs epilayer peaks. Moreover, secondary ion mass spectrometry, energy dispersive X-ray spectroscopy (EDS) profile, and EDS line profile suggest limited interdiffusion of the underlying buffer into the Ge layer, which is further indicative of the successful growth of device-quality epitaxial Ge layer. The Ge MOS capacitor devices demonstrated low frequency dispersion of 1.80% per decade, low frequency-dependent flat-band voltage, $V_{FB}$ , shift of 153 mV, efficient Fermi level movement, and limited C-V stretch out. Low interface state density $(D_{it} )$ from $8.55 \times 10^{11} $ to $1.09 \times 10^{12}~ {\rm cm}^{-2} ~{\rm eV}^{-1} $ is indicative of a high-quality oxide/Ge heterointerface, an effective electrical passivation of the Ge surface, and a Ge epitaxy with minimal defects. These superior electrical and material characteristics suggest the feasibility of utilizing large bandgap III-V buffers in the heterointegration of high-mobility channel materials on Si for future high-speed complementary metal-oxide semiconductor logic applications.

High quality HfO2/p-GaSb(001) metal-oxide-semiconductor capacitors with 0.8 nm equivalent oxide thickness

We investigate in-situ cleaning of GaSb surfaces and its effect on the electrical performance of p-type GaSb metal-oxide-semiconductor capacitor (MOSCAP) using a remote hydrogen plasma. Ultrathin HfO2 films grown by atomic layer deposition were used as a high permittivity gate dielectric. Compared to conventional ex-situ chemical cleaning methods, the in-situ GaSb surface treatment resulted in a drastic improvement in the impedance characteristics of the MOSCAPs, directly evidencing a much lower interface trap density and enhanced Fermi level movement efficiency. We demonstrate that by using a combination of ex-situ and in-situ surface cleaning steps, aggressively scaled HfO2/p-GaSb MOSCAP structures with a low equivalent oxide thickness of 0.8 nm and efficient gate modulation of the surface potential are achieved, allowing to push the Fermi level far away from the valence band edge high up into the band gap of GaSb.

Mechanisms of thermally induced threshold voltage instability in GaN-based heterojunction transistors

In this work, we attempt to reveal the underlying mechanisms of divergent VTH-thermal-stabilities in III-nitride metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) and MOS-Channel-HEMT (MOSC-HEMT). In marked contrast to MOSC-HEMT featuring temperature-independent VTH, MIS-HEMT with the same high-quality gate-dielectric/III-nitride interface and similar interface trap distribution exhibits manifest thermally induced VTH shift. The temperature-dependent VTH of MIS-HEMT is attributed to the polarized III-nitride barrier layer, which spatially separates the critical gate-dielectric/III-nitride interface from the channel and allows “deeper” interface trap levels emerging above the Fermi level at pinch-off. This model is further experimentally validated by distinct VG-driven Fermi level movements at the critical interfaces in MIS-HEMT and MOSC-HEMT. The mechanisms of polarized III-nitride barrier layer in influencing VTH-thermal-stability provide guidelines for the optimization of insulated-gate III-nitride power switching devices.

(Invited) High κ/InGaAs for Ultimate CMOS – Interfacial Passivation, Low Ohmic Contacts, and Device Performance

(Invited) High κ/InGaAs for Ultimate CMOS – Interfacial Passivation, Low Ohmic Contacts, and Device Performance

Numerical and Experimental Assessment of Charge Control in III–V Nano-Metal-Oxide-Semiconductor Field-Effect Transistor

III-V Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) with a gate stack based on high-kappa dielectric appears as an appealing solution to increase the performance of either microwave or logic circuits with low supply voltage (V(DD)). The main objective of this work is to provide a theoretical model of the gate charge control in III-V MOS capacitors (MOSCAPs) using the accurate self-consistent solution of 1D and 2D Poisson-Schrödinger equations. This study allows us to identify the major mechanisms which must be included to get theoretical calculations in good agreement with experiments. Actually, our results obtained for an Al2O3/In0.53Ga0.47As MOSCAP structure are successfully compared to experimental measurements. We evaluate how III-V MOS technology is affected by the density of interface states which favors the Fermi level pinning at the Al2O3/In0.53Ga0.47As interface in both depletion and inversion regimes, which is a consequence of the poor gate control of the mobile inversion carrier density. The high energy valleys (satellite valleys) contribution observed in many theoretical calculations appears to be fully negligible in the presence of interface states. The enhancement of doping density in the channel is shown to improve the short-channel effect (SCE) immunity but to the price of higher sensitivity to the interface trap effect which manifests through a low Fermi level movement efficiency at interface in OFF-state and a low inversion carrier density in ON-state, even in the long channel case.

Improvement of the GaSb/Al2O3 interface using a thin InAs surface layer

The highly reactive GaSb surface was passivated with a thin InAs layer to limit interface trap state density (Dit) at the III–V/high-k oxide interface. This InAs surface was subjected to various cleaning processes to effectively reduce native oxides before atomic layer deposition (ALD). Ammonium sulfide pre-cleaning and trimethylaluminum/water ALD were used in conjunction to provide a clean interface and annealing in forming gas (FG) at 350°C resulted in an optimized fabrication for n-GaSb/InAs/high-k gate stacks. Interface trap density, Dit≈2–3×1012cm−2eV−1 resided near the n-GaSb conductance band which was extracted and compared with three different methods. Conductance–voltage–frequency plots showed efficient Fermi level movement and a sub-threshold slope of 200mV/dec. A composite high-k oxide process was also developed using ALD of Al2O3 and HfO2 resulting in a Dit≈6–7×1012cm−2eV−1. Subjecting these samples to a higher (450°C) processing temperature results in increased oxidation and a thermally unstable interface. p-GaSb displayed very fast minority carrier generation/recombination likely due to a high density of bulk traps in GaSb.

Surface chemistry and Fermi level movement during the self-cleaning of GaAs by trimethyl-aluminum

The removal of the native oxides from NH4OH-cleaned p-GaAs (100) by exposure to trimethyl-aluminum (TMA) was studied by in situ photoelectron spectroscopy using synchrotron radiation. The reduction of high-valence As- and Ga-oxides occurred through different routes: while As3+ was reduced to As(1±Δ)+ suboxides (with 0 ≤ Δ ≤ 1), Ga3+ was directly removed. The surface Fermi level was shifted by about 100 meV towards the valence band edge upon TMA exposure. This indicates that removing the native oxide of GaAs by TMA is insufficient to create interfaces between GaAs and Al2O3 with defects densities below the 1012 cm−2 range.

Low interfacial trap density and sub-nm equivalent oxide thickness in In0.53Ga0.47As (001) metal-oxide-semiconductor devices using molecular beam deposited HfO2/Al2O3 as gate dielectrics

We investigated the passivation of In0.53Ga0.47As (001) surface by molecular beam epitaxy techniques. After growth of strained In0.53Ga0.47As on InP (001) substrate, HfO2/Al2O3 high-κ oxide stacks have been deposited in-situ after surface reconstruction engineering. Excellent capacitance-voltage characteristics have been demonstrated along with low gate leakage currents. The interfacial density of states (Dit) of the Al2O3/In0.53Ga0.47As interface have been revealed by conductance measurement, indicating a downward Dit profile from the energy close to the valence band (medium 1012 cm−2eV−1) towards that close to the conduction band (1011 cm−2eV−1). The low Dit’s are in good agreement with the high Fermi-level movement efficiency of greater than 80%. Moreover, excellent scalability of the HfO2 has been demonstrated as evidenced by the good dependence of capacitance oxide thickness on the HfO2 thickness (dielectric constant of HfO2 ∼20) and the remained low Dit’s due to the thin Al2O3 passivation layer. The sample with HfO2 (3.4 nm)/Al2O3 (1.2 nm) as the gate dielectrics has exhibited an equivalent oxide thickness of ∼0.93 nm.

Al-doped HfO2/In0.53Ga0.47As metal-oxide-semiconductor capacitors

Hafnium oxide gate dielectrics doped with a one to two percent of aluminum are grown on In0.53Ga0.47As channels by codeposition of trimethylaluminum (TMA) and hafnium tertbutoxide (HTB). It is shown that the addition of TMA during growth allows for smooth, amorphous films that can be scaled to ∼5 nm physical thickness. Metal-oxide-semiconductor capacitors (MOSCAPs) with this dielectric have an equivalent oxide thickness of 1 nm, show an unpinned, efficient Fermi level movement and lower interface trap densities than MOSCAPs with HfO2 dielectrics grown by sequential TMA/HTB deposition.

Field-induced strain degradation of AlGaN/GaN high electron mobility transistors on a nanometer scale

Nanoscale Kelvin probe force microscopy and depth-resolved cathodoluminescence spectroscopy reveal an electronic defect evolution inside operating AlGaN/GaN high electron mobility transistors with degradation under electric-field-induced stress. Off-state electrical stress results in micron-scale areas within the extrinsic drain expanding and decreasing in electric potential, midgap defects increasing by orders-of-magnitude at the AlGaN layer, and local Fermi levels lowering as gate-drain voltages increase above a characteristic stress threshold. The pronounced onset of defect formation, Fermi level movement, and transistor degradation at the threshold gate-drain voltage of J. A. del Alamo and J. Joh [Microelectron. Reliab. 49, 1200 (2009)] is consistent with crystal deformation and supports the inverse piezoelectric model of high electron mobility transistor degradation.

Effect of postdeposition anneals on the Fermi level response of HfO2/In0.53Ga0.47As gate stacks

The electrical characteristics, in particular interface trap densities, oxide capacitance, and Fermi level movement, of metal oxide semiconductor capacitors with HfO2 gate dielectrics and In0.53Ga0.47As channels are investigated as a function of postdeposition annealing atmosphere. It is shown, using both conductance and Terman methods, that the Fermi level of nitrogen annealed stacks is effectively pinned at midgap. In contrast, samples annealed in forming gas show a large band bending in response to an applied gate voltage and a reduced midgap interface trap density compared to those annealed in nitrogen.

Effective passivation and high-performance metal–oxide–semiconductor devices using ultra-high-vacuum deposited high- κ dielectrics on Ge without interfacial layers

Without using any interfacial passivation layers, high- κ dielectric Y 2O 3, HfO 2, and Ga 2O 3(Gd 2O 3) [GGO], by electron beam evaporation in ultra-high-vacuum (UHV), have been directly deposited on Ge substrate. Comprehensive investigations have been carried out to study the oxide/Ge interfaces chemically, structurally, and electronically: hetero-structures of all the studied oxides on Ge are highly thermally stable with annealing to 500 °C, and their interfaces remain atomically sharp. The electrical analyses have been conducted on metal–oxide–semiconductor (MOS) devices, i.e. MOS capacitors (MOSCAPs) and MOS field-effect-transistors (MOSFETs). Dielectrics constants of the Y 2O 3, HfO 2, and GGO have been extracted to be ∼17, 20, and 13–15, respectively, indicating no interfacial layer formation with 500 °C annealing. A low interfacial density of states ( D its), as low as 3 × 10 11 cm −2 eV −1, has been achieved for GGO/Ge near mid-gap along with a high Fermi-level movement efficiency as high as 80%. The GGO/Ge pMOSFETs with TiN as the metal gate have yielded very high-performances, in terms of 496 μA/μm, 178 μS/μm, and 389 cm 2/V s in saturation drain current density, maximum transconductance, and effective hole mobility, respectively. The gate width and gate length of the MOSFET are 10 μm and 1 μm.

Meyer–Neldel Rule and Extraction of Density of States in Amorphous Indium–Gallium–Zinc-Oxide Thin-Film Transistor by Considering Surface Band Bending

In this study, we analyzed the temperature-dependent characteristics of amorphous indium–gallium–zinc-oxide (a-IGZO) thin-film transistors (TFTs). We observed that a-IGZO TFTs obey the Meyer–Neldel rule (MN rule) at low gate-to-source voltage (VGS) and the inverse MN rule at high VGS, both of which can be explained by the statistical shift of Fermi level and electrostatic potential. Large Fermi level movement for small VGS change and the inverse MN rule, which are hardly observed for conventional amorphous TFTs, indicate that there is a very low density of state (DOS) in the sub-bandgap region for a-IGZO TFTs and the performance of TFTs is not affected by contact characteristics, respectively. By using the field-effect method and considering surface band bending, we extracted the DOS in the sub-bandgap region, the distribution of which is clearly distinguished by deep and tail states. The calculated parameters for tail and deep states were Nta = 3.5 ×1017 cm-3 eV-1, Eta = 0.18 eV, Nda = 1.6×1016 cm-3 eV-1, and σda = 0.21 eV.

Achieving a low interfacial density of states in atomic layer deposited Al2O3 on In0.53Ga0.47As

Atomic-layer-deposited Al2O3 on In0.53Ga0.47As with short air exposure between the oxide and semiconductor deposition has enabled the demonstration of nearly ideal frequency-dependent and quasistatic capacitance-voltage (C-V) characteristics. The excellent quasistatic C-V characteristics indicate a high efficiency of 63% for the Fermi-level movement near the midgap. A low mean interfacial density of states (D¯it)∼2.5×1011 cm−2 eV−1 was determined under 1 MHz using a charge pumping method, which was also employed to probe the depth profile of bulk traps (Nbt) and the energy dependence of Dit at 50 kHz: a low Nbt∼7×1018 cm−3 and a Dit of (2–4)×1011 cm−2 eV−1 in the lower half of the band gap and a higher Dit of ∼1012 cm−2 eV−1 in the upper half of the band gap. The employment of charge pumping method has given a more accurate determination of Dit, which is usually overestimated using other commonly methods such as the Terman, conductance, and high-low frequencies due to the influence of weak inversion at room temperature.