Faulty Neurons Research Articles

Towards robust neural networks: Exploring counterfactual causality-based repair

Despite the widespread applications of neural networks, increasing concerns arise regarding their reliability and security. This paper introduces a novel repair approach integrating counterfactual causality with a multi-objective algorithm to mitigate critical security property issues, including backdoor attacks, safety violations, and unfairness. Firstly, we abstract the neural network into a counterfactual structure causal model, utilizing a causal trace to allocate contributions to each hidden layer neuron for output prediction. Secondly, ”faulty” neurons are identified through fault location, utilizing counterfactual causality between positive and negative example-guided attributes and neuronal contribution. Finally, an ablation study determines the number of neurons for repair. The multi-objective algorithm NSGA-III is then applied to optimize the faulty neurons, adjusting weight parameters to rectify erroneous behavior and eliminate vulnerabilities while maximizing the model’s accuracy. This method achieves notable Pareto optimization and effectively eliminates vulnerabilities in neural networks. In comparative experiments against CARE (CAusality-based REpair) techniques, our Counterfactual Causality-Based Repair (CCBR) method significantly reduces backdoor attack success rates and security violations to less than 1%, while maintaining model accuracy and ensuring security for normal inputs. In fairness repair tasks, CCBR improves fairness by 92.56%, a substantial 19.56% increase over CARE. These results affirm the robustness and practicality of CCBR, establishing it as a valuable tool for enhancing neural network safety and fairness.

Towards Fault Tolerance of Reservoir Computing in Time Series Prediction

During the deployment of practical applications, reservoir computing (RC) is highly susceptible to radiation effects, temperature changes, and other factors. Normal reservoirs are difficult to vouch for. To solve this problem, this paper proposed a random adaptive fault tolerance mechanism for an echo state network, i.e., RAFT-ESN, to handle the crash or Byzantine faults of reservoir neurons. In our consideration, the faulty neurons were automatically detected and located based on the abnormalities of reservoir state output. The synapses connected to them were adaptively disconnected and withdrawn from the current computational task. On the widely used time series with different sources and features, the experimental results show that our proposal can achieve an effective performance recovery in the case of reservoir neuron faults, including prediction accuracy and short-term memory capacity (MC). Additionally, its utility was validated by statistical distributions.

RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults.

To maximize the performance and energy efficiency of Spiking Neural Network (SNN) processing on resource-constrained embedded systems, specialized hardware accelerators/chips are employed. However, these SNN chips may suffer from permanent faults which can affect the functionality of weight memory and neuron behavior, thereby causing potentially significant accuracy degradation and system malfunctioning. Such permanent faults may come from manufacturing defects during the fabrication process, and/or from device/transistor damages (e.g., due to wear out) during the run-time operation. However, the impact of permanent faults in SNN chips and the respective mitigation techniques have not been thoroughly investigated yet. Toward this, we propose RescueSNN, a novel methodology to mitigate permanent faults in the compute engine of SNN chips without requiring additional retraining, thereby significantly cutting down the design time and retraining costs, while maintaining the throughput and quality. The key ideas of our RescueSNN methodology are (1) analyzing the characteristics of SNN under permanent faults; (2) leveraging this analysis to improve the SNN fault-tolerance through effective fault-aware mapping (FAM); and (3) devising lightweight hardware enhancements to support FAM. Our FAM technique leverages the fault map of SNN compute engine for (i) minimizing weight corruption when mapping weight bits on the faulty memory cells, and (ii) selectively employing faulty neurons that do not cause significant accuracy degradation to maintain accuracy and throughput, while considering the SNN operations and processing dataflow. The experimental results show that our RescueSNN improves accuracy by up to 80% while maintaining the throughput reduction below 25% in high fault rate (e.g., 0.5 of the potential fault locations), as compared to running SNNs on the faulty chip without mitigation. In this manner, the embedded systems that employ RescueSNN-enhanced chips can efficiently ensure reliable executions against permanent faults during their operational lifetime.

Robust Monitoring and Fault Isolation of Nonlinear Industrial Processes Using Denoising Autoencoder and Elastic Net

Robust process monitoring and reliable fault isolation in industrial processes usually encounter different challenges, including process nonlinearity and noise interference. In this brief, a novel method denoising autoencoder and elastic net (DAE–EN) is proposed to solve the aforementioned issues by effectively integrating DAE and EN. The DAE is first trained to robustly capture the nonlinear structure of the industrial data. Then, the encoder network is updated into a sparse model using EN, so that the key variables associated with each neuron can be selected. After that two statistics are developed based on the extracted systematic structure and the retained residual information. In addition, another statistic is also constructed by combining the aforementioned two statistics to provide an overall measurement for the process sample. In this way, a robust monitoring model can be constructed to monitor the abnormal status in industrial processes. After the fault is detected, the faulty neurons are identified by the sparse exponential discriminant analysis, so that the associated faulty variables along each faulty neuron can thus be isolated. Two real industrial processes are used to validate the performance of the proposed method. Experimental results show that the proposed method can effectively detect the abnormal samples in industrial processes and accurately isolate the faulty variables from the normal ones.

Concurrent diagnosis in digital implementations of neural networks

Diagnosis is a basic issue of any fault-tolerance policy. Fault localization within the neural architecture is necessary to provide information for hardware reconfiguration in order to achieve system survival, possibly with reduced computational capabilities. In this paper, a comprehensive approach to architectural fault-tolerant design of neural networks is proposed and evaluated, with specific reference to concurrent high-level diagnosis and fault localization. The approach refers to the operational life of trained neural networks. Two error detection techniques are applied: on-line concurrent diagnosis with the use of data coding for error detection at neuron level and on-line compact testing for localization of the faulty neuron within the network.

Weight shifting techniques for self-recovery neural networks

In this paper, a self-recovery technique of feedforward neural networks called weight shifting and its analytical models are proposed. The technique is applied to recover a network when some faulty links and/or neurons occur during the operation. If some input links of a specific neuron are detected faulty, their weights will be shifted to healthy links of the same neuron. On the other hand, if a faulty neuron is encountered, then we can treat it as a special case of faulty links by considering all the output links of that neuron to be faulty. The aim of this technique is to recover the network in a short time without any retraining and hardware repair. We also propose the hardware architecture for implementing this technique.

Fault tolerance in simple perceptrons

The tolerance of a simple perceptron to faults in the neurons in the input layer is studied in terms of the dependence of the maximum storage capacity of the perceptron on the fraction of faulty neurons. Evaluation of the capacity using the space of interactions method in the limit when the number of input neurons is very large shows that the fault tolerance of simple perceptrons can be substantial.