Fault Injection Method Research Articles

Enhanced Soft Error Rate Estimation Technique for Aerospace Electronics Safety Design via Emulation Fault Injection

In this paper, we propose Automatic Configuration Memory Fault Injection (ACMFI), a tool that calculates the architectural vulnerability factor (AVF) and soft error rate (SER) using the emulation fault injection technique. SER, which is essential for the safety design of aerospace electronics, can be obtained by experiments (beam tests) performed in a beam facility equipped with high-energy radiation facilities. However, SER calculation using beam tests has the disadvantage of a high cost and a long waiting time, making it difficult to use in the conceptual design stage, which is the aerospace system development stage and the initial HW/SW development stage. Using the emulation fault injection method, it is possible to estimate the SER, which can be used in the system safety design phase. This paper describes the ACMFI tool, which automatically performs emulation fault injection in SRAM-based FPGAs, which are widely used in aerospace electronic hardware. Unlike the existing methods, the proposed method has the advantage of minimizing the side effects by injecting faults into a dedicated SRAM area. In other words, the SER obtained by the proposed method can be estimated more accurately than the SER result obtained by the existing method. To prove the accuracy of the proposed test method, the SER calculated by performing an emulation fault injection test on the same FPGA was compared with the SER results tested at the beam facility. The method of obtaining SER using the proposed ACMFI gave results that were closer to the SER obtained by testing at the beam facility than the method of obtaining SER using the existing EMFI. The proposed method is used to calculate the failure rate, which is a key variable in determining the development assurance level when performing safety design tests in aerospace system development, enabling the development of safer systems and lower cost/higher quality aerospace electronic equipment than before.

EPBS_FIDMV: A fault injection and diagnosis methods validation benchmark for EPBS of EMU

The electro-pneumatic brake system (EPBS) is an essential part of electric multiple units. Fault diagnosis (FD) methods play an important role in the safe operation of EPBS, and have been active research direction. The literature is considerably on studies concerned with new fault diagnosis methods, while how to quantitatively validate these methods for EPBS is quite few. The main attribute is the difficulty of obtaining fault data due to the long-term normal operation. Besides, fault experiments on the real platform are hard to control, and the cost is high. Therefore, this paper presents a new open-source benchmark for validating the FD methods of EPBS. Initially, we review the existing pure datasets and benchmarks available for validating FD methods, revealing a notable absence of a benchmark specially designed for EPBS. Then, the normal and fault models of EPBS are established and implemented by co-simulation of AMESim and MATLAB/Simulink. The fault models include brake cylinder faults, train pipe faults, EP valve faults, and sensor faults. Additionally, a GUI interface is developed to visually present the validation results. The benchmark accompanying this paper is available on the website at http://gfist.csu.edu.cn/Download.html.

A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks

Artificial Intelligence (AI) and, in particular, Machine Learning (ML), have emerged to be utilized in various applications due to their capability to learn how to solve complex problems. Over the past decade, rapid advances in ML have presented Deep Neural Networks (DNNs) consisting of a large number of neurons and layers. DNN Hardware Accelerators (DHAs) are leveraged to deploy DNNs in the target applications. Safety-critical applications, where hardware faults/errors would result in catastrophic consequences, also benefit from DHAs. Therefore, the reliability of DNNs is an essential subject of research. In recent years, several studies have been published accordingly to assess the reliability of DNNs. In this regard, various reliability assessment methods have been proposed on a variety of platforms and applications. Hence, there is a need to summarize the state-of-the-art to identify the gaps in the study of the reliability of DNNs. In this work, we conduct a Systematic Literature Review (SLR) on the reliability assessment methods of DNNs to collect relevant research works as much as possible, present a categorization of them, and address the open challenges. Through this SLR, three kinds of methods for reliability assessment of DNNs are identified, including Fault Injection (FI), Analytical, and Hybrid methods. Since the majority of works assess the DNN reliability by FI, we characterize different approaches and platforms of the FI method comprehensively. Moreover, Analytical and Hybrid methods are propounded. Thus, different reliability assessment methods for DNNs have been elaborated on their conducted DNN platforms and reliability evaluation metrics. Finally, we highlight the advantages and disadvantages of the identified methods and address the open challenges in the research area. We have concluded that Analytical and Hybrid methods are light-weight yet sufficiently accurate and have the potential to be extended in future research and to be utilized in establishing novel DNN reliability assessment frameworks.

Representative Real-Time Dataset Generation Based on Automated Fault Injection and HIL Simulation for ML-Assisted Validation of Automotive Software Systems

Recently, a data-driven approach has been widely used at various stages of the system development lifecycle thanks to its ability to extract knowledge from historical data. However, despite its superiority over other conventional approaches, e.g., approaches that are model-based and signal-based, the availability of representative datasets poses a major challenge. Therefore, for various engineering applications, new solutions to generate representative faulty data that reflect the real world operating conditions should be explored. In this study, a novel approach based on a hardware-in-the-loop (HIL) simulation and automated real-time fault injection (FI) method is proposed to generate, analyse and collect data samples in the presence of single and concurrent faults. The generated dataset is employed for the development of machine learning (ML)-assisted test strategies during the system verification and validation phases of the V-cycle development model. The developed framework can generate not only time series data but also a textual data including fault logs in an automated manner. As a case study, a high-fidelity simulation model of a gasoline engine system with a dynamic entire vehicle model is utilised to demonstrate the capabilities and benefits of the proposed framework. The results reveal the applicability of the proposed framework in simulating and capturing the system behaviour in the presence of faults occurring within the system’s components. Furthermore, the effectiveness of the proposed framework in analysing system behaviour and acquiring data during the validation phase of real-time systems under realistic operating conditions has been demonstrated.

TC-SEPM: Characterizing soft error resilience of CNNs on Tensor Cores from program and microarchitecture perspectives

As an architectural CNN accelerator integrated into NVIDIA’s GPUs, existing research mainly focuses on improving the performance of Tensor Cores. However, the highly integrated Tensor Cores are vulnerable to transient faults (i.e., soft errors), causing catastrophic consequences in safety-critical applications like automatic driving. Thus, it is imperative to estimate the reliability of CNNs on Tensor Cores. However, obtaining a statistically significant resilience profile of CNNs on Tensor Cores with the existing fault injection (FI)-based reliability estimation methods is expensive. To this end, we build TC-SEPM to predict the error resilience of CNNs on Tensor Cores instead of FI methods. To ensure the accuracy of TC-SEPM, we first investigate resilience-related features from program and microarchitecture perspectives. Then, leveraging these heuristic features, we train machine learning models to learn the hidden relationship between error resilience and the investigated features, enabling us to predict the impact of soft errors in Tensor Cores on CNN output. Experimental results show that TC-SEPM achieves high accuracy for individual soft error resiliency prediction and overall program resilience estimation while its overhead is only 1/27 of FI methods. Additionally, TC-SEPM can provide valuable insights for programmers or architects to design more robust CNN models on Tensor Cores.

Cooling Fan Failure Modes to Enable Development of Automotive ECU Fan Health Monitoring System

Electronic control units (ECUs) are widely used in the automotive industry. Recent efforts to enable enhanced and automated driving requires these ECUs to process and execute computationally expensive algorithms. With these developments, the ECUs now have a higher computing power and thus are at a greater risk of overheating. This may limit the availability of the essential functionalities in the vehicle. Currently, high operating temperatures are mitigated using passive cooling, which allows heat to dissipate without expelling any energy; however, more robust methods are required to enable this new technology. A cooling fan system is one of the desired methods for ECU thermal management, as this type of system draws cooler air from outside and expels the warm air from within. Therefore, the fan health status is critical to ensure ECU availability and reliability for vehicle operation, as when the fans become degraded, they cannot maintain the required airflow to minimize the ECU operating temperature. Traditionally, fan failures are detected by monitoring the fan speed versus the commanded duty cycle, thus it is desired to develop a robust health monitoring method for the fans. Fan failure mode study and fault injection can be used to enable the development of prognostics. Investigating the fan failure modes results in two main categories, which are internal and external. External fan failures include degradation and cracking of the outer casing, while internal failures include motor and ball bearing issues. Fault injection methods were developed based on these failure modes while considering potential operating conditions. For example, the fans were exposed to multiple environmental conditions, such as dust, humidity, and heat. These conditions can potentially trigger both internal and external failures. The data collection was conducted with the fans running in a standalone setup, being controlled by external equipment to ensure that the electronic input values were known. After running tests for 30 days, sufficient data was collected to enable degradation modelling. The data will contribute to the development of a predictive algorithm which will estimate the state of health of the fan based on its performance over time. This paper will discuss the failure modes and the data generated through simulation and fault injection.

A Novel Simulation Approach for Fault Injection Mechanism Assessing Dependability of Cybersecurity Attacks

Clock attacks and power attacks are used as common means to inject faults in embedded devices. Critical analysis of the properties and the components engaged with these fault injection methods is of high importance to assess the related dangers and furthermore to enhance the process of designing suitable counter-measures. This paper provides critical analysis of induced faults on combinational and sequential circuits and study effects of various attacks (over-clock, under clock, power attack). While doing analysis, it was revealed that clock attacks i.e., under and over clock attacks have similarity index of (80–90%). Also it was found that power attacks have results similar (60–70%) to clock attacks but they cause propagation delay in circuits affecting the output. Cadence virtuoso 45 nm technology node, Keil and Multi-sim software’s were used to generate various attacks. The comparative analysis reveals that the attack timing and frequency of the glitch is the key while inducing fault injection attacks. While performing this work, it is observed the sequential circuits get less impacted by attacks comparing to combinational circuits. This research is conducted from an attacker’s perspective instead of mitigation perspective.

A Fast Simulation Method for Evaluating the Single-Event Effect in Aerospace Integrated Circuits.

With the continuous progress in integrated circuit technology, single-event effect (SEE) has become a key factor affecting the reliability of aerospace integrated circuits. Simulating fault injection using the computer simulation technique effectively reflects the SEE in aerospace integrated circuits. Due to various masking effects, only a small number of faults will result in errors; the traditional method of injecting one fault in one workload execution is inefficient. The method of injecting multiple faults in one workload execution will make it impossible to judge which fault results in errors because the propagation characteristic of SEE and faults may affect each other. This paper proposes an improved multi-point fault injection method to improve simulation efficiency and solve the problems of the general multi-point fault injection method. If one workload execution does not result in errors, multiple faults can be verified by one workload execution. If one workload execution results in errors, a specific grouping method can be used to determine which faults result in errors. The experimental results show that the proposed method achieves a good acceleration effect and significantly improves the simulation efficiency.

협동 로봇 모션 결함 데이터셋 구축을 위한 비전 기반 위치 편차 모의 결함 주입 방법

협동 로봇 모션 결함 데이터셋 구축을 위한 비전 기반 위치 편차 모의 결함 주입 방법

A Novel Approach of a Low-Cost Voltage Fault Injection Method for Resource-Constrained IoT Devices: Design and Analysis.

The rapid development of the Internet of Things (IoT) has brought about the processing and storage of sensitive information on resource-constrained devices, which are susceptible to various hardware attacks. Fault injection attacks (FIAs) stand out as one of the most widespread. Particularly, voltage-based FIAs (V-FIAs) have gained popularity due to their non-invasive nature and high effectiveness in inducing faults by pushing the IoT hardware to its operational limits. Improving the security of devices and gaining a comprehensive understanding of their vulnerabilities is of utmost importance. In this study, we present a novel fault injection method and employ it to target an 8-bit AVR microcontroller. We identify the optimal attack parameters by analyzing the detected failures and their trends. A case study is conducted to validate the efficacy of this new method in a more realistic scenario, focusing on a simple authentication method using the determined optimal parameters. This analysis not only demonstrates the feasibility of the V-FIA but also elucidates the primary characteristics of the resulting failures and their propagation in resource-constrained devices. Additionally, we devise a hardware/software countermeasure that can be integrated into any resource-constrained device to thwart such attacks in IoT scenarios.

Efficient Noninvasive Fault Injection Method Utilizing Intentional Electromagnetic Interference

In the fault injection method, an electromagnetic (EM) wave is injected to temporarily cause a fault at a specific time of the encryption process, the faulty outputs are obtained from the cryptographic device, and the secret key is extracted by analyzing the faulty outputs. In the conventional method, the intentional electromagnetic interference (IEMI) wave is injected at a random time because it is difficult to obtain information on the start time of the encryption process. Thus, a cryptographic module must execute a large number of encryption trials before the occurrence of a fault that enables the secret key to be extracted. In this article, we propose a fault injection method that can generate the faults at a specific time with high probability, which is like the method of injecting an IEMI wave synchronized with the start time of the encryption process. The proposed method inserts glitches into the encryption process at fixed times by injecting a continuous sinusoidal wave of a specific frequency while controlling the amplitude and phase. This generates faults required for the secret key analysis method with a high probability even when the start time of the encryption process cannot be obtained. We experimentally demonstrate the impact of the aforementioned IEMI using the advanced encryption standard, which is an ISO/IEC 18033 block cipher, implemented as a module on a standard evaluation board. The conventional method requires more than 30 000 encryption processes to obtain the secret key. In contrast, the results indicate that we can obtain the secret key with approximately 22 encryption processes which is almost three orders of magnitude less than that with the conventional method. This confirms that secret keys can be extracted in a brief period of time. Moreover, devices previously excluded from IEMI-based fault injection because they can only be accessed for a brief period because their physical access was surveilled, may now be the target of the threat.

A model-based safety analysis approach for airborne systems using state traversals

Safety analysis is an important task in both the development and certification of civil aircraft. The traditional safety analysis is significantly dependent on the skills and experiences of analysts. A model-based safety analysis approach is proposed for airborne systems based on the model built with Simulink. This study builds Simulink models of typical failure modes as well as the fault injection methods. The responses of system performances are monitored by traversing all failure combinations based on a state space reduction method. The system will be in an unsafe condition when the responses exceed their thresholds. The minimal cut sets of the system are obtained automatically by recording the failure combinations leading to the unsafe condition. Finally, a lateral-directional flight control system is taken as a practical example to illustrate the application and effectiveness of our proposed method. The result shows that our method has higher accuracy and the causes of the unsafe conditions can be determined by the automatic generation of the minimal cut sets. Additionally, the cumbersome work of building a traditional safety analysis model such as the fault tree, the Markov model, or the dependence diagram can be avoided.

Logic Circuits Reliability Analysis using Signal Probability and Bayesian Network Concepts

Background: Reliability analysis of logic circuits has been widely investigated due to increasing fault occurrence in modern integrated circuits. Simulation-based and analytical methods are developed to estimate the reliability of logic circuits. Methods: In this paper, a signal probability-based method is presented to estimate the reliability of logic circuits. In the proposed approach, four signal probabilities (correct 0, correct 1, incorrect 0, and incorrect 1) are derived (for every node of the circuit) using a probabilistic transfer matrix (PTM), and the correlation coefficients (CCs) are deployed to resolve the reconvergent fanouts issues. The CCs are defined in a fanout cone and are propagated through the logic gates to the related reconvergent nodes. The Bayesian network concept is applied to achieve more accuracy in the propagation of CCs through the logic gates. Results: The accuracy and scalability of the proposed method are proved by various simulations on benchmark circuits (ISCAS 85, LGSynth91, and ITC99). The proposed method efficiently solves the reconvergent fanout problem. Moreover, the proposed method outperforms the previous methods regarding accuracy and scalability. Conclusion: Simulation results on ISCAS 85, LGSynth91, and ITC99 benchmark circuits show less than 3% average error compared with the accurate simulation-based fault injection method.

DEVELOPMENT OF A FAULT INJECTION TOOL & DATASET FOR VERIFICATION OF CAMERA BASED PERCEPTION IN ROBOTIC SYSTEMS

Nowadays, camera-based perception is most popular topic in robotic systems. Verification of camera-based perception systems are crucial and difficult with current tools and methods. This study proposes Camera Fault Injection Tool (CamFITool), which enables different kind of fault injection methods to RGB and TOF cameras in order to perform verification and validation activities on robotic systems. Besides, Fault Injected Image Database which is created by CamFITool is introduced. In addition, the study guides to readers to create new datasets by injecting faults into existing image libraries or camera streams with CamFITool. As a result, CamFITool, an open-source fault injection tool, which is a critical tool for assessing of fault tolerant systems’ safety and security, is proposed. Also, a fault injected image dataset created by CamFITool for verification of camera-based perception studies in robotic systems is given.

Fault injection and diagnosis of the centrifugal fan

Centrifugal fan is widely used in industry, vehicle and ship application to provide air cycle power. To detect the fan fault at early stage, this paper explores the fault feature in the vibration signal and fault diagnosis method through the fault injection test, where impeller unbalance, rotor unbalance, and bearing fault are involved. Firstly, the fault mechanism is introduced; then, the fault injection methods of the three faults are introduced to obtain the faulty fans; finally, health and fault tests are performed, where the vibration sensors are employed and distributed on the fan in the axial and radial direction. Moreover, the acquired vibration data is analyzed by using time-domain and frequency-domain methods, and further the fault features between health and fault are compared and discussed. The analysis results indicate that the three faults can be detected through the vibration intensity and magnitude comparison at their individual characteristic frequencies in the spectrum.

Fault Injection Method and Ground-truth Development to Enable a Low-cost Bearing Fault Monitoring System in the Automotive Industry

Bearing condition monitoring is a widely studied field, but applications to the automotive industry have received little attention as the bearing failure rates are typically low in traditional internal combustion engine vehicles with 200 – 300k mile lifespans. The rapid advancement of electric and autonomous vehicles enables vehicles with million-mile lifespans. This implies that the reliable life of existing bearing designs is exceeded throughout the vehicle life, which can potentially lead to vehicle failure. To enable the development of a bearing fault detection and prognostics system, healthy and faulty bearing data must be collected, and the ground-truth states of the health of bearings need to be determined for algorithm refinement and validation. This work explores the fault injecting options, and ground-truthing together with their limitations. Two methods based on precision machining and seeded spalling are developed and used to inject inner race faults in a ball bearing. A non-invasive ground-truthing method is proposed to quantify the state of health of the fault injected bearings in which bench test data is collected under various speed and load conditions. The vibration signals from the bench tests are used to calculate the root-square of the area under the acceleration Power Spectral Density curve (known as GRMS) for each speed and load condition. To remove the dependency of the results on load and speed conditions, a speed-load-GRMS plot is generated, and a plane is fitted to the data for each fault level. Next, the volume under the plot is calculated, yielding a single cumulative GRMS value for each fault level. This value is used as the ground-truth health of bearing for each fault level. For the bearing with the faults injected using precision machining fault injection, the obtained ground-truth values are 1.56, 3.68, and 4.36 times larger than the same figure for the healthy bearing for the faults with the widths of 0.1 mm, 0.5 mm, and 2 mm, respectively. The observed correlation between the fault sizes and the calculated ground-truth values validates the proposed method which can provide a good separation among different health states of a bearing.

On the application of Two-Photon Absorption for Laser Fault Injection attacks

Laser Fault Injection (LFI) is considered to be the most powerful semiinvasive fault injection method for implementation attacks on security devices. In this work we discuss for the first time the application of the nonlinear Two-Photon Absorption (TPA) effect for the purpose of LFI. Though TPA is an established technique in other areas, e.g. fluorescence microscopy, so far it did not receive any attention in the field of physical attack methods on integrated circuits. We show that TPA has several superior properties over the regular linear LFI method. The TPA effect allows to work on non-thinned devices without increasing the induced energy and hence the stress on the device. In contrast to regular LFI, the nonlinearity of the TPA effect leads to increased precision due to the steeper descent in intensity and also a vertically restricted photoelectric effect. By practical experiments, we demonstrate the general applicability of the method for a specific device and that unlike a regular LFI setup, TPA-LFI is capable to inject faults without triggering a latch-up effect. In addition we discuss the possible implications of TPA-LFI on various sensor-based countermeasures.

Fault-Aware Adversary Attack Analyses and Enhancement for RRAM-Based Neuromorphic Accelerator

Neural networks have been widely deployed in sensor networks and IoT systems due to the advance in lightweight design and edge computing as well as emerging energy-efficient neuromorphic accelerators. However, adversary attack has raised a major threat against neural networks, which can be further enhanced by leveraging the natural hard faults in the neuromorphic accelerator that is based on resistive random access memory (RRAM). In this paper, we perform a comprehensive fault-aware attack analysis method for RRAM-based accelerators by considering five attack models based on a wide range of device- and circuit-level nonideal properties. The research on nonideal properties takes into account detailed hardware situations and provides a more accurate perspective on security. Compared to the existing adversary attack strategy that only leverages the natural fault, we propose an initiative attack based on two soft fault injection methods, which do not require a high-precision laboratory environment. In addition, an optimized fault-aware adversary algorithm is also proposed to enhance the attack effectiveness. The simulation results of an MNIST dataset on a classic convolutional neural network have shown that the proposed fault-aware adversary attack models and algorithms achieve a significant improvement in the attacking image classification.

A Novel ISO 26262-Compliant Test Bench to Assess the Diagnostic Coverage of Software Hardening Techniques against Digital Components Random Hardware Failures

This paper describes a novel approach to assess detection mechanisms and their diagnostic coverage, implemented using embedded software, designed to identify random hardware failures affecting digital components. In the literature, many proposals adopting fault injection methods are available, with most of them focusing on transient faults and not considering the functional safety standards requirements. This kind of proposal can benefit developers involved in the automotive market, where strict safety and cost requirements make the adoption of software-only strategies convenient. Hence, we have focused our efforts on compliance with the ISO 26262 automotive functional safety standard. The approach concerns permanent faults affecting microcontrollers and it provides a mapping between the failure mode described in part 11 of the Standard and the chosen fault models. We propose a test bench designed to inject permanent failures into an emulated microcontroller and determine which of them are detected by the embedded software. The main contribution of this paper is a novel fault injection manager integrated with the open-source software GCC, GDB, and QEMU. This test bench manages all the assessment phases, from fault generation to fault injection and the ISA emulation management, up to the classification of the simulation results.

Design and testing of systolic array multiplier using fault injecting schemes

Nowadays low power design circuits are major important for data transmission and processing the information among various system designs. One of the major multipliers used for synchronizing the data transmission is the systolic array multiplier, low power designs are mostly used for increasing the performance and reducing the hardware complexity. Among all the mathematical operations, multiplier plays a major role where it processes more information and with the high complexity of circuit in the existing irreversible design. We develop a systolic array multiplier using reversible gates for low power appliances, faults and coverage of the reversible logic are calculated in this paper. To improvise more, we introduced a reversible logic gate and tested the reversible systolic array multiplier using the fault injection method of built-in self-test block observer (BILBO) in which all corner cases are covered which shows 97% coverage compared with existing designs. Finally, Xilinx ISE 14.7 was used for synthesis and simulation results and compared parameters with existing designs which prove more efficiency.