Fast Wafer Level Reliability Monitoring Research Articles

Plasma process induced damage detection by fast wafer level reliability monitoring for automotive applications

Plasma process induced damage (PID) poses a device lifetime risk to all semiconductor products containing MOS gate dielectrics. This risk increases for smaller technology nodes. In this work we will present how to protect automotive products from PID. Products need to be made robust against PID by design checks with antenna rules determined in technology reliability qualifications. Additionally, damage that is invisible at zero hour, i.e. in parameter or product tests, needs to be detected by fast wafer level reliability (fWLR) monitoring on the fully produced wafer. The application and details of different stress types for charging cases are presented and discussed.

Fast wafer level reliability monitoring as a tool to achieve automotive quality for a wafer process

This work describes and discusses fast wafer level reliability (fWLR) Monitoring as a supporting procedure on productive wafers to achieve stringent quality requirements of automotive, medical and/or aviation applications. Examples are given for the various reliability topics: dielectrics, devices, metallisation, plasma charging with respect to required test structures, stress methods and data analysis. Application areas of fWLR are highlighted and limitations considered. Further aspects such as relevant reliability parameters, sampling strategies and out of control action plans are discussed.

Fast Wafer Level Reliability Monitoring: Quantification of Plasma-Induced Damage Detected on Productive Hardware

This paper describes the investigation of a Plasma-Induced Damage (PID) event in the metal stack of an 8-in 130-nm-high volume process line. The relevant PID stress and measurement sequence used during standard productive fast Wafer Level Reliability Monitoring, which had detected this event, is discussed, and it is shown to be very effective. Additionally, hot carrier stress was performed on MOS transistors with antenna structures connected to the gate electrode for the quantification of the effect of PID on MOS device characteristics. It is demonstrated that the complete investigation can be done on production wafers in a very short time and only on scribe line test structures, saving time and hardware cost for extra wafers.

An introduction to fast wafer level reliability monitoring for integrated circuit mass production

The continuous verification of process reliability is essential to semiconductor manufacturing. The tool that accomplishes this task in the required short time is the fast wafer level reliability monitoring (fWLR). The basic approaches for this task are described in this introductory overview. It summarizes sampling plans, discusses the feasibility of using fWLR for screening and describes the data assessment and application of control cards. Beyond these general topics many of the fWLR stress methods are described in detail: Dielectric stressing by means of an exponential current ramp is compared to ramped voltage stress. Especially for thin oxides the methods differ regarding the soft breakdown detection and the time they consume. Another task of fWLR is the detection of plasma induced damage, which can be achieved by applying a revealing stress to MOSFETs with antenna. The design challenges of the structures and the test method as well as the data assessment are described in detail. An important section deals with fWLR for interconnects. In this section the appropriate test structures (including thermal simulations) are illustrated and fast electromigration stresses are discussed and the details of standard wafer level electromigration accelerated test (SWEAT) are included. For contacts and vias a simple method to check reliability is presented. Finally the monitoring of device reliability is treated. It is shown that using indirect parameters that correlate well to standard parameters such as the drain current can be beneficial for fWLR. For both, the interconnects and the devices, it is essential to have locally heated test structures in order to keep the stress time low. The detection and verification of mobile ions can also be performed with such a self-heated structure. For the described methods examples are given to illustrate the usefulness.