Fast Switching Speed Research Articles

Design of Nanosecond Pulse Laser Diode Array Driver Circuit for LiDAR

The pulse laser emission circuit plays a crucial role as the emission unit of time-of-flight (TOF) LiDAR. This paper proposes a nanosecond-level pulse laser diode array drive circuit for LiDAR, primarily aimed at addressing the issue of high-speed scanning drive for the laser diode array at the emission end of solid-state LiDAR. Based on the single pulse laser diode drive circuit, this paper innovatively designs a circuit that includes modules such as a boost circuit, linear power supply, high-speed gate driver, GaN field-effect transistor, and pulse narrowing circuit, realizing an 8-channel laser diode array drive circuit. This circuit can achieve a pulse laser array drive with a single channel operating frequency of greater than 100 kHz, an output pulse width of less than 5 ns, a peak power greater than 75 W, and a channel switching time that does not exceed 1 μs. A field programmable gate array (FPGA) is used to control the operation of this circuit and perform a series of performance tests. Experimental results show that this circuit has a high repetition rate, large output power, a narrow pulse width, and fast switching speeds, making it highly suitable for use in the optical emission module of solid-state LiDAR.

High-speed Ta2O5-based threshold switching memristor for LIF neurons

Due to their high similarity to biological ion channels, low power consumption, small footprint, and the fact that they do not require reset circuits, threshold switching memristors have been intensively studied for simulating neurons in neuromorphic chips. Switching speed is one of the key challenges which limit the application of threshold switching memristors in chips. In this study, Ta2O5 threshold switching memristors with high switching speeds were prepared by doping with silver. The results show that 14 wt. % Ag doped Ta2O5 threshold switching memristors exhibit excellent bi-directional threshold switching performance, featuring fast switching speeds (<20 ns, <18 ns), low leakage currents (<10 pA), and high switching ratio (>107). According to the field nucleation theory, the rapid switching speed can be attributed to the low nucleation energy (0.26 eV) of silver within the Ta2O5 matrix, which is achieved by incorporating 14 wt. % Ag during the doping process. Based on Pspice, a LIF (leaky integrate-and-fire) neuron based on the silver nanoparticles doped Ta2O5 threshold switching memristors is built, and its firing function has been simulated. The results show that the LIF neuron with a short switching time is able to excite pulse spiking with high frequencies. These results demonstrated that the silver nanoparticles doped Ta2O5-based threshold switching memristors hold significant potential for constructing high-speed artificial neural networks.

Alkali-Stable Metal-Organic Frameworks with Enhanced Electroconductivity for Black-Brown Electrochromic Energy Storage Smart Window.

Metal-organic frameworks (MOFs) deliver potential applications in electrochromism and energy storage. However, the poor intrinsic conductivity of MOFs in electrolytes seriously hampers the development of the above-mentioned electrochemical applications, especially in one MOF electrode. Herein, a new Ni-based MOF (denoted Ni-DPNDI) is proposed with enhanced conductivity by π-delocalized DPNDI connectors. Predictably, the obtained Ni-DPNDI MOF achieves a conductivity of up to 4.63 S∙m-1 at 300 K. Profiting from its unique electronic structure, the Ni-DPNDI MOF delivers excellent electrochromic and energy storage performance with a great optical modulation (60.8%), a fast switching speed (tc = 7.9 s and tb = 6.4 s), a moderate specific capacitance (25.3 mAh·g-1) and good cycle stability over 2000 times. Meanwhile, energy storage capacity is visual by the coloration states of Ni-DPNDI film. As a proof of the potential application, a large-area (100 cm2) electrochromic energy storage smart window is further designed and displayed. The strategy provides an interesting alternative to porous multifunctional materials for the new generation of electronic devices with diverse applications.

Design and Implementation of a Ka-Band Frequency Source Based on DS+DDS Hybrid Method

Abstract This article proposes a design scheme for a broadband agile frequency conversion Ka-band frequency source, which adopts a mixed frequency synthesis method of DS+DDS. This method combines the advantages of DDS such as fast frequency switching speed, small frequency step, and wide DS frequency bandwidth, and uses segmented filtering to effectively suppress the disadvantage of DDS spurious error. DS adopts an up conversion and double frequency doubling scheme to broaden the frequency band, with simple design and low cost. The deterioration of phase noise is offset by selecting a low phase noise PLL. Actual measurement shows that the output bandwidth of the frequency source is 8GHz, with spurious suppression ≤ −61dBc, frequency switching time ≤ 140ns, output power ≥ 15dBm, step frequency of 1MHz, and phase noise ≤ −100dBc/Hz@1kHz, meet the design requirements.

Quantum Dots for Resistive Switching Memory and Artificial Synapse.

Memristor devices for resistive-switching memory and artificial synapses have emerged as promising solutions for overcoming the technological challenges associated with the von Neumann bottleneck. Recently, due to their unique optoelectronic properties, solution processability, fast switching speeds, and low operating voltages, quantum dots (QDs) have drawn substantial research attention as candidate materials for memristors and artificial synapses. This review covers recent advancements in QD-based resistive random-access memory (RRAM) for resistive memory devices and artificial synapses. Following a brief introduction to QDs, the fundamental principles of the switching mechanism in RRAM are introduced. Then, the RRAM materials, synthesis techniques, and device performance are summarized for a relative comparison of RRAM materials. Finally, we introduce QD-based RRAM and discuss the challenges associated with its implementation in memristors and artificial synapses.

Core-shell architecture and channel suppression: unleashing the potential of SC_RCS_DGJLFET

In this investigation, a suppressed channel-rectangular core–shell double gate junctionless field effect transistor (SC_RCS_DGJLFET) is simulated to enhance the junctionless device’s performance. This study leverages a core–shell architecture and channel suppression technique to improve the gate controllability over the channel region which helps in substantial depletion of the shells in the OFF state of the device. When compared to conventional double gate JLFETs (C_DGJLFET) and rectangular core–shell double gate JLFETs (RCS_DGJLFET), the performance of the SC_RCS_DGJLFET is superior in terms of IOFF, ION/IOFF ratio, DIBL and subthreshold slope (SS). The SC_RCS_DGJLFET achieves an ultra-low IOFF of 7.033 × 10−16 A, indicating a low leakage current with an impressive ION/IOFF = 5.092 × 1011 . Other performance parameters such as subthreshold slope and DIBL has also been improved for the SC_RCS_DGJLFET device. Subthreshold slope has been decresesd by 4.76% whereas the DIBL decreased by 33.82% when compared to existing RCS_DGJLFET. Additionally, to analyze the effect of doping on the device performance, the core doping in SC_RCS_DGJLFET is varied for fixed shell doping. The study found that fixing core doping to an appropriate value is a crucial parameter to achieve good device performance. The impact of variation of oxide extension towards the source and drain LextS/LextD in SC_RCS_DGJLFET is also studied for the first time in the core–shell architecture which has further improved the device’s performance. Finally, a CMOS inverter is designed using the proposed device that provides valuable insights into its suitability for digital circuit applications and verifies its performance benefits compared to existing transistor technologies. The SC_RCS_DGJLFET based CMOS inverter shows a sharp transition in voltage transfer characteristics (VTC), indicating fast switching speed and precise signal processing capabilities when compared to a CMOS inverter based on a conventional double gate junctionless field effect transistor (C_DGJLFET). Moreover, the transient characteristics of the SC_RCS_DGJLFET based CMOS inverter exhibit an improved output voltage swing, suggesting enhanced dynamic behaviour and stability during logic state transitions.

A Voltage Equalization Strategy for Series-Connected SiC MOSFET Applications

A novel clamped voltage equalization strategy is presented for series-connected Silicon Carbide (SiC) Metal–Oxide semiconductor Field-Effect transistors (MOSFETs) in this paper. Differences in device parameters and circuit asymmetry result in the uneven voltage distribution of series-connected SiC MOSFETs, which threatens the safe operation of the circuit. Dynamic voltage equalization is difficult to achieve due to the fast switching speed of SiC MOSFETs. This paper analyzes the switching characteristics and dynamic voltage equalization characteristics of SiC MOSFETs. Based on the analysis, an energy recovery strategy based on the clamping auxiliary circuit is proposed. A 2.8 kW (50 KHz) prototype is fabricated and tested to verify the strategy. Measurement results show that the maximum voltage stress is suppressed from 600 V to less than 320 V in the experimental condition.

Reconfigurable aJ-Level Ferroelectric Transistor-Based Boolean Logic for Logic-in-Memory.

Logic-in-memory (LIM) architecture holds great potential to break the von Neumann bottleneck. Despite the extensive research on novel devices, challenges persist in developing suitable engineering building blocks for such designs. Herein, we propose a reconfigurable strategy for efficient implementation of Boolean logics based on a hafnium oxide-based ferroelectric field effect transistor (HfO2-based FeFET). The logic results are stored within the device itself (in situ) during the computation process, featuring the key characteristics of LIM. The fast switching speed and low power consumption of a HfO2-based FeFET enable the execution of Boolean logics with an ultralow energy of lower than 8 attojoule (aJ). This represents a significant milestone in achieving aJ-level computing energy consumption. Furthermore, the system demonstrates exceptional reliability with computing endurance exceeding 108 cycles and retention properties exceeding 1000 s. These results highlight the remarkable potential of a FeFET for the realization of high performance beyond the von Neumann LIM computing architectures.

Impact of titanium modification on the performance improvement and phase change mechanism of ZnSb thin film

Phase change memory has emerged as a promising option for neuro-inspired and data-intensive AI applications, attracting significant attention from the semiconductor field recently. The performance of the device relies on the phase change material, aiming for enhanced thermal stability along with low power consumption. Nanocomposite ZnSb thin films with titanium dopant were prepared and their crystallization properties and mechanisms were investigated. Compared to pure ZnSb material, the addition of titanium can significantly enhance the temperature of crystallization and the 10-year data retention ability, both of which surpassing 16 °C. The obvious enhancement in thermal stability may be ascribed to the ionic bond formation between titanium and antimony elements, as indicated by differential charge calculations. Also, phase change memory cells with a diameter of 190 nm were fabricated using standard CMOS technology. The Ti-doped ZnSb thin film demonstrates rapid crystallization and amorphization within 50 ns while consuming low power at approximately 1.5 × 10−10 J. The decrease in power consumption may stem from the increase in band gap energy and a decrease in electrical conductivity, as confirmed by first-principles calculations. Both experimental and theoretical results prove that titanium doping can remarkably improve the physical properties of ZnSb thin film, facilitating the exploration and design of novel phase change materials with high thermal stability, low power consumption, as well as fast switching speed.

An efficient nano-design of image processor circuits for morphology operations based on quantum dots

Quantum-dot cellular automata (QCA) are one of the most promising alternatives to traditional VLSI technology despite significant current obstacles. The QCA has the advantages of very low power dissipation, faster switching speed, and extremely low circuit area, which can be used in designing nano-scale image processing circuits. Morphological operations and processing of digital image processing is a significant topic for researchers because it is widely used for analyzing, enhancing, and modifying images to extract meaningful information or improve their visual quality. Image processing is also used for image retrieval and enhancement, image compression, object recognition, machine vision, and medical applications. QCA technology, as a new and leading technology with great potential, can play a fundamental role in morphological operations, processing digital images, image editing, medical imaging, facial recognition, and autonomous vehicles. In recent years, researchers in this field have presented many circuits, but they have many flaws in terms of speed, accuracy, and area consumption, and the need to create more efficient circuits is felt more than ever. Therefore, in this article, a new design for morphological operations and processing digital images is presented using QCA technology. This paper presents a new efficient QCA-based implementation of image processing based on the direct interactions between the QCA cells. This circuit uses two majority gates of five new inputs to produce the output and produces the desired output. In addition, a comparison and analysis of the area and clocking complexity, design cost, and energy dissipation through simulation using QCADesigner and QCADesigner-E are done. The results show that the presented circuit produces the expected and correct output results in 0.75 clock phases, and the obtained results show the high speed and low consumption space of the presented circuit. In addition, the presented circuit performs better than the previous best circuits in terms of quantum cost and delay, and according to the mentioned advantages, it can be used to improve and expand other circuits in image processing.

Visible and near-infrared modulating tungsten suboxide nanorods electrochromic films in acidic aqueous electrolytes

Proton-based aqueous electrolytes can be used to achieve high performance electrochromic nanocrystal thin films due to their small ion size. However, acidic aqueous electrolyte systems have not yet been explored in near-infrared (NIR) absorbing plasmonic tungsten oxide nanocrystal films. Here, we demonstrate tungsten suboxide nanorod films with excellent visible and NIR modulation performance in the H+-based aqueous electrolytes, thanks to their mesoporous structure, nanosized domains, and open tunnel structure. Colloidally synthesized WO2.83 nanorods with an average width of 6 nm and length of 48 nm were converted to WO2.90 nanorod film via annealing in air, while still preserving open tunnels. These films exhibit fast switching speed (tc = 0.9 s, tb = 2.1 s), excellent cycling stability over 2500 cycles, wide optical modulation up to ΔT = 53.8 % in the NIR region, and a high coloration efficiency (CE) of 167 cm2 C⁻1 at 1300 nm. Additionally, introducing a thin spacer (25 μm) reduced intrinsic NIR absorption from water, thereby enhancing the NIR modulation properties. These highly performing aqueous proton-electrolytes-based electrochromic devices open new possibilities for implementing visible and NIR electrochromism.

(Invited) The Evolving SiC Market and Impact on CMP Supply Chain

Silicon carbide (SiC) is a wide bandgap semiconductor with physical and electrical properties that provide superior performance in high-voltage or high-power applications. Compared to the more established silicon devices, SiC provides better thermal conductivity, ~10x higher breakdown voltage, faster switching speeds and lower resistivity. Even with the performance advantages, the adoption rate of SiC is slowed by high cost and the inherent difficulty of processing this material. SiC is extremely hard (just below diamond on the hardness scale) and chemically inert which makes processing boules into wafers rather difficult. This presentation will contrast some of the basic differences between process methods developed for silicon and other semiconductor materials versus those required for SiC.Demand for high-quality single crystal SiC substrates continues to rise as the worldwide demand for electric vehicles, charging infrastructure, green energy production, and more efficient power devices in general requires more and more SiC devices. SiC wafer manufacturers are trying to ramp output as quickly as possible but technical difficulties of processing SiC are often a limiting factor. In spite of aggressive capital spending by many of the major players, the actual growth in substrate production has been constrained to around 15% CAGR even though demand would support a much faster ramp. As end use markets continue to evolve, ripple effects are also evident in the underlying supply chains, such as CMP pads and slurries.

Optimization Method of SiC MOSFET Switching Trajectory Based on Variable Current Drive

Silicon carbide (SiC) MOSFETs exhibit superior performance compared to traditional silicon (Si) MOSFETs, characterized by faster switching speeds, lower on-resistance, higher breakdown voltage, and greater operational temperature tolerance. These attributes make SiC MOSFETs highly suitable for applications in electric vehicles, charging stations, and mobile devices. However, their rapid switching speed can intensify current and voltage overshoot and oscillations during device switching, leading to increased device losses or potential damage. To address this issue, this paper proposes a current-type active gate drive (AGD) circuit. The circuit first detects the rate of change in the drain current and drain-source voltage. Subsequently, it employs an analog amplifier circuit and adjustable drive resistors to decelerate the rate of change in the drain-source voltage and drain current. As a result, overshoot and oscillation in the drain-source voltage and drain current are mitigated. Experimental results demonstrate that the proposed AGD circuit can reduce drain current overshoot by 60%, drain-source voltage overshoot by 15.38%, and waveform oscillations. Additionally, the AGD circuit decreases conduction and turn-off losses by 24% and effectively mitigates electromagnetic interference (EMI) issues within the frequency range of 0.1 to 3 MHz.

Design and Implementation of a 2-input Arithmetic and Logic Unit using Quantum-dot Cellular Automata

Quantum-Dot-Cellular Automata (QCA), an emerging nanotechnology rooted in Coulomb repulsion, holds the ability to supplant orthodox complementary metal-oxide semiconductor (CMOS) technology. Its distinctive advantages lie in ultra-low power consumption, fast switching speed, and high-density structures. This study conducts an extensive literature review to introduce an Arithmetic and Logic Unit (ALU) based on QCA principles. The proposed QCA-based ALU incorporates fundamental logic gates, adders, and subtractors, leveraging the latest XOR gate. Utilizing simulation via QCA Designer 2.0.3, an in-depth performance evaluation of the model is conducted, comparing it with established ALUs based on metrics encompassing cell count, delay, and area. The findings showcase the efficiency of the proposed ALU, characterized by its minimal requirement of 277 cells, an area occupancy of 0.43 µm², and a delay of 2.75 clock cycles. This outcome highlights the favorable attributes of our design compared to existing alternatives, suggesting its potential contribution to the advancement of QCA-based digital circuitry. DUJASE Vol. 8 (1) 26-31, 2023 (January)

Onset and microscopic origin of resistive random-access memory characteristics on low-cost thermally treated mixed phase CuxO (x = 1,2) on Cu sheet

We demonstrated the resistive random-access memory (RRAM) characteristics in cost-efficient, single-step, and in-situ grown nanostructured mixed-phase CuxO (x = 1, 2) thin films, on a commercially available Cu sheet, fabricated using thermal treatment under ambient conditions. The scanning electron microscopy (SEM) and atomic force microscopy (AFM) measurements explain the surface morphology of grown mixed-phase CuxO thin film with substrate imprints. Fourier-transform Infrared spectroscopy confirmed the mixed phase of Cu2O and CuO of synthesized thin films. The fabricated Al/CuxO/Cu RRAM device showed bipolar digital resistive switching followed by analog resistive switching. The device showed a fast-switching speed of 250 ms, high endurance durability for 2500 cycles, and better retention of 103 s, respectively. The interconnected CuxO with Cu sheet provides efficient charge carrier migration from the bottom electrode to the active layer. The formed defect and trapped site are responsible for the resistive switching behavior. Thus, the present study provides a way to harness the potential of RRAM on either thermally treated Cu sheets or realizing a Cu thin film followed by low-temperature annealing, which can easily be integrated into existing electronic devices for data storage applications.

Engineering of TiN/ZnO/SnO2/ZnO/Pt multilayer memristor with advanced electronic synapses and analog switching for neuromorphic computing

The two-terminal memristor is a promising neuromorphic artificial electronic device, mirroring biological synapses in structure and replicating various synaptic functions. Despite its advantages, challenges in achieving high reliability, gradual switching, and low energy consumption hinder progress in neuromorphic devices. This study explores electronic synapses and simulates analog switching in a Pt/TiN/ZnO/SnO2/ZnO/Pt multilayer (ML) configuration, featuring a ∼3 nm SnO2 layer between ZnO layers. Results show enhanced cycling endurance (more than 250 cycles), resistance window (102), tunable synaptic plasticity, and multilevel switching. ML memristors exhibit low coefficient of variation (4.5 %) in set voltage, low energy consumption (set = ∼0.12 nj, reset = ∼0.1 nj), and fast switching speeds (set = 300 ns, reset = 200 ns), suitable for high-density memory and neuromorphic systems. They successfully emulate synaptic functions, including paired-pulse facilitation (PPF), spike voltage-dependent plasticity (SVDP), spike width-dependent plasticity (SWDP), spike frequency-dependent plasticity (SFDP), and post-tetanic potentiation (PTP). Modulating pulse amplitude and width achieves multilevel conductance in long-term potentiation (LTP) and long-term depression (LTD). Using nonlinear conductance data, a 96.5 % image pattern recognition accuracy is achieved in a deconvolution neural network (DNN) simulation. These results highlight the ML memristor's potential in efficient neuromorphic computing systems.

Attojoule Hexagonal Boron Nitride-Based Memristor for High-Performance Neuromorphic Computing.

In next-generation neuromorphic computing applications, the primary challenge lies in achieving energy-efficient and reliable memristors while minimizing their energy consumption to a level comparable to that of biological synapses. In this work, hexagonal boron nitride (h-BN)-based metal-insulator-semiconductor (MIS) memristors operating is presented at the attojoule-level tailored for high-performance artificial neural networks. The memristors benefit from a wafer-scale uniform h-BN resistive switching medium grown directly on a highly doped Si wafer using metal-organic chemical vapor deposition (MOCVD), resulting in outstanding reliability and low variability. Notably, the h-BN-based memristors exhibit exceptionally low energy consumption of attojoule levels, coupled with fast switching speed. The switching mechanisms are systematically substantiated by electrical and nano-structural analysis, confirming that the h-BN layer facilitates the resistive switching with extremely low high resistance states (HRS) and the native SiOx on Si contributes to suppressing excessive current, enabling attojoule-level energy consumption. Furthermore, the formation of atomic-scale conductive filaments leads to remarkably fast response times within the nanosecond range, and allows for the attainment of multi-resistance states, making these memristors well-suited for next-generation neuromorphic applications. The h-BN-based MIS memristors hold the potential to revolutionize energy consumption limitations in neuromorphic devices, bridging the gap between artificial and biological synapses.

Structural optimization of ion storage layer for highly stable electrochromic devices based on polythiophene derivative films

Due to their rich color, fast switching speed and high coloration efficiency, polymer-based electrochromic devices (ECDs) have broad application prospects in various fields such as smart windows, anti-glare rearview mirrors, displays and adaptive camouflage. However, the preparation of highly stable polymer-based ECDs is still a great challenge. Herein, we present a simple and efficient strategy to construct the poly (3,4-ethylenedioxythiophene) (PEDOT)-multi-walled carbon nanotubes (MWCNTs) composite film or PEDOT/MWCNTs bilayer film, which serves as ion storage layer. The ECDs are assembled with poly (3-hexylthiophene) (P3HT) as EC layer due to its good EC behavior. The P3HT film was prepared by potentiostatic deposition, and the PEDOT, PEDOT-MWCNTs and PEDOT/MWCNTs films were obtained by spray-coating technology. We investigated the structure, morphology and electrochemical performance of P3HT, PEDOT, PEDOT-MWCNTs and PEDOT/MWCNTs films, and EC properties of devices. The results indicate that the rough and porous P3HT film consists of many nanoparticles. Compared with PEDOT-MWCNTs composite film, the PEDOT/MWCNTs film is more loose and porous, where PEDOT nanoparticles and some PEDOT nanosheets are coated on a three-dimensional skeleton film of MWCNTs. These films possess good electrochemical performance. The ECD based on P3HT and PEDOT/MWCNTs films achieves an optical contrast of 38 % and coloration efficiency of 375 cm2/C, exhibiting good cyclic stability (retaining 92 % of initial optical contrast after 2000 cycles). Its coloration time and bleaching time are 0.60 and 1.83 s, respectively. This study suggests that structural optimization of ion storage layer might be a facile strategy for fabricating highly stable polymer-based ECDs.

Reduction of write current with improved thermal stability in GeSe2 doped Sb2Te3 films for phase change memory applications

Chalcogenide alloy-based semiconductors have gained significant attention in recent decades due to its applications in phase change memory (PCM). Sb2Te3 has proven to be an alternative to Static and Dynamic Random Access Memory and can be a suitable candidate for commercial memory devices due to their fast switching speed. However, Sb2Te3 suffers from low amorphous phase stability and high RESET current, which needs further improvement for high power efficiency. In this work, we have prepared (Sb2Te3)1−x (GeSe2) x (x = 0.06, 0.12, 0.18, 0.24, 0.3) films to investigate their PCM properties. The films showed a rise in transition temperature to transform from high resistive amorphous (RESET) to low resistive crystalline (SET) states with doping that leads to significant enhancement in amorphous phase stability. For 30% doping of GeSe2 in Sb2Te3, the data retention temperature increases from 20.2 °C to 84.6 °C, and the resistance contrast also increases from 102 to 105. The rise in electrical resistance with doping in the amorphous as well as crystalline states leads to a drop in threshold current (I th) from 3.5 to 0.8 mA. This also reduces the RESET and SET currents. By analyzing the samples using finite element method, it was found out that the high resistance materials produce more heat, resulting in a lower write current in an energy efficient PCM device.

Investigation of thermal stability improvement in Nb doped Sb2Te3

The phase change material Sb2Te3 (ST) exhibits a fast-switching speed and poor thermal stability because the four-fold rings are dominant and homo-polar bonds are absent in the amorphous state. Many studies have been performed on the improvement of phase change properties. Chemical doping methods have been widely used because additional chemical bonds are formed between the doped element and host atoms, leading to the modification of the local structure and electronic band structure. Previous reports have indicated the importance of the bond length and lattice mismatch in element doped ST. In this study, the electronegativity of the doped elements was investigated because it determines the strength of the bond via charge transfer between two atoms. A strong correlation between the electronegativity of the doped element and the phase change properties of the doped ST was observed. An ideal electronegativity range, which corresponds to some elements doped ST with excellent thermal stability, was found in this investigation. Nb atoms were selected as the optimal dopant to stabilize the amorphous phase of ST because Nb was in the ideal range. Additional homo-polar bonds and Nb-Te bonds can stabilize the amorphous phase because additional energy is required for ring reconstruction during crystallization. Consequently, the thermal stability and resistance difference of the Nb doped ST were significantly improved. In addition, the phase change speed of ST was not affected by Nb doping. This study highlights a new approach for pursuing better properties of phase change materials by chemical doping methods.