Equivalent Leakage Inductance Research Articles

High Efficiency Integrated Transformer Design in DAB Converters for Solid-State Transformers

Solid-state transformers (SST) are emerging technologies to replace the conventional low-frequency main transformer (MTR) in railway vehicles. In order to isolate the load side from the AC 25 kV high-voltage (HV) side and to reduce the whole size of the SST, HV insulation and high-frequency transformers should be used in DC/DC converters. Furthermore, due to the severe constraint of installation space and difficulty of heat dissipation management in the bottom of railway vehicles, high-power density and minimum transformer loss should be considered. To satisfy such design requirements of the proposed SST for railway vehicles, high efficiency integrated transformers, which inherently have leakage inductance, are proposed for dual-active-bridge (DAB) converters in this paper. In order to obtain appropriate equivalent leakage inductance for the DAB converters, a calculation methodology for the leakage inductance has been introduced and verified by simulation. Two separated winding structures in the center-core are adopted to improve the core loss, and appropriate winding turns with 60 kV HV insulation capability are selected, according to the proposed design procedure of the integrated transformers. In order to compare the proposed transformers with the conventional transformer having additional inductors and to verify the major characteristics of the transformers, two 125 kW proposed transformers and conventional transformers have been built and evaluated by an 250 kW SST module, operating at 10 kHz switching frequency. Under a 125 kW full-load condition, 99.7% transformer efficiency was obtained by the proposed integrated transformers, which are 4.7% smaller and 7.0% lighter than the conventional transformer. As a result, 26°C maximum temperature improvement has been obtained and 60k V HV insulation capability has been satisfied by the proposed integrated transformers.

Hybrid SPS Control for ISOP Dual-Active-Bridge Converter Based on Modulated Coupled Inductor With Full Load Range ZVS and RMS Current Optimization in DC Transformer Applications

The Input-serial-output-parallel (ISOP) dual-active-bridge (DAB) converter is an attractive solution to be used as a DC transformer (DCT) in the DC power distribution system. However, due to zero-voltage-switching (ZVS) limitation and large circulating current, the efficiency of the converter will be reduced. To improve the efficiency, an ISOP DAB converter based on a modulated coupled inductor, and a corresponding hybrid SPS control are proposed in this paper. With the hybrid SPS control strategy, the equivalent leakage inductance of modulated coupled inductor can be controllable. The large inductance is adopted at light load and the small inductance for the transformer is applied at heavy load to reduce circulating current and extend the ZVS range. By optimizing the root-mean-square (RMS) current of two operation modes of the converter, a control boundary of the hybrid SPS control can be obtained to modulate the coupled inductor. Meanwhile, the additional magnetizing inductance is utilized to achieve ZVS for all switches. The analysis based on the RMS current optimization and ZVS condition is given. Based on the conditions of the full load range ZVS and small RMS current, the parameters of the modulated coupled inductor, the turn ratio of the transformer, and magnetizing inductance are designed. Finally, a 250kHz, 800/400V, 2000W ISOP DAB prototype is built to verify the effectiveness of the proposed method. Meanwhile, a comparison experiment with the conventional individual leakage inductors solution is given, which shows performance improvements of the proposed solution.

High step‐up DC–DC converter based on coupled‐inductor for renewable energy systems

The present study introduced a novel soft-switched high step-up DC–DC converter based on coupled inductors. The higher boost-factor is achieved relying on previous topologies by adjusting the turns ratio of the coupled inductors. Thus, the proposed converter provides a higher voltage gain with lower duty ratios. Two active clamp circuits are employed to clamp the voltage spikes resulted from parasitic inductances. This active clamp circuit provides zero-voltage switching turn-on operations and zero-current switching turn on/off operations for active switches and power diodes, respectively. In addition, the equivalent leakage inductance of the coupled inductors is placed in series with the power diodes, which significantly alleviates the reverse-recovery problem of diodes. The other features of the proposed topology include fewer components, low cost, small input current ripple, and the low voltage stress on power switches. Low voltage stress allows choosing a lower voltage rating metal–oxide–semiconductor field-effect transistor, which directly reduces the cost. The experimental results evaluated the performance of the proposed topology. For this purpose, a 48 V/380 V/500 W laboratory prototype was built and tested, and the results confirmed the performance of the presented converter.

Novel protection scheme against turn-to-turn fault of magnetically controlled shunt reactor based on equivalent leakage inductance

Magnetically controlled shunt reactors (MCSRs) are key elements of extra-high voltage/ultra-high voltage (EHV/UHV) transmission systems for reactive power compensation and overvoltage suppression. Owing to the special core structure and winding connection mode, there is a complex electromagnetic relationship between faulty and non-faulty windings, which makes it challenging to accurately identify a turn-to-turn fault, which is the most common type of MCSR fault. To overcome this problem, a novel protection scheme is proposed by combining a start-up criterion with a fault discrimination criterion. The start-up criterion is based on the fundamental component of the total control current (itc) and the fault discrimination criterion is based on the identification of the equivalent leakage inductance (ELI). Firstly, based on the equivalent circuit of the power, control, and compensation windings, the corresponding ELI identification model is derived and solved using the recursive least squares (RLS) method. Subsequently, a fault discrimination scheme is derived based on the difference among three-phase ELIs. Finally, the proposed protection scheme is verified through simulations in MATLAB/Simulink and experiments on a physical model. The proposed scheme overcomes the limited sensitivity and reliability of conventional protection methods and can locate faulty windings, which is of great significance for the promotion of MCSRs and their applications in engineering.

Imbalance Current Analysis and Its Suppression Methodology for Parallel SiC MOSFETs with Aid of a Differential Mode Choke

Parallel connection of silicon carbide (SiC) MOSFETs is a cost-effective solution for high-capacity power converters. However, transient imbalance current, during turn- on and - off processes, challenges the safety and stability of parallel SiC MOSFETs. In this paper, considering the impact factors of device parameters, circuit parasitics, and junction temperatures, in-depth mathematical models are created to reveal the electrothermal mechanisms of the imbalance current. Moreover, with the incorporation of a differential mode choke (DMC), an effective approach is proposed to suppress the imbalance current among parallel SiC MOSFETs. Physics concepts, operation principles, and design guidelines of the DMC-based suppression method are fully presented. Besides, to reduce the equivalent leakage inductance and equivalent parallel capacitance of the DMC, winding patterns of the DMC are comparatively studied and optimized to suppress turn- off over-voltage and switching ringing. Concerning the influence of winding patterns, load currents, gate resistances, and junction temperatures, experimental results are comprehensively demonstrated to confirm the validity of theoretical models and the function of the proposed DMC-based suppression method. It is turned out the low-cost DMC is easy to design and utilize without complex feedback circuits or control schemes, which is a cost-effective component to guarantee consistent and synchronous on–off trajectories of parallel SiC MOSFETs.

Suppression Research Regarding Low-Frequency Oscillation in the Vehicle-Grid Coupling System Using Model-Based Predictive Current Control

Recently, low-frequency oscillation (LFO) has occurred many times in high-speed railways and has led to traction blockades. Some of the literature has found that the stability of the vehicle-grid coupling system could be improved by optimizing the control strategy of the traction line-side converter (LSC) to some extent. In this paper, a model-based predictive current control (MBPCC) approach based on continuous control set in the dq reference frame for the traction LSC for electric multiple units (EMUs) is proposed. First, the mathematical predictive model of one traction LSC is deduced by discretizing the state equation on the alternating current (AC) side. Then, the optimal control variables are calculated by solving the performance function, which involves the difference between the predicted and reference value of the current, as well as the variations of the control voltage. Finally, combined with bipolar sinusoidal pulse width modulation (SPWM), the whole control algorithm based on MBPCC is formed. The simulation models of EMUs’ dual traction LSCs are built in MATLAB/SIMULINK to verify the superior dynamic and static performance, by comparing them with traditional transient direct current control (TDCC). A whole dSPACE semi-physical platform is established to demonstrate the feasibility and effectiveness of MBPCC in real applications. In addition, the simulations of multi-EMUs accessed in the vehicle-grid coupling system are carried out to verify the suppressing effect on LFO. Finally, to find the impact of external parameters (the equivalent leakage inductance of vehicle transformer, the distance to the power supply, and load resistance) on MBPCC’s performance, the sensitivity analysis of these parameters is performed. Results indicate that these three parameters have a tiny impact on the proposed method but a significant influence on the performance of TDCC. Both oscillation pattern and oscillation peak under TDCC can be easily influenced when these parameters change.

Fast switching thyristor applied in nanosecond-pulse high-voltage generator with closed transformer core

For a compact and reliable nanosecond-pulse high-voltage generator (NPHVG), the specification parameter selection and potential usage of fast controllable state-solid switches have an important bearing on the optimal design. The NPHVG with closed transformer core and fast switching thyristor (FST) was studied in this paper. According to the analysis of T-type circuit, the expressions for the voltages and currents of the primary and secondary windings on the transformer core of NPHVG were deduced, and the theoretical maximum analysis was performed. For NPHVG, the rise-rate of turn-on current (di/dt) across a FST may exceed its transient rating. Both mean and maximum values of di/dt were determined by the leakage inductances of the transformer, and the difference is 1.57 times. The optimum winding ratio is helpful to getting higher voltage output with lower specification FST, especially when the primary and secondary capacitances have been established. The oscillation period analysis can be effectively used to estimate the equivalent leakage inductance. When the core saturation effect was considered, the maximum di/dt estimated from the oscillating period of the primary current is more accurate than one from the oscillating period of the secondary voltage. Although increasing the leakage inductance of NPHVG can decrease di/dt across FST, it may reduce the output peak voltage of the NPHVG.

A Novel Symmetrical Rectifier Configuration With Low Voltage Stress and Ultralow Output-Current Ripple

The dc-dc topologies with capacitive output filter are going to be widely used especially for high-output current applications because of its inherent advantages in the lower voltage stress on rectifiers and the smaller occupied printed circuit board layout area at the secondary side. However, the parasitic resonance between the equivalent leakage inductance of the power transformer and the equivalent output junction capacitance of the rectifier still practically exists in the center-tapped rectification configuration, which leads to considerable voltage ringing on the rectifier and then results in the utilization of the rectifier with much higher breakdown voltage rate and the decrease of conversion efficiency. Moreover, the relatively larger output-current ripple induces the both larger conduction loss in the secondary-side windings of the power transformer and the capacitive output filter. In this paper, a novel symmetrical rectifier configuration is proposed, which can effectively clamp the practical voltage stress on the rectifier without any parasitical voltage spike and reduce the output-current ripple due to the bypass effect of the auxiliary flying-balancing capacitors. The leakage inductance and the output filter capacitor can be treated as an inherent small LC filter to reduce the output voltage ripple further. Based on the theoretical analysis and the optimal design considerations, a 300-W lab-made LLC resonant dc-dc converter with this proposed configuration is built up to verify its advantages in high conversion efficiency.