Equivalent Circuit Modeling Techniques Research Articles

Admittance-based equivalent circuit modeling of multi-patch piezoelectric energy harvesting plate

Abstract Harvesting energy from mechanical vibration using piezoelectric material is a common method to power small electronics and batteries. Implementation of multiple piezo-patches to plate-like structures increases the power capacity and frequency bandwidth of the energy harvester since multiple patches can capture more vibrational modes of the dense plate dynamics. To optimize the harvested electrical output using advanced harvesting circuits, equivalent circuit modeling (ECM) is a useful technique for representing the entire electromechanical system in circuit- simulator-software (LTspice). The ECM technique based on finite-element (FE) simulation has been used for plate-like structures with only one single-piezo-patch-harvester in the literature. However, when multiple patches are integrated into a plate-like structure, their coupling can cause charge cancelation, resulting in complex dynamics that cannot be handled by the existing ECM methods. This paper presents three new methodologies for extracting a multi-mode ECM of the harvesters (e.g.: multi-patch piezo-harvesters integrated into a plate), using an admittance-based system identification approach utilizing FE results. The first method incorporates the ECM of multi-patch harvester into a single ECM, so called OGC. It includes a circuit branch where multiple patches have only one ECM branch for each vibration mode, which requires less equivalent circuit elements and hence less computational cost. The second and third so-called respective ground uncoupled (RGU) and respective ground coupled (RGC) ECM methods generate circuit branches for each piezo-patch and for each vibration mode, whereby their electrical connection (e.g. parallel or series) is later configured in LTspice. The RGU method provides a general multi-patch modeling approach while RGC method provides ECM parameters for each patch simultaneously when they are all connected which is the case in network harvester analysis. The ECMs of parallel multi-patch harvesters are validated by system-level FE simulations. The proposed admittance-based ECM methods are reliable for deriving the system parameters of multi-patch harvesters.

Origins of dielectric relaxations in AgNb7O18 ceramic

The origins of the relaxor behavior and low-temperature dielectric relaxation processes in AgNb7O18 ceramic were studied and a new relaxation mechanism was proposed through combined bond valence energy landscape (BVEL) calculation and equivalent circuit modeling (ECM). The BVEL calculation suggests that the Ag1 displacement subjects to a double-well potential that originates from the anisotropic coordination symmetry and low coordination number at Ag1 site. The relaxor ferroelectric behavior, observed at 200 K ≤ T ≤ 270 K, is sensitive to thermal history and is ascribed to the Ag1 hopping in double-well potential. The temperature dependence of the matrix capacitance (obtained by ECM) is very similar with that of b axis (obtained by in situ XRD) at 123 K < T < 174 K. Therefore, a phase transition being responsible for the low-temperature dielectric relaxation is assumed. The combined BVEL and ECM techniques performed in this work are therefore quite helpful to understand the complicated relaxor phenomena and explore new relaxors.

Ultrafast Zn-Diffusion and Oxide-Relief 940 nm Vertical-Cavity Surface-Emitting Lasers under High-Temperature Operation

We demonstrate 940-nm vertical-cavity surface-emitting lasers (VCSELs) with record-high −3 dB electrical-to-optical bandwidths of 40 and 32 GHz under room-temperature and 85 °C operations, respectively. The combination of Zn-diffusion with oxide-relief apertures inside the VCSEL cavity structure can greatly reduce the differential resistance and parasitic capacitance, which leads to an enhancement in the resistance-capacitance (RC)-limited bandwidth. Devices with different sizes of oxide-relief apertures are analyzed by use of the measured S 21 and S 11 two-port scattering parameters and equivalent circuit modeling techniques. For a device with a 3-μm diameter oxide-relief aperture, the extracted intrinsic bandwidth can be as high as 46.3 GHz. By using this novel device as the transmitter, we can achieve 60 Gbps error-free [bit-error-ratio (BER) on – off keying transmission over a 1-m OM5 fiber under room temperature (RT) operation, without using any signal processing. In addition, invariant 50-Gbps transmission performance from RT to 85 °C operations, over a 100-m OM5 fiber has also been successfully demonstrated (with a BER < 1 × 10−7).

REDUCED PEEC MODELING OF WIRE-GROUND STRUCTURES USING A SELECTIVE MESH APPROACH

The wire-ground electromagnetic coupling structures are quite common in avionics system electromagnetic compatibility (EMC) analysis. The increasing complexities of physical structures make electromagnetic modeling an increasingly tough task, and computational e-ciency is desirable. In this paper, a novel selective mesh approach is presented for partial element equivalent circuit (PEEC) modeling where intense coupling parts are meshed while the remaining parts are eliminated. With the proposed approach, the meshed ground plane is dependent on the length and height of the above wires. Relevant compact formulae for determining mesh boundaries are deduced, and a procedure of general mesh generation is also given. A numerical example is presented, and a validation check is accomplished, showing that the approach leads to a signiflcant reduction in unknowns and thus computation time and consumed memories, while preserving the su-cient precision. This approach is especially useful for modeling the electromagnetic coupling of wires and reference ground, and it may also be beneflcial for other equivalent circuit modeling techniques.

Membrane potential and impedance studies of polyaniline composite membranes: Effects of membrane morphology

Electronic and ionic transport characteristics of PANI composite porous membranes are presented in this study. Microporous cellulose ester membranes were modified by depositing polyaniline (PANI) either as a surface layer or as a layer on the pore walls of the base membrane. Various in situ chemical oxidative polymerization techniques were used that yielded distinctive PANI deposition sites in the base membranes. PANI intercalation levels in the composite membranes were evaluated using gravimetric method whereas the deposition site was characterized by scanning electron microscopy (SEM). Among the employed polymerization techniques, diaphragmatic polymerization of aniline using a two-compartment cell deposited PANI inside the membrane bulk with PANI content as high as 50% (w/w). Other techniques including solution-phase and vapor-phase polymerizations deposited PANI on the membrane surface with little in-bulk deposition. Electrochemical characterization of the membranes was conducted by electrochemical impedance spectroscopy (EIS) and membrane potential measurements in a free-standing membrane configuration. The charge transport processes showed a strong dependence on PANI deposition site in the base membrane along with PANI intercalation content. The transport processes in the membranes were modeled using equivalent circuit modeling technique. The composite membranes that had PANI layer at the surface showed highly resistive and diffusionally controlled charge transport. In contrast, in-pore PANI deposited membranes showed several orders of magnitude lower resistance and higher capacitance, both, were attributed to the redox transitions of PANI during the charge transport process. Membrane potential studies showed an anion-selective transport coupled with the proton conduction through the composite membranes. This study indicates the possible development of an electroactive porous membrane where the selective transport can be achieved through the electrochemical and electrostatic interactions of permeated species with in-pore deposited PANI layer.

Surface and Charge Transport Characterization of Polyaniline−Cellulose Acetate Composite Membranes

This study elucidates the charge transport processes of polyaniline (PANI) composite membranes and correlates them to the PANI deposition site and the extent of PANI surface layering on the base microporous membranes. PANI was deposited either as a surface layer or inside the pores of cellulose acetate microporous membranes using various in situ chemical polymerization techniques. The extent of PANI layering at the surface of the base membrane and its oxidation and doping states were characterized using Fourier transform infrared (FTIR) spectroscopy and X-ray photoelectron spectroscopy (XPS). PANI deposition on the membranes showed a strong dependence on the polymerization technique and polymerization time within a single technique. In XPS, the deconvolution of C 1s and N 1s core-level spectra of the composite membranes was used to quantify the extent of PANI layering at the surface along with its oxidation and doping states. PANI incompletely covered the surface of the base microporous membranes for all the employed techniques. However, the extent of the layering increased with the polymerization time in a particular technique. The charge transport through the bulk membrane and charge transfer at the membrane/electrode interface were studied by electrochemical impedance spectroscopy (EIS). The data were analyzed using the equivalent circuit modeling technique. The modeling parameters revealed that PANI deposition at the surface enhanced the interfacial charge transfer but the process depended on the extent of the surface coverage of the membrane. In addition, the charge transport in the bulk membrane depended on the PANI intercalation level, which varied depending on the polymerization technique employed. In addition, the EIS of electrolyte-soaked membranes was also conducted to evaluate the effects of PANI deposition site on charge transport in the presence of an electrolyte. PANI layering at the pore walls of the base membrane from diaphragmatic polymerization in a two-compartment cell showed that charge transport processes were strongly affected by the interaction of the electrolyte with the PANI layer at the pore surface. This study successfully showed the dependence of charge transport mechanisms of PANI composite membranes on the PANI deposition site and extent of surface layering at the membrane surface.

Microwave noise modeling for PHEMT using artificial neural network technique

An improved noise model for pseudomorphic high electron mobility transistors (PHEMT) based on the combination of the artificial neural network (ANN) and conventional equivalent circuit modeling technique is presented. The frequency dispersion of the gate noise model parameter P, drain noise model parameter R, and the correlation coefficient C have been taken into account by using an ANN model. The influence of the gate leakage current can be accommodated by using the proposed noise model. The noise model parameters are determined directly from on wafer noise parameters measurement based on the noise correlation matrix technique. Good prediction for noise parameters and significant improvements of the accuracy of noise parameters are obtained up to 26 GHz for 2 × 40 μm gate width (number of gate fingers × unit gate width) 0.25 μm Double Heterojunction δ-doped PHEMTs over a wide range of bias points. © 2008 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2009.

SRAM Circuit-Failure Modeling and Reliability Simulation With SPICE

Based on some new accelerated lifetime models and failure equivalent circuit modeling techniques for the common semiconductor wear out mechanisms, simulation program with integrated circuit emphasis (SPICE) can be used to characterize CMOS VLSI circuit failure behaviors and perform reliability simulation. This paper used a simple SRAM circuit as an example to demonstrate how to apply SPICE to circuit reliability modeling, simulation, analysis, and design. The SRAM circuit, implemented with a commercial 0.25-mum technology, consists of functional blocks of 1-bit six-transistor cell, precharge, read/write control, and sense amplifier. The SRAM operation sequence of "write 0, read 0, write 1, read 1" was first simulated in SPICE to obtain the terminal voltage and current stress profiles of each transistor. Then, normalized lifetimes of all transistors in terms of each failure mechanism were calculated with the corresponding accelerated lifetime models. These lifetime values were sorted to single out the most damaged transistors. Finally, the selected transistors were substituted with failure equivalent circuit models, and SPICE simulations were performed again to characterize the circuit performance, functionality, and failure behaviors. The simulation shows that the 0.25-mum technology, hot-carrier injection (HCI), and time-dependent dielectric breakdown (TDDB) had significant effects on SRAM-cell stability and voltage-transfer characteristics, while negative bias temperature instability (NBTI) mainly degraded the cell transition speed when the cell state flipped. This illustrative SRAM simulation work proves that, with SPICE and the failure equivalent circuit models, circuit designers can better understand the damage effects of HCI/TDDB/NBTI on the circuit operation, quickly estimate the circuit lifetime, make appropriate performance/reliability tradeoffs, and formulate practical design guidelines to improve the circuit reliability

GaAs MESFET modeling and nonlinear CAD

Equivalent circuit modeling techniques are described for both small-signal and large-signal models of GaAs MESFETs. The use of large-signal model in an interactive program for amplifier analysis is shown. The computed load-pull results and IMD (intermodulation distortion) predictions are shown to be in good agreement with measured data at 10 GHz.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>