Entire Modulation Range Research Articles

Energy and environmental performance from field operation of commercial-scale SOFC systems

Solid Oxide Fuel Cells (SOFCs) are capable of generating electrical and thermal power with very high conversion efficiency and almost no pollutant emissions into the atmosphere. Despite extensive literature on SOFC-based energy system models and experimental testing at the cell and short-stack level, there is currently a lack of performance data for SOFC modules under actual field conditions. To fill this gap, the present work investigates the energy and environmental performance of six SOFC modules, ranging in size from 10 to 60 kW, over thousands of hours of operation. These systems, supplied by the three leading SOFC manufacturers in Europe, have been installed and operated in different non-residential buildings worldwide, as part of the European Comsos project. The aim of this study is to establish a comprehensive set of field operation data to characterise commercial-scale SOFC systems. Specifically, raw data are processed to derived electrical and thermal efficiency maps, degradation rates and pollutant emissions, including particulate matter (PM), nitrogen oxides (NOx) and carbon monoxide (CO). A comparison with competing technologies is also provided to better highlight the potential benefits of adopting SOFC-based cogeneration systems. Values in the range of 51–61% were found for the system-level electrical efficiency under rated conditions. The electrical efficiency also remained consistently high across a wide modulation range (between 50% and 100% of rated power), with peak values reaching 65%. In addition, promising results were obtained for the average percentage loss in electrical efficiency, with a minimum value of 0.7%/1000 h. Regarding the environmental analysis, NOx and CO emissions were analysed at both constant and variable power output, proving to be impressively low across the entire modulation range. The same applies to PM concentrations, which were below ambient level. Overall, SOFCs demonstrated to be one of the best cogeneration solutions for commercial-scale systems (tens to hundreds of kW in size), from both an energy and environmental perspective. However, further reductions in costs and dedicated financial schemes are necessary for a widespread market penetration.

Model Predictive Torque Control for Permanent- Magnet Synchronous Motors Using a Stator- Fixed Harmonic Flux Reference Generator in the Entire Modulation Range

To increase torque and power conversion of permanent-magnet synchronous motors (PMSMs) at high-speed operation, the dc-link voltage of the inverter must be fully utilized during steady-state and transient operations. This article proposes the incorporation of a harmonic reference generator (HRG) with a pulse clipping (PC) scheme into a model predictive control framework to achieve highest power output. The HRG calculates flux references in the stator-fixed coordinate system for an underlying continuous-control-set model-predictive flux control (CCS-MPFC). These reference trajectories contain the harmonic flux component induced by the voltage hexagon in the overmodulation range and specific switching states (e.g., six-step operation) of the inverter are ensured by the proposed PC scheme. This enables a seamless transition to the overmodulation range including six-step operation and increases the drive's power conversion to its maximum extent. Since the flux differential equation in the stator-fixed coordinate system, used as motor model for the HRG and CCS-MPFC, is able to represent PMSMs with linear and nonlinear magnetization, the proposed approach is well suited for the control of PMSMs with nonlinear magnetization. Extensive transient and steady-state experimental investigations on a highly utilized PMSM in the entire modulation and speed range prove the performance of the proposed approach.

Artificial Jellyfish Search Algorithm-Based Selective Harmonic Elimination in a Cascaded H-Bridge Multilevel Inverter

This paper used an artificial jellyfish search (AJFS) optimizer suitable for selective harmonic elimination-based modulation for multilevel inverter (MLI) voltage control application. The main objective was to remove the undesired lower-order harmonics in the output voltage waveform of an MLI. This algorithm was motivated by the behavior of jellyfish in the ocean. Jellyfish have the ability to find the global best position where a large quantity of nutritious food is available. The paper applied AJFS algorithm on five, seven, and nine levels of CHB-MLI. The optimum switching angle was calculated for the entire modulation range for the desired lower-order harmonics elimination. The problem formulated to achieve the objective was solved in a MATLAB environment. The total harmonic distortion (THD) values of five-, seven-, and nine-level inverters for various modulation indexes were computed using AJFS and compared with the powerful differential evolution (DE) algorithm. The comparison of THD results clearly demonstrated superior THD in the output of CHB-MLI of the AJFS algorithm over DE and GA algorithm for low and medium values of modulation index. The experimental results further validated the better performance of the AJFS algorithm.

Dodecagonal Voltage Space Vector Based PWM Techniques for Switching Loss Reduction in a Dual Inverter Fed Induction Motor Drive

The dodecagonal space vector generation scheme eliminates the most dominant lower order harmonics fifth and seventh for the entire modulation range, thereby improving the quality of the output waveform and eliminates the sixth harmonic torque pulsations. By considering this advantage, a group of dodecagonal space vector pulsewidth modulation (PWM) techniques is proposed in this article. These techniques improve the harmonic profile of the output waveform further at higher modulation indices compared to conventional dodecagonal space vector PWM. In this article, a generalized closed-form expression for harmonic distortion of various dodecagonal space vector PWM schemes is derived and the analytical results are compared. The proposed PWM techniques are simulated in MATLAB/Simulink environment and validated experimentally on a laboratory prototype. Also, a detailed switching loss analysis for various dodecagonal space vector PWM schemes are obtained and it is shown that the proposed PWM techniques yield lower inverter switching power losses than the conventional scheme throughout the power factor range.

Phase Reconfiguring Technique for Enhancing the Modulation Index of Multilevel Inverter Fed Nine-Phase IM Drive

In this article, a multilevel inverter (MLI) scheme is proposed for four-pole (4-pole), nine-phase (9-phase) induction motor (IM) drives with improved dc bus utilization as well as reduced device count. The proposed MLI is realized with nine three-switch inverter legs (3-SIL) and a single dc source. In the proposed MLI, each 3-SIL is utilized for exciting the two identical voltage profile coils/phase of the four-pole (4-pole) stator winding, which means each leg has to be modulated with two references. These two independent references/leg will limit the modulation index (M.I) of 3-SIL-based proposed MLI. This lower M.I will result in a requirement of the higher magnitude of dc-link voltage to achieve the rated load voltage requirement. In this article, an effective phase reconfiguring concept is proposed for reducing the dc-link voltage requirement of the proposed MLI. In addition, all the possibilities of phase reconfiguring details for proposed MLI-fed 9-phase IM drive are also presented. A three-phase carrier-based space vector pulsewidth modulation is implemented for improving the linear modulation range of proposed MLI configuration further. In contrast with existing 9-phase three-level inverters, like NPC and FC, the proposed MLI configuration requires only one dc link (with half of the magnitude) and lesser number of semiconductor devices. The proposed MLI-fed, 5 hp, 9-phase, 4-pole IM drive is validated by using Ansys Maxwell FEM simulation and experimental prototype for entire modulation range.

A Hybrid Multilevel Inverter Scheme for Nine-Phase PPMIM Drive by Using Three-Phase Five-Leg Inverters

In pole-phase modulation, the phase order is coming down by pole ratio times in high pole mode, which results in the higher magnitude of spatial harmonics as well as higher torque ripple. In this article, the available three identical voltage-fed windings per effective phase in three-phase 12-pole (3PH-12PO) mode are used to develop the simple multilevel inverter (MLI) configuration for minimizing torque ripple. The proposed MLI scheme is realized with three five-leg inverter modules. Each five-leg inverter module will generate three-level voltage across the phase, thereby resultant voltage seen by each phase winding is five-level voltage in 3PH-12PO mode. This multilevel voltage will improve the torque ripple profile of the motor drive. In addition, the proposed MLI scheme along with phase grouping will enrich the linear modulation range of the pole-phase-modulated induction motor (PPMIM) drive in nine-phase four-pole (9PH-4PO) mode. The switches used to generate a multilevel voltage in 3PH-12PO mode are effectively utilized for blocking the flow of circulating currents. As compared with other conventional nine-phase five-level inverters the proposed five-level inverter requires only 30 switches and it does not require extra clamping diodes/capacitors and extra bidirectional switches for isolating neutrals in 9PH-4PO operation. The validation of proposed MLI scheme is done on a 5-hp nine-phase IM with Ansys Maxwell as well as laboratory prototype for entire modulation range using V/f = constant control.

A Switched Capacitive Filter-Based Harmonic Elimination Technique by Generating a 30-Sided Voltage Space Vector Structure for IM Drive

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis.

A Multilevel Inverter Configuration for an Open-End-Winding Pole-Phase-Modulated-Multiphase Induction Motor Drive Using Dual Inverter Principle

This paper presents a multilevel inverter (MLI) configuration for open-end-winding pole-phase-modulated-multiphase induction motor (PPMMIM) drives. The proposed MLI configuration consists of one nine-phase two-level inverter and three 3-Φ two-level inverters. In pole–phase modulation, increasing the number of poles decreases the number of phases that increases the space harmonics in air gap flux. Moreover, in high-pole mode of PPMMIM drives, two-level voltage supply causes the high torque ripple that degrades the performance of the drive. Usually, conventional MLIs are not preferred for reducing torque ripple, due to the capacitor-balancing issues and more number of semiconductor devices. To address these issues, the proposed MLI configuration effectively utilized the inherent availability of the three identical voltage coils in the high-pole mode for reducing the torque ripple. The 3-Φ carrier phase-shifted space vector pulse width modulation (SVPWM) is used for generating the multistep voltage across the effective phase in high-pole mode as well as for shifting the lower order harmonics to higher order frequencies. Moreover, in low-pole mode, the dc-link voltage utilization of the proposed MLI configuration is improved by 13.8% with third harmonic injected SVPWM as compared to conventional 9-Φ SVPWM. Another important feature of the proposed MLI configuration is its ability to supply the two-level voltage under fault conditions. This feature notably improves the reliability of the PPMMIM drive. The finite-element method model of 5-hp nine-phase PPMMIM is designed in ANSYS Maxwell 2-D and is cosimulated with the proposed MLI configuration in Simplorer environment. The effectiveness of the proposed MLI-fed 5-hp MIM drive is experimentally verified for the entire modulation range.

A Carrier-Based PWM Scheme for Neutral Point Voltage Balancing in Three-Level Inverter Extending to Full Power Factor Range

This paper proposes a unique carrier-based pulse width modulation strategy for a three-level neutral-point-clamped inverter that works satisfactorily and with uniform convergence time over the full power factor (PF) range of the load variation. It has excellent control over capacitor voltages and mitigates low-frequency oscillations in the neutral point for the full PF range. First, an investigation is made to see how the load currents get modulated to generate compensating neutral current causing charging and discharging of dc-link capacitors. It is observed that when an additional modulating voltage signal that is in phase with the corresponding phase current is added in each phase, a neutral current is produced in the right direction which can be used to compensate for any prior unbalance in capacitor voltages. It is demonstrated that the performance of this scheme is insensitive to the load PF variation (full range from zero to unity). It performs satisfactorily throughout the entire linear modulation range and eliminates any undesirable low-frequency harmonic component in the compensating neutral current. The effectiveness of the proposed scheme is verified through simulation and experimental results by varying load PF as well as modulation index with both passive and motor loads.

Fifth- and Seventh-Order Harmonic Elimination With Multilevel Dodecagonal Voltage Space Vector Structure for IM Drive Using a Single DC Source for the Full Speed Range

This paper presents a method for generating a multilevel dodecagonal voltage space vector structure using a single dc source for induction motor drives. Multilevel dodecagonal structure combines the advantages of both multilevel and dodecagonal structures, and hence, generates low d v /d t phase voltage along with the elimination of fifth- and seventh-order harmonics over the entire modulation range. This eliminates low-order harmonic currents and prevents the generation of sixth-order torque ripple in the motor. The topology used requires only one dc source making four-quadrant operation of the drive system simpler compared to previously proposed multilevel topologies generating dodecagonal space vector structures. The topology used consists of a three-level flying capacitor (FC) inverter cascaded with a capacitor fed H-bridge. The FC inverter operates at a lower switching frequency and the low-order harmonics are eliminated by the switching action of the cascaded H-bridge inverter. The capacitors in the cascaded H-bridge modules are maintained at a substantially smaller voltage compared to the dc-link voltage and are inherently balanced during the pulsewidth modulation operation. This results in low switching loss, in the FC inverter as well as in the cascaded H-bridge inverter. Experimental results are included to validate the operation of the topology and modulation scheme presented in this paper.

Multilevel Dodecagonal Voltage Space Vector Structure Generation for Open-End Winding IM Using a Single DC Source

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme.

Improved SVPWM vector selection approaches in OVM region to reduce common-mode voltage for three-level neutral point clamped inverter

Abstract Multilevel inverters (MLIs) have an essential portion in industrial applications. Eventhough there are various elementary developments in MLI and its pulse width modulation (PWM) control strategies, unfortunately those strategies are least bothered about the common mode voltage (CMV). The CMV appears at the neutral point of the motor’s star connected stator windings with respect to the source ground. This study proposes PWM schemes for three level diode clamped multilevel inverter (DC-MLI) which use an unpretentious switching sequence to determine the triangle for maximum output voltage and minimum CMV in entire modulation range. Here two types of approaches are proposed: (i) Partial elimination SVPWM (PE-SVPWM) and (ii) Full elimination (FE-SVPWM). The proposed strategies suggest switching selection by using the control degree of freedom available in SVPWM without affecting the inverter output voltage. As a result, CMV reduction and elimination with maximum output voltage and better THD is achieved. The proposed PWM approaches can be extended for any number of levels. The theoretical study, the MATLAB/Simulink software based computer simulation and Field Programmable Gate Array (FPGA) SPARTAN-III-3AN-XC3S400 processor supported hardware corroboration have shown the superiority of the proposed technique over the existing SVPWM schemes.

A Voltage Space Vector Diagram Formed by Nineteen Concentric Dodecagons for Medium-Voltage Induction Motor Drive

In this paper, a multilevel dodecagonal voltage space vector structure with nineteen concentric dodecagons is proposed for the first time. This space vector structure is achieved by cascading two sets of asymmetric three-level inverters with isolated H-bridges on either side of an open-end winding induction motor. The dodecagonal structure is made possible by proper selection of dc link voltages and switching states of the inverters. The proposed scheme retains all the advantages of multilevel topologies as well as the advantages of dodecagonal voltage space vector structure. In addition to that, a generic and simple method for calculation of pulsewidth modulation timings using only sampled reference values ( $v_\alpha$ and $v_\beta$ ) is proposed. This enables the scheme to be used for any closed-loop application such as vector control. In addition, a new method of switching technique is proposed, which ensures minimum switching while eliminating the fifth- and seventh-order harmonics and suppressing the eleventh and thirteenth harmonics, eliminating the need for bulky filters. The motor phase voltage is a 24-stepped waveform for the entire modulation range thereby reducing the number of switchings of the individual inverter modules. Experimental results for steady-state operation, transient operation, including start-up have been presented and the results of fast Fourier transform analysis is also presented for validating the proposed concept.

Low-Order Harmonic Suppression for Open-End Winding IM With Dodecagonal Space Vector Using a Single DC-Link Supply

This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique.

Analytical Closed-Form Expressions for Harmonic Distortion Corresponding to Novel Switching Sequences for Neutral-Point-Clamped Inverters

Analytical closed-form expressions for harmonic distortion factors corresponding to various pulsewidth modulation (PWM) techniques for a two-level inverter have been reported in the literature. This paper derives such analytical closed-form expressions, pertaining to centered space-vector PWM (CSVPWM) and eight different advanced bus-clamping PWM (ABCPWM) schemes, for a three-level neutral-point-clamped (NPC) inverter. These ABCPWM schemes switch each phase at twice the nominal switching frequency in certain intervals of the line cycle while clamping each phase to one of the dc terminals over certain other intervals. The harmonic spectra of the output voltages, corresponding to the eight ABCPWM schemes, are studied and compared experimentally with that of CSVPWM over the entire modulation range. The measured values of weighted total harmonic distortion (WTHD) of the line voltage VWTHD are used to validate the analytical closed-form expressions derived. The analytical expressions, pertaining to two of the ABCPWM methods, are also validated by measuring the total harmonic distortion (THD) in the line current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">THD</sub> on a 2.2-kW constant volts-per-hertz induction motor drive.

Generalized PWM Technique for Dual Inverter Fed Induction Motor Drive

This paper presents a simplified Generalized Pulse Width Modulation (GPWM) algorithm to obtain various continuous and discontinuous PWM algorithms for a four-level inverter topology. The proposed four-level inverter is achieved by feeding the induction motor from both ends by a three-level cascade inverter from one side and by two-level inverter from other side. The proposed inverter configuration is capable to produce an output voltage of two-level, three-level and four-level in entire modulation range. In the proposed inverter topology neutral point fluctuations are absent and neutral clamping diodes are absent. With the application of various discontinuous PWM algorithms to the proposed inverter topology the switching losses are reduced when compared with continuous PWM algorithm. The simulation analyses are carried out in MATLAB/simulink environment and the results are presented.

A Medium-Voltage Inverter-Fed IM Drive Using Multilevel 12-Sided Polygonal Vectors, With Nearly Constant Switching Frequency Current Hysteresis Controller

In this paper, a current error space vector (CESV)-based hysteresis current controller for a multilevel 12-sided voltage space vector-based inverter-fed induction motor (IM) drive is proposed. The proposed controller gives a nearly constant switching frequency operation throughout different speeds in the linear modulation region. It achieves the elimination of 6n ±1, n = odd harmonics from the phase voltages and currents in the entire modulation range, with an increase in the linear modulation range. It also exhibits fast dynamic behavior under different transient conditions and has a simple controller implementation. Nearly constant switching frequency is obtained by matching the steady-state CESV boundaries of the proposed controller with that of a constant switching frequency SVPWM-based drive. In the proposed controller, the CESV reference boundaries are computed online, using the switching dwell time and voltage error vector of each applied vector. These quantities are calculated from estimated sampled reference phase voltages. Vector change is decided by projecting the actual current error along the computed hysteresis space vector boundary of the presently applied vector. The estimated reference phase voltages are found from the stator current error ripple and the parameters of the IM.

A Nearly Constant Switching Frequency Current Error Space Vector Based Hysteresis Controller for an IM Drive with 12-Sided Polygonal Voltage Space Vectors

In this paper, a current error space vector (CESV) based hysteresis controller for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed, for the first time. An open-end winding configuration is used for the induction motor. The proposed controller uses parabolic boundary with generalized vector selection logic for all sectors. The drive scheme is first studied with a space vector based PWM (SVPWM) control and from this the current error space phasor boundary is obtained. This current error space phasor boundary is approximated with four parabolas and then the system is run with space phasor based hysteresis PWM controller by limiting the CESV within the parabolic boundary. The proposed controller has increased modulation range, absence of 5th and 7th order harmonics for the entire modulation range, nearly constant switching frequency, fast dynamic response with smooth transition to the over modulation region and a simple controller implementation.

A Nine-Level Inverter Topology for Medium-Voltage Induction Motor Drive With Open-End Stator Winding

A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected $H$ -bridges. The $H$ -bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five- or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the $H$ -bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region.

A Reduced Device-Count Hybrid Multilevel Inverter Topology with Single DC Source and Improved Fault Tolerance

A new hybrid multilevel power converter topology is presented in this paper. The proposed power converter topology uses only one DC source and floating capacitors charged to asymmetrical voltage levels, are used for generating different voltage levels. The SVPWM based control strategy used in this converter maintains the capacitor voltages at the required levels in the entire modulation range including the over-modulation region. For the voltage levels: nine and above, the number of components required in the proposed topology is significantly lower, compared to the conventional multilevel inverter topologies. The number of capacitors required in this topology reduces drastically compared to the conventional flying capacitor topology, when the number of levels in the inverter output increases. This topology has better fault tolerance, as it is capable of operating with reduced number of levels, in the entire modulation range, in the event of any failure in the H-bridges. The transient as well as the steady state performance of the nine-level version of the proposed topology is experimentally verified in the entire modulation range including the over-modulation region.