Energy-efficient Architecture Research Articles

Levy flight based momentum search and Circle Rock Hyrax swarm optimization algorithms for energy effective clustering and optimal routing in wireless body area networks

In recent years, the connectivity of a new dimension has been brought to Wireless Body Area Networks (WBANs) through the concept of the Wearable Internet of Things (WIoT). WIoT offers valuable functionalities like data collection, analysis, and transmission for real-time health monitoring services. However, WBANs are characterized by a large number of battery-powered sensor nodes, making them resource-constrained. While keeping standard WSN abilities, WBAN's significant obstacles are data communication, social mobility, high interference in dense deployment, latency, and energy consumption of sensor nodes. As a result, the implementation and design of an application require dependable data transfer and an energy-efficient architecture. It proved critical to have as little delay as possible while delivering correct data. To overcome these issues, this study developed a novel energy-efficient clustered and optimized routing scheme in WBAN. Due to its effective scalability, this work employs an Improved Self-Executing Active Cross-Propagated (ISAC) clustering approach to form clusters in Wireless Body Area Networks (WBANs). Subsequently, the selection of the best Cluster Heads (CHs) is facilitated by the Levy Flight-based Momentum Search Algorithm (LFMSA). The Circle Rock Hyrax Swarm Optimization (CRH) algorithm is then utilized for energy-efficient routing. In determining the CH in each cluster, consideration is given to both residual energy and connectivity. The proposed framework minimizes the number of transmissions and overall transmission distance, optimizing inter and intra-cluster transmission distances. Additionally, the framework ensures energy-efficient packet delivery from CHs to the sink node. Performance comparisons, conducted using various statistical measures and simulated on the NS-2 platform, demonstrate that the proposed framework outperforms existing routing protocols and clustering methodologies. In comparison to previous methodologies, the proposed framework consistently achieves superior results.

Energy Efficient and Reliable High Quality Video Transmission Architecture for Wireless Sensor Networks

Energy Efficient and Reliable High Quality Video Transmission Architecture for Wireless Sensor Networks

Reconstruction of buildings of the first mass series according to green construction standards

The relevance of the research topic is due to the need to introduce systemic solutions into practice to create an environmentally sustainable and energy efficient urban environment. Over the past decades, there has been an urgent need to reconstruct the housing stock according to architectural, urban planning and construction requirements. Based on the results of the author’s scientific research, the fundamental possibility of reconstruction of 5-storey brick buildings of the first mass series according to green construction standards is shown. The results obtained convincingly indicate that the reconstruction of buildings of the first mass series according to the green standard GOST 70346—2022 allows improving almost all green categories. The quality of the architecture and layout of the site, energy efficiency and quality of the atmosphere, and the level of innovation in sustainable development are especially noticeably increasing. Before the reconstruction, the buildings of the first mass series do not meet the requirements of green construction. After the reconstruction of these buildings, a rating of “good” was obtained. Comparison of results obtained according to independent green standards GOST 70346—2022 and STO NOSTROY 2.35.4—2011 shows their consistency. Thus, the reconstruction of buildings of the first mass series according to green construction standards makes it possible to create a fundamentally new, environmentally sustainable, energy-efficient architecture in order to preserve and improve the quality of the environment for future generations.

Area–time–energy efficient architecture of CBNS‐based fast Fourier transform

AbstractA new approach for implementing the fast Fourier transform (FFT) using complex binary number system (CBNS) is presented in this paper. The advantage of using CBNS is that instead of processing the real and imaginary parts of a complex number separately, we can process both as a single entity. A total of four FFT architectures have been developed, which are 16‐, 64‐, 256‐, and 1024‐point FFT architectures. The proposed FFT is designed using Verilog‐HDL and implemented using a Virtex‐7 field‐programmable gate array (FPGA). The maximum clock rate achieved by the proposed FPGA‐based design is 376.1 MHz. The FPGA resource utilization of the FFT is less than the state‐of‐the‐art FFT designs. An application‐specific integrated circuit (ASIC) for the FFT is also designed. The normalized energy per FFT of the proposed ASIC is 0.14 nJ, and the normalized area per FFT of the ASIC is 1.08 mm2 which is less than other existing designs.

Energy efficiency in architecture: Strategies and technologies

Energy efficiency in architecture is a critical consideration in the design and construction of buildings, aiming to reduce energy consumption and minimize environmental impact. This abstract explores various strategies and technologies that can be implemented to enhance energy efficiency in architecture. The importance of energy efficiency in architecture lies in its potential to reduce greenhouse gas emissions, lower energy costs, and create healthier indoor environments. Achieving energy efficiency in architecture involves a combination of passive design strategies, such as orientation, shading, and natural ventilation, as well as active technologies, including high-performance insulation, energy-efficient lighting, and renewable energy systems. Passive design strategies are fundamental to energy-efficient architecture, utilizing the natural elements of sunlight, shade, and airflow to minimize the need for mechanical heating, cooling, and lighting. Proper building orientation, effective shading devices, and strategic placement of windows and openings can maximize natural light and ventilation, reducing the reliance on artificial lighting and mechanical ventilation systems. In addition to passive design strategies, active technologies play a crucial role in enhancing energy efficiency in architecture. High-performance insulation materials, such as aerogel and vacuum insulation panels, can significantly reduce heat loss and gain through building envelopes, improving thermal comfort and reducing energy consumption. Energy-efficient lighting systems, such as light-emitting diodes (LEDs) and daylight harvesting systems, can reduce electricity usage for lighting, while renewable energy systems, such as solar photovoltaic panels and wind turbines, can generate clean energy on-site, further reducing reliance on fossil fuels. Overall, energy efficiency in architecture requires a holistic approach that considers both passive design strategies and active technologies. By incorporating these strategies and technologies into building design and construction, architects and designers can create buildings that are not only environmentally sustainable but also comfortable, healthy, and cost-effective for occupants.

Negative capacitance FET based dual-split control 6T-SRAM cell design for energy efficient and robust computing-in memory architectures

A Negative Capacitance Field effet transistor (NCFET) based Dual split control (DSC) 6T-SRAM cell has been designed and explored with Computing-in memory (CiM) architecture for energy efficient demonstration of Deep neural networks (DNN) basic operation such as Input-Weight (Dot) Product. The impact of ferro electric layer thickness (Tfe) on the SRAM cell perfomance metrics such as read noise margin (RNM), write noise margin (WNM) and energy efficiency for read and write operations have been analyzed at supply voltages of 0.3 V and 0.5 V. It has been observed that due to the steep slope characteristics, the NCFET based DSC 6T-SRAM cell design exhibits better RM, WM, and energy efficiency as compared to the baseline CMOS DSC SRAM cell design at VDD = 0.3 V and 0.5 V respectively (with Tfe range of 1 nm to 3 nm). Further, NCFET dual split control scheme for 6T-SRAM cell demonstrate improved read stability and write ability when compared with NCFET 6 T-SRAM cell design along with improved energy efficiency. NCFET based DSC 6T-SRAM CiM cell design has ∼22.77× and 12.41× lower energy consumption compared to the équivalent baseline 40 nm CMOS/baseline SRAM CiM design and ∼ 25.80× and 22.76× lower energy consumption compared to the NCFET based SRAM CiM at VDD = 0.3 V and 0.5 V respectively. NCFETs have improved steep subthreshold slope characteristics at an optimal Tfe value and NCFET SRAM based CiM circuits are expected to have higher noise margins and lower energy consumption compared to the baseline CMOS designs and are effective for NCFET based computing in-memory architectures with reduced read disturb issues in combination with DSC concept.

Comparative Analysis of Various Topologies for AC and DC Power Distribution Systems on Efficiency Grounds

Efficiency is the factor that once wiped DC out of the power system at the birth of electricity, in nineteenth century. The battle of currents between AC and DC has reignited with the aggravating employment of DC in the sectors of generation, transmission, and utilization. This calls for cutting edge research in the field of comparative efficiency analysis of AC and DC, on distribution scale. The current research effort compares AC and DC distribution systems on efficiency grounds, for various topologies. The two systems are compared employing normal distribution technique for residential load profile. The varying efficiency of power electronic converters (PECs) with stochastic load profiles is modeled using MATLAB/SIMULINK, for each topology. DC takes the lead against AC with efficiency advantage for energy efficient load-based architectures. The architectures with variable speed drive-based loads, the efficiency advantage in favor of DC is between 1% and 2%, however, the efficiency advantage reaches to 12% with inherent DC loads. In contrast, AC takes the lead with conventional distribution, with an efficiency advantage between 4% and 5%. The findings of current research work can prove to be beneficial in making policy decisions for the adoption of DC at distribution scale.

Energy-efficient architecture for high-performance FIR adaptive filter using hybridizing CSDTCSE-CRABRA based distributed arithmetic design: Noise removal application in IoT-based WSN

An energy-efficient architecture of high-performance FIR adaptive filter design using approximate distributed arithmetic (DA), which is integrated with canonic signed digit-based triangular common sub expression elimination (CSDTCSE) and carry-resist adder based Booth recorder adder (CRABRA) is proposed for noise removal in sensor nodes. Distributed arithmetic is coupled with two signed 32-bit, 16-bit radix-8 Booth algorithms and approximate computation under 2-bit adder to design FIR adaptive filter for decreasing partial products (PP) together with accumulation circuits. The truncation of LSB in the PP is presented to approximate the PP to reduce memory complexity and hardware overhead. An approximation recoding adder decreases the energy usage, area, and critical path. Approximate Wallace trees are applied to the PP accumulation to lessen the latency. The canonic signed digit-based triangular common sub-expressions elimination framework is proposed, which significantly reduces a count of logic operators and logic depth in implementing the FIR filter. The proposed algorithm is activated in Verilog coding and synthesized using Xilinx 14.5 ISE simulation software. The proposed design successfully reduces delay, area, and power by maintaining better accuracy with performance.

An energy efficient reconfigurable architecture for multi-lead ECG signal compression

An energy efficient reconfigurable architecture for multi-lead ECG signal compression

Fracture behavior of high‐performance carbon fiber composites toughened by reactive polyetherimide

AbstractCarbon fiber‐reinforced epoxy composites (CFECs) continue to grow in demand for aerospace, mass transportation, electric vehicle, and energy efficient architecture due to their lightweight, high strength, and high modulus. However, CFECs are susceptible to delamination upon impact which can lead to premature structural failure. This paper investigates the interlaminar fracture toughness of unidirectional CFECs based on reactive polyetherimide (rPEI) modified multifunctional epoxy matrix system. The matrices were cured formulations of tetraglycidyl diamino diphenyl methane, triglycidyl para‐amino phenol, rPEI having different molecular weights (MW) and diaminodiphenyl sulfone. Multi‐phase morphologies were observed from the resin castings and CFECs containing different MW rPEI modifiers. Results show that the mode I fracture toughness (GIC) of the rPEI‐toughened CFECs can be increased by as much as 150% over the unmodified CFECs based on the MW and type of phase morphology that promotes crack‐bridging mechanism. In addition, rPEI‐modified CFECs exhibit better property retention (~80% of GIC) after prolonged solvent exposure.Highlights A processing‐structure–property relationship based on CFECs is established. The amine‐terminated rPEI facilitates the formation of a strong bonding. The molecular weight effect of rPEI on the phase morphology was investigated. The rPEI enhances the interlaminar fracture toughness of the composites. The rPEI particle bridging is found to be responsible for the toughening effect.

Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons

Computation on a large volume of data at high speed and low power requires energy-efficient architectures for edge computing applications. As a result, scientists focus on memristive circuits and systems for area and energy efficiency. Spiking neural network (SNN) with bio-inspired spike-timing-dependent plasticity learning (STDP) is a promising solution for energy-efficient neuromorphic systems than conventional artificial neural network (ANN). Previous works on SNN with STDP learning primarily use memristor macro models, which are software-based and cannot give complete insight into circuit implementation challenges. Some reported works on SNN use memristive devices, which require additional fabrication steps. This article presents a full circuit-level implementation of the SNN system featuring on-chip training and classification using memristive STDP synapse in standard CMOS technology. A new learning rule using the modified STDP is implemented to simplify the weight modification process. It does not involve FPGAs, CPUs, or GPUs to train the neural network. The approach used in this paper to modify the weights does not require any additional combinational or digital circuits attached to the memristive synapse resulting in less consumption of area, energy and time. We demonstrated the complete circuit-level design, implementation and simulation of SNN with on-chip training and pattern classification using 180 nm CMOS technology. A comprehensive comparison of the proposed SNN circuit with the previous related work is also presented. To demonstrate the versatility of the CMOS synapse circuit for application scenarios requiring rate-based learning, we have tuned the pair-based STDP circuit to obtain Bienenstock–Cooper–Munro (BCM) characteristics and applied it to heart rate classification.

High-Efficiency GaN-Based Power Amplifiers for Envelope Nonlinearities’ Mitigation in VHF Wideband Polar-Mode Transmitters

Space-based communications at the very high frequency (VHF) band for air traffic management is a new technology application under development that requires energy-efficient architectures to mitigate the power limitations of satellite platforms. The usage of high-efficiency radiofrequency (RF) transmitters can help reduce the power consumption, but nonlinearities concerning the amplified signal in wide fractional bandwidth systems are a problem to solve. This paper proposes a high-efficiency (RF) power amplifier (PA) for satellite communications at the VHF band that aims to reduce the envelope distortion inherent to wide fractional bandwidth multicarrier polar-mode transmitters. Its design is based on a solution called hybrid-coupled switching voltage PA in combination with gallium nitride (GaN) high electron mobility transistor (HEMT) technology. The developed VHF PA prototype delivers up to 95 W from a 28 V power supply, with a drain efficiency about 80% within the 118 MHz to 138 MHz operating band. To test its linearity performance, operating in a polar-mode configuration, a GaN-based wideband envelope amplifier (EA) has been developed to modulate the RF PA supply port. This EA improves its power efficiency by combining it with a slow envelope power supply (SEPS). Some measurements have been taken for a 100 W peak envelope power (PEP) and 10 MHz (maximum carrier spacing) four-tone digitally-modulated test signal, where any distortion product is attenuated 46 dB below the average power of the amplified signal without applying any digital predistortion (DPD) technique.

IDEFIX: A versatile performance-portable Godunov code for astrophysical flows

Context. The exascale super-computers becoming available rely on hybrid energy-efficient architectures that involve an accelerator such as a graphics processing unit (GPU). Leveraging the computational power of these machines often means a significant rewrite of the numerical tools each time a new architecture becomes available. Aims. We present IDEFIX, a new code for astrophysical flows that relies on the KOKKOS meta-programming library to guarantee performance portability on a wide variety of architectures while keeping the code as simple as possible to the user. Methods. IDEFIX is based on a Godunov finite-volume method that solves the nonrelativistic hydrodynamical (HD) and magnetohy-drodynamical (MHD) equations on various grid geometries. IDEFIX includes a large choice of solvers and several additional modules (constrained transport, orbital advection, nonideal MHD), allowing users to address complex astrophysical problems. Results. IDEFIX has been successfully tested on Intel and AMD CPUs (up to 131 072 CPU cores on Irene-Rome at TGCC) as well as NVidia and AMD GPUs (up to 1024 GPUs on Adastra at CINES). IDEFIX achieves more than 108 cell s−1 in MHD on a single NVidia V100 GPU and 3 × 1011 cell s−1 on 256 Adastra nodes (1024 GPUs) with 95% parallelization efficiency (compared to single node). For the same problem, IDEFIX is up to six times more energy efficient on GPUs compared to Intel Cascade Lake CPUs. Conclusions. IDEFIX is now a mature exascale-ready open-source code that can be used on a large variety of astrophysical and fluid dynamics applications.

The kindergarten of Crosara by Sergio Los: reassessing a pioneering thermally efficient building

ABSTRACT Given the environmental and energy crises, European directives are targeting building energy efficiency. Architects must improve the thermal performance of their designs to approach Nearly-Zero Energy Building (NZEB) standards. Energy-efficient experimental buildings from the 1970s are often held up as inspiring examples of energy-conscious architectural design. However, the lack of quantitative data about their thermal performance, measured using current evaluation standards and units, makes their legacy difficult to interpret today. This study aims to verify the relevance of 1970s energy-efficient architecture by quantifying the thermal performance of an exemplary case: the kindergarten designed by Sergio Los in Crosara (Italy). The thermal performance of the building in its original configuration is re-assessed using energy simulation software and discussed relative to past and present standards, including carbon emissions. The results quantify the contributions of different energy-conscious strategies and show that the building’s pioneering performance results primarily from the architect’s bioclimatic design decisions. The study demonstrates how architects reduced building energy demands in the 1970s and explores the impact of their strategies relative to contemporary efficiency priorities.

Implementation of Hardware and Energy Efficient Approximate Multiplier Architectures Using 4-2 Compressor for Images

Abstract: Approximate computing is tentatively applied in some digital signal processing applications which have an inherent tolerance for erroneous computing results. The approximate arithmetic blocks are utilized in them to improve the electrical performance of these circuits. Multiplier is one of the fundamental units in computer arithmetic blocks. Moreover, the 4-2 compressors are widely employed in the parallel multipliers to accelerate the compression process of partial products. In this brief, three novel approximate 4-2 compressors are proposed and utilized in 8-bit multipliers. Meanwhile, an error-correcting module (ECM) is presented to promote the error performance of approximate multiplier with the proposed 4-2 compressors. In this brief, the number of the approximate 4-2 compressor’s outputs is innovatively reduced to one, which brings further improvements in the energy-efficiency. This Design is implemented using Verilog HDL and simulated by Modelsim 6.4 c and synthesized by Xilinx tool.

Economic efficiency principles for architectural and space-planning design of vertical farms

The paper highlights use of the economic efficiency principles group during construction and architectural planning of vertical farms. Even though vertical farming is a more efficient and sustainable approach to agro-industry than convenient farming, this method requires significant capital for building and operation. To overcome these shortcomings, the paper describes methods of implementing project solutions that can increase the economic feasibility from architectural perspective. The authors divided the principles group into three main ones: the principle of completion from without, the principle of economy and saving resources, and the principle of saving time and space.
 The basis of the first principle consists of diverse techniques for increasing the system’s stability and adaptability to unpredictable external and internal changes. For this purpose, it is recommended to implement such solutions as poly-functionality of the building, its openness to the public, space-planning and structural flexibility, and dispersal of engineering networks.
 The main purpose of the second principle is the overall increase in energy efficiency and in building and production sustainability. It is determined that the most appropriate techniques of this principle are: a variable approach to design process with implementation of different comparison methods for architectural solutions; quality assessment of project decisions, using functional-cost analysis, LCA, LCC, and qualimetry; sustainable methods integration for energy and production resources restoration; application of energy efficiency architecture methods.
 The principle of saving time and space is fundamental for maintaining the main labor and production resources, which is a way to minimize areas, construction resources, and labor costs for construction and production. This principle is the key to a general reduction in the cost of agro-industrial products production, and therefore reducing its cost on the market. Hence, it leads to stabilization and reduction of price, and product accessibility to the consumer.

An in-memory computing architecture based on a duplex two-dimensional material structure for in situ machine learning.

The growing computational demand in artificial intelligence calls for hardware solutions that are capable of in situ machine learning, where both training and inference are performed by edge computation. This not only requires extremely energy-efficient architecture (such as in-memory computing) but also memory hardware with tunable properties to simultaneously meet the demand for training and inference. Here we report a duplex device structure based on a ferroelectric field-effect transistor and an atomically thin MoS2 channel, and realize a universal in-memory computing architecture for in situ learning. By exploiting the tunability of the ferroelectric energy landscape, the duplex building block demonstrates an overall excellent performance in endurance (>1013), retention (>10 years), speed (4.8 ns) and energy consumption (22.7 fJ bit-1 μm-2). We implemented a hardware neural network using arrays of two-transistors-one-duplex ferroelectric field-effect transistor cells and achieved 99.86% accuracy in a nonlinear localization task with in situ trained weights. Simulations show that the proposed device architecture could achieve the same level of performance as a graphics processing unit under notably improved energy efficiency. Our device core can be combined with silicon circuitry through three-dimensional heterogeneous integration to give a hardware solution towards general edge intelligence.

Empirical analysis of machine learning-based energy efficient cloud load balancing architectures: a quantitative perspective

Design of energy efficient load balancing models in cloud environments requires in-depth analysis of the cloud architecture and nature of requests served by the cloud. Depending upon these parameters, machine learning models are designed which aim at assigning best possible resource combination to serve the given tasks. This assignment varies w.r.t. multiple task and cloud parameters; which include task time, virtual machine (VM) performance, task deadline, energy consumption, etc. In order to perform this task, a wide variety of algorithms are developed by researchers cloud designers. Each of these algorithms aim at optimizing certain load balancing related parameters; for instance, a Genetic Algorithm (GA) designed for optimization of VM utilization might not consider task deadline before task allocation to the VMs. While, algorithms aimed at performing deadline aware load balancing might not provide effective cloud-to-task-mapping before allocation of tasks. Thus, it becomes difficult for researchers to select the best possible algorithms for their cloud deployment. In order to reduce this ambiguity, the underlying text compares different energy efficient cloud load balancing algorithms; and evaluates their performance in terms of computational complexity, and relative energy efficiency. This performance evaluation is further extended via inter architecture comparison; in order to evaluate the most optimum load balancer implementation for a given energy efficient application. Thus, after referring this text, researchers and cloud system designers will be able to select optimum algorithmic implementations for their given deployment. This will assist in reducing cloud deployment delay, and improving application specific load balancer performance.

Energy efficient ternary computation unit using differential spin Hall effect MRAM

Recent advances in quantized neural networks (QNNs) have paved the way for energy efficient hardware architectures for machine learning tasks. Binary and ternary QNNs are suitable for image classification and recognition applications on highly resource constrained hardware. Binary neural networks have low precision thus suffer a significant accuracy loss for dense networks and large datasets. This issue can be resolved through ternary neural networks (TNNs) with higher weight precision and better resource utilization. TNN implementation using conventional complementary metal oxide semiconductor and memristive devices show limited improvement in area and energy efficiency. Spintronics based magnetic random access memory (MRAM) devices are the most prominent choice amongst the various non-volatile memories for neural networks. This work presents the implementation of differential spin Hall effect (DSHE) MRAM-based two and three input ternary computation units (TCUs) for TNN. Furthermore, a multilayer perceptron architecture with synaptic crossbar array using the proposed TCU is implemented for Modified National Institute of Standards and Technology data classification. The results show that DSHE-based TCU is 30% more energy efficient as compared with spin-transfer torque (STT)-MRAM based design. Furthermore, DSHE-MRAM based TNN shows improvement in energy and area by 82% and 9%, respectively, when compared to STT-based TNN.

Methods For The Formation Of Energy-Efficient Architecture Of Social Objects In World Design Practice

Today, people are increasingly drifting away from nature in an age of accelerated lives and information technology. Only the natural environment can create comfortable, ecological conditions for human life. It has become evident that the biological component of the domain has been noticeably reduced in the big cities, and the appeal to the global architectural community of the ecological and aesthetic aspects of design and construction, which contribute to the comfortable and sustainable development of urban space, has become particularly relevant over the past decades. In a big city, architecture is omnipresent. Hence, the architectural-spatial environment should be solved as much as possible in the context of the natural environment, embodying not only the material needs of a person but also spiritual ones. The current unfavorable environmental, energy, and economic situation in the world requires new methods for designing and building the architecture of new and reconstructed old buildings. The article discusses the issues surrounding the formation of modern energy-efficient architecture in the context of its relationship with the natural environment through the use of modern design solutions. The article is based on surveys of social facilities made by the authors from 2017 to 2021 in Eurasian and European cities. The article analyzes a new mechanism of architectural formation based on the shape formation of an architectural object, the content of the architectural shape, the aesthetics of perception, and the organization of eco-space.