Emitter Rear Research Articles

Interfacial energy-band engineering for high open-circuit voltage of rear emitter p-type crystalline silicon solar cells

Rear emitter p-type crystalline silicon (c-Si) tunnel oxide passivating contact (P-TOPCon) devices with low-resistivity (≤1 Ω.cm) c-Si wafer and high-conductivity phosphorus doped (n-type) polysilicon passivating contact (n-poly-Si PC) are expected to achieve high built-in potential (Vbi) and thus open-circuit voltage (Voc). However, the results indicate that the high conductivity of n-poly-Si PC considerably deteriorates the interface passivation quality and lowers the device's Voc. A crucial factor to consider is that the hole and electron can tunnel and recombine together at the c-Si/n-poly-Si PC contact, resulting in a decrease in the quality of interfacial passivation. To inhibit carrier tunnel diffusion and enable energy band engineering at the interface for achieving high Voc, a thin intrinsic poly-Si buffer layer (10 nm) is inserted between SiO2 and n-poly-Si PC. When compared to a device without a buffer, a device with the buffer exhibits a significant improvement in passivation quality and hence Voc. The device with buffer has a Voc of 705 mV and an efficiency of 23.5 %, while that without buffer is 681 mV and 22.6 %, respectively. The introduced buffer has little effect on the industrial manufacturing process, but it does significantly enhance Voc. It has the potential to improve the efficiency of the P-TOPCon devices.

Toward Highly Efficient Low‐Carbon Footprint Solar Cells: Impact of High‐Temperature Processing on Epitaxially Grown p‐Type Silicon Wafers

Conventional silicon (Si) wafers are produced by energy‐intensive ingot crystallization which is responsible for a major share of a solar cell's carbon footprint. This work explores Si epitaxially grown silicon wafers (EpiWafers) that are produced by direct epitaxial deposition of trichlorosilane on a reusable substrate. This approach requires less energy and material and hence offers a potential for reduced cost and carbon footprint. Solar cells made from EpiWafers usually suffer from efficiency losses due to recombination at structural crystal defects associated with epitaxial growth. The nature of these defects is investigated and defects at the EpiWafer's back surface are critical. Most of these defects are highly recombination‐active, pairwise‐connected misfit dislocations in the <110> direction. They originate from a lattice mismatch between the highly doped substrate and the less‐doped epitaxially grown layer. In this contribution, the detrimental impact of these defects can be mitigated using typical manufacturing processes of high‐efficiency solar cells, such as KOH etching, gettering, and oxidation. Local minority charge carrier lifetimes as high as 2.2 ms after industrially feasible processes are reported. Simulations using efficiency‐limiting bulk recombination analysis implies that the material would allow conversion efficiencies of up to 25.6% considering tunnel oxide‐passivated contact acting as rear emitter solar cell design.

Beyond 25% efficient crystalline silicon heterojunction solar cells with hydrogenated amorphous silicon oxide stacked passivation layers for rear emitter

Hydrogenated amorphous silicon oxide (a-SiOx:H) alloy is considered as a promising alternative to hydrogenated amorphous silicon (a-Si:H) in crystalline silicon heterojunction (SHJ) solar cells due to its reduced parasitic absorption induced by the incorporation of oxygen. However, the large valence band offset (ΔEV) between a-SiOx:H and crystalline silicon (c-Si) usually leads to low fill factor (FF) for the solar cells. Here, we designed a trilyer a-SiOx:H(i) stacked passivation scheme underneath the rear emitter (p) for the SHJ solar cell on n-type c-Si wafer via depositing the a-SiOx:H(i) layers with different oxygen contents by plasma-enhanced chemical vapor deposition (PECVD). Highly efficient SHJ solar cells with the average efficiency of 25.37% were obtained by optimizing the trilayer a-SiOx:H(i) passivation structure with an oxygen-rich layer inserted between two oxygen-less layers. Comparing to the solar cells with complete a-Si:H passivation layers, higher short-circuit current density (JSC) and open-circuit voltage (VOC) of the solar cells were achieved, which indicated excellent passivation and low parasitic absorption contributed from the a-SiOx:H(i) stacked layers. At the same time, FF of the solar cells was also increased slightly. The corresponding improvement mechanisms were analyzed carefully. As a demonstration, the highest efficiency of the SHJ solar cells passivated by the trilayer a-SiOx:H(i) scheme for rear emitter was up to 25.44%.

Application of n‐Polysilicon Rear Emitter for High‐Efficiency p‐TOPCon Solar Cells

AbstractThis study entails the examination of tunnel oxide passivated contact on p‐type silicon wafers (p‐TOPCon) passivated with n‐polysilicon for a solar cell by using Quokka‐3, a numerical simulation program. The effects of the thickness, bulk lifetime, resistivity, and selectivity of charge carriers due to the polysilicon passivated contact are investigated. Through such n‐polysilicon passivated contact, the back‐emitter solar cells engender higher internal power owing to enhanced surface passivation. This further reduces the shading loss due to front metallization; however, the reduced minority carrier lifetime of the p‐type Czochralski (Cz) wafer restricts the possibilities for high efficiency. Subsequently, the minority charge carrier lifetime of the p‐type wafer conceivably becomes an obstacle to realizing TOPCon solar cells with a high conversion efficiency. This study demonstrates that a configuration suitable for the industrial manufacturing of high‐efficiency solar cells is a crystalline silicon solar cell on a p‐type wafer through a rear‐emitter n‐polysilicon passivated contact. A roadmap toward 24.87% of the p‐TOPCon solar cells through the n‐type polysilicon passivated contact is also devised.

Epitaxially Grown p‐type Silicon Wafers Ready for Cell Efficiencies Exceeding 25%

Combining the advantages of a high‐efficiency solar cell concept and a low carbon footprint base material is a promising approach for highly efficient, sustainable, and cost‐effective solar cells. In this work, we investigate the suitability of epitaxially grown p‐type silicon wafers for solar cells with tunnel oxide passivating contact rear emitter. As a first proof of principle, an efficiency limiting bulk recombination analysis of epitaxially grown p‐type silicon wafers deposited on high quality substrates (EpiRef) unveils promising cell efficiency potentials exceeding 25% for three different base resistivities of 3, 14, and 100 Ω cm. To understand the remaining limitations in detail, concentrations of metastable defects Fei, CrB and BO are assessed by lifetime‐calibrated photoluminescence imaging and their impact on the overall recombination is evaluated. The EpiRef wafers’ efficiency potential is tracked along the solar cell fabrication process to quantify the impact of high temperature treatments on the material quality. We observe large areas with few structural defects on the wafer featuring lifetimes exceeding 10 ms and an efficiency potential of 25.8% even after exposing the wafer to a thermal oxidation at 1050 °C.

Utilization of CaF2/ITO Double‐Layer Anti‐Reflective Coating for Increasing the Efficiency in Rear Emitter SHJ Solar Cells

AbstractA method to minimize optical losses in the front side of rear emitter silicon heterojunction (SHJ) solar cells by applying double‐layer antireflection coating (DLARC) has been examined. The primary aim is to increase the short circuit current density (Jsc) using DLARC that is associated with the cell's absorbance. The optical and electrical properties of single‐layer antireflection coating (SLARC) are studied and compared with calcium fluoride (CaF2)/Indium tin oxide (ITO) DLARC.OPAL 2 is utilized as a simulation tool to increase the optical properties of CaF2/ITO DLARC, and the experimental result verifies its validity. ITO is deposited using sputter system while thermal evaporator is utilized to deposit CaF2 to make DLARC. The SHJ solar cell having DLARC demonstrates the average reflection of 6.55% which is 31.7% less than SLARC, that is 9.59% for the wavelength range of 300 to 1100 nm. The fabricated textured solar cell with CaF2/ITO DLARC shows enhancement in external quantum efficiency from 76.89% to 81.06%. It also indicates an improvement in Jsc to 40.83 mA cm‐2 from 39.91 mA cm–2 and having a conversion efficiency of >21% when compared with that of ITO SLARC.

Influence of Al2O3/IZO double-layer antireflective coating on the front side of rear emitter silicon heterojunction solar cell

Transparent conductive oxide (TCO) thin films play a significant role in silicon heterojunction (SHJ) solar cell and perform both as antireflection coating (ARC) and carrier transport layer. Indium zinc oxide (IZO) films have attracted much attention in opto-electronic industry as an alternative TCO material owing to their superior optical and electrical characteristics as compared to conventionally used indium tin oxide (ITO) films. The optical and electrical properties of IZO films were studied and compared with ITO films. Moreover, the dielectric layer of Al2O3 was deposited on the IZO films using an atomic layer deposition (ALD) system to prepare a double layer antireflection coating (DLARC) structure. The wafer ray tracer simulation tool was used to optimize the thickness of Al2O3/IZO DLARC for SHJ solar cells and experimental results showed its validation. The performance of Al2O3/IZO DLARC on the front surface of rear emitter SHJ solar cell recorded to increase in the current density of 1.37% with enhancement in the efficiency of 0.8%, showing noticeable improvement as compared to cell fabricated with single-layer IZO film.

Optimization of Tunnel‐Junction for Perovskite/Tunnel Oxide Passivated Contact (TOPCon) Tandem Solar Cells

A systematic study of the formation of the tunnel‐junction for perovskite/TOPCon tandem solar cells is presented, which consists of a B‐doped poly‐Si (p+‐poly‐Si) and P‐doped poly‐Si (n+‐poly‐Si) double‐layer structure. The rear emitter double‐side TOPCon solar cell is selected as the bottom cell in tandem solar cells, where a p+‐poly‐Si/SiOx forms the rear emitter and an n+‐poly‐Si/SiOx forms the front field with the poly‐Si layer deposited by plasma‐enhanced vapor deposition (PECVD) and crystallized in a furnace. The tunnel‐junction is formed by depositing an additional B‐doped a‐Si:H (p+‐a‐Si:H) on the front n+‐poly‐Si and following a rapid thermal anneal (RTA) to partially crystallize the p+‐a‐Si:H with minimized interdiffusion of B and P. The tunnel‐junction is systematically optimized and it is found that the RTA process at 700 °C produces the optimized tunnel‐junction with the minimal contact resistivity of ≈16 mΩ cm2. The tunnel‐junction formation affects the passivation of the front field TOPCon, but the losses in the passivation quality can be recovered by a forming gas annealing. This process provides a simple and useful method for making the tunnel‐junction in perovskite/TOPCon tandem solar cells.

Analysis of a point-contact BC-BJ silicon solar cell by three-dimensional numerical simulations

The design of optimized and efficient solar cells is a key factor for the future development of the photovoltaic (PV) technology. This paper focuses on three-dimensional (3D) modeling of a Back Contact-Back Junction (BC-BJ) crystalline silicon (c-Si) solar cells featuring a point contact (PC) scheme in the rear emitter region in order to optimize the efficiency with respect to the use of a conventional linear contact (LC) pattern. A 3D model has been built to ensure a good accuracy in the simulation of the considered solar cell structures. The developed model includes a proper modeling of the series resistance effects related to the implemented contact pattern. The TCAD Sentaurus software provided by Synopsys has been adopted to perform comparative simulations between the considered PC BC-BJ solar cell and its LC counterpart. Our simulation results prove that the adoption of a PC scheme in the emitter region of a BC-BJ solar cell is beneficial to boost its efficiency (up to 22.43%) with respect to the conventional LC cell, while keeping lower the contacted fraction of the emitter region.

Band-offset reduction for effective hole carrier collection in bifacial silicon heterojunction solar cells

Bifacial silicon heterojunction (SHJ) solar cells are gaining popularity owing to their potential for high performance. To achieve bifacial illumination, wide-gap hydrogenated nanocrystalline silicon oxide (nc-SiOx:H) materials are used as front and rear surface fields, which significantly enhance the light absorbed into the cells. In this study, we reduced the band offset at the p/i interface of bifacial SHJ solar cells using an ultra-thin buffer layer of hydrogenated amorphous silicon oxide (a-SiOx:H) to increase the efficiency of hole carrier transport and collection. Effectively, we were able to enhance the open-circuit voltage (Voc) and fill factor (FF) by 0.97% and 9.59%, respectively. These results were confirmed through experimental procedures and simulations. Subsequently, the experimental efficiency with respect to the bifacial illumination of a rear emitter silicon heterojunction solar cell was increased by 23.6%, with a Voc of 729 mV, FF of 80%, and short-circuit current density of 40.5 mA/cm2.

Microcrystalline Silicon Tunnel Junction for Monolithic Tandem Solar Cells Using Silicon Heterojunction Technology

In this article, we developed a microcrystalline silicon tunnel junction to be used as a tunnel recombination junction between a large-gap top cell and a silicon heterojunction bottom cell, in a monolithic tandem integration. This junction is composed of a p-type layer on the top of an n-type layer, deposited by plasma-enhanced chemical vapor deposition at low temperature (200 °C). Microcrystalline phase percentage was controlled with Raman spectroscopy and ellipsometry measurements. The total stack has a thickness of 40 nm and an average conductivity around 10 S/cm. Minority carrier lifetime measurements showed an improvement of the field effect and the passivation with the addition of this junction on top of silicon heterojunction solar cells. Moreover, implementation of microcrystalline layer on top of reference rear emitter silicon heterojunction solar cells improved the fill factor and did not induce parasitic absorption above 700 nm. Simple test structures were fabricated in order to characterize the tunnel junction and optimize it. Then, we carried out dark temperature-dependent I-V measurements on those test structures and observed peaks and valleys, characteristic of the junction tunnel behavior. The developed tunnel junction shows low contact resistivity and activation energies; these are promising results for the complete integration on the tandem device.

Optimization of Front Diffusion Profile in Bifacial Interdigitated Back Contact Solar Cell

The diffusion profiles of the front floating emitter (FFE) and front surface field (FSF) in a bifacial interdigitated back contact solar cell are optimized. The optimization results revealed that the FFE and FSF schemes are beneficial for enhancing the cell performance at the front and rear sides, respectively. Lighter doping is particularly better for the FSF scheme, and the FFE scheme requires a large diffusion depth for improving the performance. Increasing the area of the rear emitter boosts the performance of the cell, and an FFE scheme with 90% rear emitter area is found to be the best design. Quantum efficiency mapping demonstrated that the FFE scheme suppresses the loss at the back surface field region, thereby enhancing the performance of the total cell. The FSF scheme improves the quantum efficiency for the entire region by enhancing the carrier transport in the vertical direction. Furthermore, loss analysis revealed that the FFE scheme suppresses the recombination loss at the maximum power point, which is an important advantage over the FSF scheme.

Direct nanoscale mapping of open circuit voltages at local back surface fields for PERC solar cells

The open circuit voltage (VOC) is a critical and common indicator of solar cell performance as well as degradation, for panel down to lab-scale photovoltaics. Detecting VOC at the nanoscale is much more challenging, however, due to experimental limitations on spatial resolution, voltage resolution, and/or measurement times. Accordingly, an approach based on Conductive Atomic Force Microscopy is implemented to directly detect the local VOC, notably for monocrystalline Passivated Emitter Rear Contact (PERC) cells which are the most common industrial-scale solar panel technology in production worldwide. This is demonstrated with cross-sectioned monocrystalline PERC cells around the entire circumference of a poly-aluminum-silicide via through the rear emitter. The VOC maps reveal a local back surface field extending ~ 2 μm into the underlying p-type Si absorber due to Al in-diffusion as designed. Such high spatial resolution methods for photovoltaic performance mapping are especially promising for directly visualizing the effects of processing parameters, as well as identifying signatures of degradation for silicon and other solar cell technologies.

Sputtered indium tin oxide as a recombination layer formed on the tunnel oxide/poly-Si passivating contact enabling the potential of efficient monolithic perovskite/Si tandem solar cells

We focus on utilizing sputtered indium tin oxide (ITO) as a recombination layer, having low junction damage to an n-type silicon solar cell with a front-side tunnel oxide passivating electron contact, thereby enabling the development of a high efficiency monolithic perovskite/Si tandem device. High transparency and low resistivity ITO films are deposited via low power DC magnetron sputtering at room temperature onto a front-side thin SiOx/n+ poly-Si contact in a complete Cz n-Si cell with a back-side Al2O3/SiNx passivating boron-diffused p+-emitter on a random pyramid textured surface. We report the cell characteristics before and after ITO sputtering, and we find a cure at 250 °C in air is highly effective at mitigating any sputtering induced damage. Our ITO coated sample resulted in an implied open-circuit voltage (iVoc) of 684.7 ± 11.3 mV with the total saturation current density of 49.2 ± 14.8 fA/cm2, an implied fill factor (iFF) of 81.9 ± 0.8%, and a contact resistivity in the range of 60 mΩ-cm2 to 90 mΩ-cm2. After formation of a local Ag contact to the rear emitter and sputtered ITO film as the front-side contact without grid fingers, the pseudo-efficiency of 20.2 ± 0.5% was obtained with the Voc of 670.4 ± 7 mV and pseudo FF of 77.3 ± 1.3% under simulated one sun with the calculated short-circuit current density of 30.9 mA/cm2 from the measured external quantum efficiency. Our modelling result shows that efficiency exceeding 25% under one sun is practically achievable in perovskite/Si tandem configuration using the ITO recombination layer connecting a perovskite top cell and a poly-Si bottom cell.

Review of Rear Emitter Silicon Heterojunction Solar Cells

This inclusive study provides detailed information regarding the evolution of rear emitter silicon heterojunction solar cells. Silicon heterojunction (SHJ) solar cells of a p-type on the rear side have garnered increasing attention for various reasons. First, owing to a limitation of the p-type hydrogenated amorphous silicon layer, further optimization relative to an n-type cannot be achieved, and an accumulation of electrons at the front side allows utilizing an n-type wafer to affirm a lateral current transport. Second, better thin n-type nanocrystalline silicon (oxide) contact layers compared to p-type wafers are grown, and allow greater freedom in the structural design. The optical properties of the front side’s transparent conductive oxide (TCO) layer can be emphasized owing to a lateral transport on the cells, and majority of the carriers are affirmed through a Si substrate. In the instance of a rear emitter, the TCO layer is in relief to an adjustment inhibiting the contact resistance between TCO/a-Si:H(p). The fabrication was done in such a manner of SHJ rear emitter solar cells that they achieve greater optimization and overall efficiency of 23.46%.

Cost-Effective Thin n-type Silicon Solar Cells with Rear Emitter

Abstract The silicon solar cells achieved relatively low prices in the last years and to introduce a new structure in the PV industry, the amount of silicon per watt has to be reduced, requiring a cost-effective manufacturing process. The use of n-type solar grade silicon has the advantages of presenting higher minority carrier lifetime than p-type one and the absence of the boron-oxygen defects. The aim of this paper is to present the development of 100 μm thick n+np+ silicon solar cells with a selective p+ rear emitter formed by boron deposited by spin-on and an Al/Ag grid deposited by screen-printing. The firing temperature of Ag/Al (rear face) e Ag (front face) was optimized and the temperature of 840 °C produced the devices with higher efficiency. The solar cells presented efficiencies of 16%, achieving a low silicon consumption of 1.6 g/W, 40% lower than thick p-type devices produced by the same process.

Bifacial n-type silicon solar cells with selective front surface field and rear emitter

To meet the challenge that Si wafer based industrial n-type solar cells are more complicated to manufacture as compared to producing p-type Si solar cells, a simplified cell fabrication process to make n-type silicon solar cells has been developed in which boron-doped rear emitter and phosphorus-doped front surface field (FSF) are formed in one high-temperature step. By adding a selective FSF structure the conversion efficiency of the n-type solar cells can be further improved. Our proposal enables the doping concentration of the emitter and the FSF to be adjustable independently without affecting the ohmic contacts on both sides. A champion batch conversion efficiency of 22% was obtained by optimizing the contact ratio of the emitter and thermal drive-in duration.

Theoretical investigation of transparent front surface field layer on the performance of heterojunction silicon solar cell

In order to couple more light in absorber layer of a silicon heterojunction (SHJ) solar cell, higher optical transparency of the front layer is desirable. In that respect we investigated indium tin oxide (ITO) as a front surface field (FSF) layer in a rear emitter SHJ solar cell. We used numerical simulation starting from an experimentally obtained real solar cell. In the experimental cell the n-type nanocrystalline silicon (n-ncSi:H) was used as the FSF, where the power conversion efficiency (PCE) of the reference cell was 21.84%. Our investigation shows that if 20 nm thick ITO is used as the FSF, the PCE of the device can be 25.67%, while with an 80 nm thick ITO as FSF, the PCE can be 23.8%. This improvement in the device efficiency primarily comes with the increase in current density in the solar cell due to an increased intensity of light in the absorber layer.

An industrially viable TOPCon structure with both ultra-thin SiOx and n+-poly-Si processed by PECVD for p-type c-Si solar cells

We report an industrial compatible tunnel oxide passivated contact (TOPCon) structure on solar-grade p-type c-Si wafer as the rear emitter for high-efficiency solar cells, where the ultrathin silicon oxide (SiOx) is made by plasma-assisted oxidation and the P-doped n-type poly-Si (n+-poly-Si) contact layer by plasma-enhanced chemical vapor deposition (PECVD) of hydrogenated amorphous silicon (a-Si:H) with in-situ doping with PH3 and following the high-temperature annealing. The fabrication processes of SiOx and n+-poly-Si layers are systematically optimized. It is found that the optimized annealing temperature for the crystallization and dopant activation is in the range of 850 °C and 880 °C, which is higher than the similar structure with chemically oxidized SiOx (820 °C). In addition, the samples made with higher PH3/SiH4 doping ratio during the a-Si:H deposition need a lower annealing temperature to reach the similar dopant distribution within the samples made with lower doping ratio but annealed at higher temperature, it means that the optimized annealing temperature decreases with the increase of the PH3/SiH4 doping ratio during the deposition of a-Si:H precursor. The optimized process with post-hydrogenation yields excellent surface passivation on the p-type Si substrate with the implied open-circuit voltage (iVoc) of ∼742 mV, the single-side saturated recombination current density (J0) of ∼3.0 fA/cm2, the contact resistivity (ρc) of ∼2–4 mΩ cm2, and the effective minority carrier lifetime (τeff) of ∼1050 μs (Δn = 1 × 1015 cm-3). With these passivation parameters, a simulation study demonstrates the advantage of rear emitter over the conventional front emitter TOPCon solar cell with ∼22.8% achievable efficiency on solar-grade p-type wafers with current industrial constraints, and ∼24.9% on high quality p-type c-Si wafers with the optimized conditions in R&D laboratories. Our study suggests that the p-type c-Si solar cell with a rear n+-poly-Si TOPCon emitter is a viable structure for high-efficiency solar cell production.

Investigation of p-type nanocrystalline silicon oxide thin film prepared at various growth temperatures

Abstract Substrate temperature has an important role on the characteristic properties of a plasma deposited thin film silicon. In a heterojuction (HJ) solar cell, the higher deposition temperature initiates unwanted thermal diffusion of atom from one layer to another, thereby degrading device characteristics. Hence, we investigated the effect of substrate temperatures (Ts) on p-type material and HJ device characteristics. We prepared p-type nanocrystalline silicon oxide (p-nc-SiO:H) layer at different Ts, varying from 170 °C to 80 °C and observed that its opto-electronic properties improve at a lower Ts. These p-nc-SiO:H were used in HJ solar cell as emitter and we found that the film prepared at 80 °C gives the best result. This emitter layer shows wide optical gap (2.32 eV), high electrical conductivity (3.5 S/cm) and high crystallinity (44%). In the rear emitter HJ solar cells, an improvement in fill factor from 72.2% to 74.5%, open circuit voltage from 708 mV to 718 mV and power conversion efficiency (PCE) from 19.3% to 20.1% was observed when the emitter of the cells was prepared at 170 °C–80 °C.