Electron Beam Proximity Effect Research Articles

Fabrication of a Photomask Containing Ultra-Fine Patterns of less than 100 nm through the Process Optimization of Electron Beam Lithography

This study aims to develop an electronic beam lithography processing technique with the best pattern resolution among top-down machining methods and apply it to manufacture nanoscale structures. When electron beams enter a substrate with highly dense patterns, a pattern distortion occurs due to the electron beam proximity effect caused by the scattering of electron beams reaching the pattern region under the substrate. A silicon nanomold of line width 50 nm was produced and the pattern uniformity was satisfied within the tolerance range through a proper correction of the electron beam proximity effect. In addition, a photo mask with ultra-fine patterns of diameter less than 100 nm was manufactured for use in the semiconductor exposure process using the correction method of the electron beam proximity effect and innovative methods involving liftoff processes.

Highly scalable resistive switching memory in metal nanowire crossbar arrays fabricated by electron beam lithography

Resistive switching memories (RRAMs) based on oxides are promising nonvolatile memories with numerous advantages in cell structure, switching speed, operation power, and fabrication process. To promote practical application, however, the scalability issue of RRAMs should be investigated. In this work, the maskless electron beam lithography (EBL) was used to fabricate very small structures in the electron beam resist layer, which were subsequently transferred to a metal and oxide film by the lift-off process. Metal nanowires with a minimum width of 9 nm and arrays with such nanowires were fabricated by optimizing the pattern design and by correcting the electron beam proximity effect. By combining three processes of EBL, film deposition, and lift-off, Ti/HfO2/Pt-based RRAM devices with a minimum size of 10 nm integrated into a crossbar array were successfully fabricated. The fabricated devices exhibit good memory performance, including low operation voltage, good endurance, retention, uniformity, and scalability.

New types of dose distributions for vertical sidewall minimizing total dose in 3-D electron-beam proximity effect correction of nanoscale features

The spatial dose distribution across a feature, derived by a conventional 2-D proximity effect correction scheme, is a “V-shape,” i.e., higher dose closer to edges. With such a dose distribution, it is extremely difficult to realize a vertical sidewall in the resist profile for nanoscale features while reducing the critical dimension (CD) error. In this paper, it is shown that, in order to achieve a vertical sidewall of nanoscale feature with the minimum total dose, a dose distribution of a shape other than the V-shape must be used. This is due to the fact that the lateral development of resist becomes comparable to the vertical development for nanoscale features and the exposure varies along the depth dimension with high and low contrasts at the top and bottom layers of resist, respectively. Based on these characteristics, new types of dose distributions, i.e., “M-shape” and “A-shape,” have been derived to achieve a target resist profile of a vertical sidewall while minimizing the total dose. The simulation results show that the new dose distribution types lead to a more vertical sidewall, a smaller CD error, and a lower total dose.

Easy to adapt electron beam proximity effect correction parameter calibration based on visual inspection of a “Best Dose Sensor”

The quality of e-beam proximity effect correction depends on the quality of the proximity effect model parameters, which are not accessible to direct measurement. Monte Carlo simulation is capable of determining the electron scattering coefficients, but does not include the process induced effects such as resist blur. Therefore, various experimental methods have been suggested (Stevensat et al. (1986) [1]; Rishton and Kern (1987) [2]; Hudek (2006) [3]). Most are either highly labor intensive due to a large required number of critical dimension measurements, or simple in the experimental evaluation, but limited in accuracy (Babin and Svintsov (1992) [4]), since resist effects interfere with the evaluation criterion.This paper presents an easy to adapt experimental calibration method based on visual inspection of a “Best Dose Sensor”, and its application to calibrate long- and mid-range effects.

Implementation of electron beam grey scale lithography and proximity effect correction for silicon nanowire device fabrication

An electron beam lithography exposure strategy combining efficient proximity effect correction (PEC) with multi-pass grey scale is compared with a more conventional strategy based on a single-pass exposure without PEC. Exposure results for different types of nanowire structures are presented. Line edge and line width roughness (LER and LWR) values for both approaches are determined. The novel exposure strategy presented in this work reduced LER by ∼25% and LWR by ∼40%.

Electron beam and optical proximity effect reduction for nanolithography: New results

Proximity effect correction by dose modulation is widely practiced in electron-beam lithography. Optical proximity control is also possible using a combination of shape adjustment and phase control. Assigning “the right” dose (or fill factor and phase for optics) is a well known mathematical inverse problem. Linear programming, by definition, is the appropriate method for determining dose. In the past, the technique was too slow for full-scale implementation in mask making. Here, the authors discuss how recent developments in computer speed and architecture have improved the prospects for full-scale implementation. In addition, the authors discuss some numerical techniques, analogous to gridding and relaxation, that make linear programming more attractive in mask making.

New Electron Beam Proximity Effects Correction Approach for 45 and 32 nm Nodes

After the successful results obtained these last years, electron beam direct write (EBDW) lithography use for integrated circuit manufacturing has now been demonstrated. However, throughput and resolution capabilities need to be improved to push its interest for fast cycle production and advanced research and development applications. In this way, the process development needs good patterns dimensional accuracy, i.e., a better control of the proximity effects caused by back scattering electrons and others phenomenon. It exists several methods to provide a correction for these effects and the most commonly used is based on dose modulation. However it has been observed that this correction is not perfect and can significantly fail to accurately correct the smallest and most dense structures encountered in sub 65 nm design features. To continue reducing feature sizes a method to provide a complementary correction to the dose modulation solution is proposed. Based upon detailed characterization of the observed effects a rules correction scheme has been developed not dissimilar to the rule based corrections used in optical proximity correction (OPC). This rule based electron beam proximity correction, or R-EBPC, provides good results down to 40 nm, with improvements in critical dimension (CD) linearity, the isolated dense bias, line end shortening and the energy latitude. All of which leads to an improvement in the overall accuracy of the design, and furthermore an improvement in the process window.

Magnetic nanowires patterned in the La 2/3Sr 1/3MnO 3 half-metal

Bridge-shaped magnetic nanowires have been designed and patterned in half-metallic La 2/3Sr 1/3MnO 3 thin films, using a thick negative-tone electron beam lithography (EBL) process. EBL was performed in the high resolution hydrogen silsesquioxane (HSQ) inorganic resist. This paper reports on the optimization of EBL, for which both electron beam proximity effects and pre-bake annealing temperatures have been studied. To take benefit of the proximity effects, a special bridge geometry is proposed. Hundred nanometre-wide nanowires with large aspect ratio (⩾2) have been successfully patterned and transferred in LSMO.

High-throughput, high-spatial-frequency measurement of critical dimension variations using memory circuits as electrical test structures

Critical dimension (CD) errors are traditionally specified and characterized without reference to their spatial frequency spectra. However, a given amplitude of CD variation can have very different consequences depending on its spectrum. CD errors whose variation is over a few micrometers can be much more serious than those of the same magnitude that extend over several chips. Existing CD metrology tools, such as scanning electron microscopy or electrical resistance measurements, are seldom used to characterize these short-range CD variations, particularly those with spatial wavelengths below 100 μm, because of the large amount of data required and the difficulty of collecting data in such a dense grid. We report a new method of measuring CD variations using static random-access memory (SRAM) circuits in which direct measurements of bit-line currents reveal the individual transistor gate length variations within each memory cell. With the compactness and regularity of the SRAM layout we can measure CD variations with spatial periodicities down to 6 μm. By repeatedly measuring each cell in a memory chip and recording the corresponding currents we can achieve sufficient data to minimize noise, and through two-dimensional bandpass filtering 0.2 nm CD variations can be detected. Two designs of 4 Mbit SRAMs fabricated using 250 nm design rules were studied. The resulting CD variations yielded spectra that were dominated by peaks whose origins included uncorrected electron beam and optical proximity effects. Pattern-independent variations ascribable to the reticle generator itself appeared to contribute only a small fraction of the total error observed.

Accuracy and efficiency in electron beam proximity effect correction

We present a suite of electron beam proximity effect correction algorithms which incorporate elements of various shape-to-shape techniques as well as field-based techniques. They are applied to a set of prototypical pattern data at simulated electron beam exposure conditions ranging from 25 to 100 keV on bulk substrates. The results are compared in terms of correction accuracy and computational efficiency. In addition, we show how these algorithms, when used in combination with one another, can be applied to hierarchical pattern design data such that the correction can be obtained with a high degree of accuracy without requiring unnesting of the hierarchy.

Dose, shape, and hybrid modifications for PYRAMID in electron beam proximity effect correction

As the dimensions of circuit primitives are reduced, the proximity effect becomes an increasingly important limiting factor in the fabrication of high density integrated circuits using electron beam (e-beam) lithography. In the past, proximity effect correction schemes have in general utilized one of two different approaches: dose or shape modification. Previously, PYRAMID, a hierarchical, rule-based proximity effect correction scheme which has been demonstrated to be able to correct circuit patterns with a minimum feature size of 0.1 μm was successfully presented. Although PYRAMID has been implemented with a pattern shape modification technique, its correction algorithms are not limited to this approach. In this article, the two approaches are compared in details in terms of CD error (edge placement error) and edge contrast, using the two corresponding versions of PYRAMID. A hybrid approach, i.e., combination of dose and shape modifications, is also considered.

Enhancing a hierarchical, parallel electron beam data conversion processor toward 1 Gbit memory lithography

A new hierarchical, parallel electron beam (EB) data conversion system has been developed to be used in lithography for the fabrication of memories of 1 Gbit or more. The conversion system has been enhanced not only to meet EB writing requirements but also to cover new data processing capabilities required for critical dimension control and for optical resolution enhancement. The conversion system takes full advantage of the hierarchical, parallel technique and generates patterns for various EB lithography systems, including the EX-8 mask writing system, EX-8D wafer direct writing system, and MC-100 defect inspection system. The interface with computer aided design (CAD) systems has been improved by realizing direct input from CADENCE Opus or Edge and from a design rule checker ENMA in addition to CALMA GDSII format. A design guide has been established to guarantee efficient, problem-free hierarchical data conversion. Also, a new data compaction technique has been employed. The system is equipped with functions for increasing EB writing throughput. Moreover, functions for multipass writing and resize writing are available to improve pattern transfer fidelity in the resist development or chromium etching process. In the EB proximity effect correction, Ghost and dose modulation can be selectably used. For alternating phase shifting mask fabrication, a new CAD software to automatically assign shifter phase has been added. When a model 1 Gbit dynamic random access memory pattern with 0.15 μm minimum features designed following the design guide was scaled up for 4× reticle mask making and converted to the resize writing pattern on a workstation with four central processor units, the maximum conversion time per layer was 7 min 17 s, and an average conversion time was about 5 min. The data volume per mask amounted to 456 Mbytes. Using the compaction technique, the data volume was reduced to 1/7.7 at the maximum, and an average data compaction ratio of 4.5 was obtained.

Fabrication issues for the prototype National Institute of Standards and Technology SRM 2090A scanning electron microscope magnification calibration standard

A new National Institute of Standards and Technology scanning electron microscope magnification calibration standard has been fabricated and distributed in production prototype form. The SRM 2090A samples contain structures ranging in pitch from 3000 to 0.2 μm and are useful at both high- and low-accelerating voltages. The design and fabrication of the samples has incorporated many of the improvements suggested through two previous prototype series. This article discusses optimization of the lithographic techniques in the fabrication process. We used electron beam lithography for fabrication because of the 0.1 μm features required on the samples. After liftoff, unexpected linewidth differences were measured among the smallest features. These differences were reduced through modification of the electron beam writing paths. We propose that the resist heating effect caused an axial dependence among features fabricated using the original electron beam writing paths. In addition, the susceptibility of the present prototype design to electron beam proximity effects was analyzed. Proximity effects from the 9 μm range of backscattered electrons have little effect on the pitch structures of the prototype but may impact development of the prototype as a linewidth standard.

Efficiency of electron-beam proximity effect correction

The trend of increasing pattern data volume, together with decreasing critical dimensions, causes correction of proximity effect to be continually more time consuming and expensive. A tradeoff exists between speed and accuracy. A given correction method may be judged efficient if the direct computational overhead needed to achieve a predetermined level of accuracy is small. Some basic principles relating to efficiency are derived. An optimal correction algorithm follows naturally from the analysis. Forward and backward scattering have greatly differing ranges, and correspondingly differing computational requirements. The two processes are easily separated analytically. Dose correction is used to offset backscattering, while edge displacement is used to offset forward scattering. The only direct computational overhead is the local pattern density. All other necessary parameters are precomputed, and accessed by memory lookup.

Experimental determination of the proximity effect from 25 to 100 keV in electron beam patterned x-ray masks

Experimentally determined radial exposure distributions at beam voltages of 25, 50, 75, and 100 keV have been used to study the electron beam proximity effect produced by 30 nm Au/5 nm Cr/2.2 μm Si x-ray mask structures. For comparison, additional results were also obtained using bulk Si, 50 nm thick Si3N4 and 30 nm Au/5 nm Cr/50 nm Si3N4 substrates. Above 25 keV, the x-ray mask structures showed a reduced long range backscattering relative to bulk Si due to the loss of electrons out the backside of the masks. The Au/Cr plating base was found to be the major source of backscattering over distances <1.0 μm, and to limit the reduction in the ratio of backscattered to forward scattered exposure which resulted from increasing the beam voltage. The decrease in the proximity effect above 75 keV appears to be minimal. Although additional experiments are required to quantify the magnitude of the plating base enhanced proximity effect on developed resist profiles, it is apparent that simply increasing the beam voltage will not eliminate the lateral backscattering produced by the plating base during the electron beam patterning of x-ray masks.

Diffusion in AZ-5214 image reversal process and its application to e-beam proximity effect correction

Here we report our discovery of the diffusion phenomenon of AZ5214 resist during a post-exposure bake process step and its application to improve the electron beam lithographic performance of the resist. The diffusion phenomena are that the exposed features gain an extra amount of material from their immediate neighborhoods and become thick at the pattern edge and wider in feature size. In general, variations in pattern dimensions are unfavorable for process control. However, in this case, the changes in the exposed geometry are just opposite to those caused by the electron beam proximity effect. Therefore, by carefully controlling the parameters of the post-exposure bake, excellent proximity effect corrections have been obtained. The advantage of this method is its simplicity. There is no extra process step and complicated computation involved as in other proximity effect correction methods. It is achieved by using a rather simple step, a post-exposure bake, in the image reversal process.