Electro Optical Frequency Mapping Research Articles

Preliminary Study on Detecting the Internal Voltage Values of Integrated Circuits Based on Electro-Optical Frequency Mapping

Electro-optical frequency mapping (EOFM) technology can detect node signals from the backside of integrated circuits (ICs). In the past, the detected signal only qualitatively represented the electrical activity strength inside the device. In this paper, the electro-optical signal generation mechanism of the device is systematically studied, and a concise physical model of laser beam modulation based on the optical transmission matrix is proposed. Firstly, the influence of the bandwidth of the laser and each structure covered by the laser spot on the electro-optical signal of the device is well described by the model. Secondly, the model quantifies the electro-optical signal strength, and shows it is positively correlated with the laser wavelength and the reverse bias voltage. Finally, the model is used to quantitatively calculate the accurate voltage level of the internal node inside the device using the detected signal, and the calculation results match well with the experimental results. The model provides theoretical guidance for the efficient and accurate extraction of internal voltage values of devices by EOFM technology.

CONCEALING-Gate: Optical Contactless Probing Resilient Design

Optical probing, though developed as silicon debugging tools from the chip backside, has shown its capability of extracting secret data, such as cryptographic keys and user identifications, from modern system-on-chip devices. Existing optical probing countermeasures are based on detecting any device modification attempt or abrupt change in operating conditions during asset extraction. These countermeasures usually require additional fabrication steps and cause area and power overheads. In this article, we propose a novel low-overhead design methodology to prevent optical probing. It leverages additional operational logic gates, termed as “CONCEALING-Gates,” inserted as neighbor gates of the logic gates connected to the nets carrying asset signals. The switching activity of the asset carrying logic is camouflaged with the switching activity of the concealing-gate. The input signal and placement in the layout of the concealing-gates must be selected in such a way that they remain equally effective in preventing different variants of optical probing, i.e., electro-optical frequency mapping and Electro-optical probing. The methodology is suitable for the existing ASIC/FPGA design flow and fabrication process, since designing new standard logic cells is not required. We have performed a comprehensive security evaluation of the concealing-gates using a security metric developed based on the parameters that are crucial for optical probing. The attack resiliency of the logic cells, protected by concealing-gates, is evaluated using an empirical study-based simulation methodology and experimental validation. Our analysis has shown that in the presence of concealing-gates, logic cells achieve high resiliency against optical contactless probing techniques.

Contactless device characterization of transistor structures in silicon using electro optical frequency mapping (EOFM)

Electro-optical frequency mapping (EOFM) is sensitive to carrier densities in electronic devices. Here, parametric measurements of FET and bipolar transistor structures have been performed with EOFM. The Metal-Insulator-Semiconductor (MIS) system of the FET could be characterized for strong inversion and accumulation for estimations of flatband and threshold voltage. Driving the MIS into accumulation also turns on the source/drain pn junctions into forward bias. The carrier profile of the corresponding parasitic bipolar structure is also measured with EOFM showing the different operation modes of a parasitic bipolar junction transistor and the limited performance of the unwanted bipolar parasitic under the FET. For comparison, EOFM results for a vertical high-performance heterojunction bipolar transistors (HBT) in SiGe:C BiCMOS technology are included, showing clearly distinguishable results of a golden and a faulty SiGe:C HBT.

Optical interaction in active analog circuit elements

This publication introduces (spectral) photon emission (PEM) and electro-optical frequency mapping (EOFM/LVI) measurements to analog circuit elements (simple, cascode and low-voltage current mirrors). Different operating conditions of the devices are probed and the voltage dependence of the signals is analyzed. Results partly show close similarities to optical probing of digital IC's, but also differences in voltage dependence and signal levels due to more complicated voltage and signal distributions along the devices.

Automatic process for time-frequency scan of VLSI

Electro optical techniques (EOP: electro optical probing and EOFM: electro optical frequency mapping) are effective backside contactless methods for defect localization and design debug for VLSI. The image mode (EOFM) gives only one frequency at each scan. In this case, the frequency mapping is a long and hard task. Furthermore, temporal information is not included in EOFM mode. Building a map by point by point EOP is usually too long so it cannot be used as it is to extract all the frequencies of interest in a region of interest. To overcome this limitation, we have developed an automatic process using EOP mode with a wavelets approach and autocorrelation. Temporal and frequency information are simultaneously computed with only one acquisition. We will underline the challenge and define application boundaries of this technique.

Thermoreflectance mapping observation of Power MOSFET under UIS avalanche breakdown condition

In this study, we investigated the temperature variation of the top surface image of power MOSFET under UIS condition, measured by the optical probed thermo-reflectance image mapping (OPTIM) (using electro optical frequency mapping: EOFM). The measured data obtained by the thermoreflectance mapping was found to be sensitive to changes in temperature rather than the temperature distribution. These results suggest that the thermoreflectance mapping method has higher measuring ability of heat generation distribution, since it has higher time-resolution than that of thermography.