Effects In GaAs MESFETs Research Articles

Quantification of surface state effects in GaAs MESFETs

The operation of gallium arsenide schottky barrier field effect transistor is greatly affected by several anomalies such as frequency dispersion of output impedance, Zds; this low frequency behaviour is related to the presence of capture centres at the channel/substrate interface. In this context, we investigate the influence of such defects via a circuit consisting of a capacitance in series with a resistance placed in parallel to the output of a transistor, between drain and source. Then, using PSPICE program we made some simulations at several bias of the device and different values of elements characterising traps. It was found that the dispersion increases when the value of the drain bias increases. It was also shown that the dispersion increases with increasing trap resistance. Whereas, the trap capacitance greatly affects the initial and final saturation of the output impedance

Effects of channel-substrate interface on hysteresis of sidegating effect in GaAs MESFETs

With sidegating bias, hysteresis of sidegating effect is usually observed in drain current. The experimental results presented in this letter demonstrate that the hysteresis with time-based characteristics is closely related to EL2 traps and channel-substrate (C-S) junction peculiarities. The response of depletion region of C-S junction to the electron capture and emission by trap-EL2 plays an important role in the hysteresis. Furthermore, a new mechanism is proposed to explain the time-based characteristics of hysteresis, i.e., there is a “steady-state” in which the hysteresis disappears.

Pulsed measurements and circuit modeling of weak and strong avalanche effects in GaAs MESFETs and HEMTs

An extensive characterization of the on-state breakdown characteristics of GaAs based MESFETs and HEMTs has been carried out by means of DC and pulsed measurements and of circuit simulations. A computer-controlled, three-terminal Transmission Line Pulse (TLP) system with 50-100 ns pulse width and sub-ns risetime has been developed, which allows automated pulsed measurements of device I-V characteristics. The TLP system has been adopted for nondestructive measurements of the on-state breakdown characteristics of GaAs MESFETs and HEMTs up to unprecedented values of gate current density (I/sub G//W=30 mA/mm has been reached), in strong avalanche conditions. The device behavior in strong avalanche conditions is dominated by a parasitic bipolar effect (PBE) similarly to SOI and bulk Si MOSFETs. By taking into account this and other parasitic effects, an equivalent circuit model, suitable for SPICE simulations has been developed. The proposed model is capable of predicting the exact behavior of the gate and drain currents in both weak and strong avalanche conditions.

Design considerations for buried p-layers to suppress substrate-trapping effects in GaAs MESFETs

The effects of buried p-layers (BP-layers) on substrate-trap-induced frequency dispersion of drain conductance and drain lag in GaAs MESFETs have been analyzed. Our experiments show that the BP-layer concentration, profile, and configuration significantly affect its effectiveness in suppressing trap-induced low-frequency anomalies. BP-layer resistance should be low enough to enable fixing the electrostatic potential, which requires that the p-layers be partially neutralized. Our results can be explained by the self-backgating model and resistance measured for the BP-layers. However, while suppressing trap-induced phenomena, BP-layers may cause current transients at higher frequencies and degrade RF performance due to the charging and discharging of holes in the p-layer. This phenomenon is also investigated in detail.

Characterization of thermal and frequency-dispersion effects in GaAs MESFET devices

New simple and accurate measurement procedures that enable the dispersion and thermal effects in GaAs MESFETs to be observed independently are presented in this paper. The results indicate that the differences observed between the static and pulsed characteristics of the device are not solely due to thermal effects, as is sometimes thought. Electrical and thermal measurements also show the GaAs MESFET to take a relatively long time before the effect of self-heating manifests itself on the IV characteristics of the device.

Correlation between high-voltage kink and substratecurrent in GaAs MESFETs

The kink effect in GaAs MESFETs has been studied by evaluating ungated substrate current. Through the investigations of different buffer structures and epi-ready wafers from vendors, the authors found that kinks appearing in the high-voltage regime are related to the interface states, which may be associated with the residual impurities in the epi-ready wafers.

Study of Surface Conduction Related Effects in GaAs MESFET's

Study of Surface Conduction Related Effects in GaAs MESFET's

Analysis of GaAs/SiN interface states and hot carrier annealing effects in GaAs MESFET

We have analyzed in detail the disappearance phenomenon of the plasma induced interface states (GaAs/SiN) on GaAs MESFET by means of drain current transient, three-terminal gate current, optical beam induced current (OBIC) and light emission. The energy level of trapped electrons in the interface states distributes widely in the band-gap below the conduction band. The interface states decrease by high temperature operation keeping its energy level constant. It requires hot-carrier effects to decrease the interface states.

Subthreshold current model with modified threshold voltage for submicrometre scale GaAs MESFETs

A new analytical two-dimensional model is developed that accurately predicts channel potential variation with external voltages and along the length of the channel in the subthreshold regime, including drain-induced barrier lowering (DIBL) effects in GaAs MESFETs. Threshold voltage is modified to account for short channel effects. The parameters important for the modelling of subthreshold drain current are calculated and this provides the basis for a subthreshold current model. Moreover, the developed analytical models are compared with those of Adams and numerical analysis and good agreement is obtained.

2-D simulation of kink-related sidegating effects in GaAs MESFETs

Sidegating (backgating) effects in a planar structure with sidegate on the same side as MESFET are studied by two-dimensional simulation and the results are compared with those for a structure with a backgate on the back side of the substrate. The kink-related sidegating is reproduced in the planar structure, too. Its mechanism is discussed and is attributed to the change of EL2's role from an electron trap to a recombination center by capturing holes, which are generated by impact ionization and flow into the semi-insulating substrate including EL2 (deep donor). The dependence of shallow acceptor density in the semi-insulating substrate is also studied. It is shown that the kink-related sidegating is less remarkable in the case with lower acceptor density in the substrate. Potential dependence of sidegating effects on the sidegate (backgate) position is also discussed.

Backgating reduction in MESFETs using an AlAsnative oxide buffer layer

The authors present a new approach to the reduction of the backgating effect in GaAs MESFETs. A thin 1200 Å layer of the native oxide AlxOy is used in the buffer layer directly below the conducting channel and increases the backgating threshold to –17 V, while retaining excellent device characteristics.

Analytical piezoelectric charge densities in GaAs MESFETs

The orientation effect in GaAs MESFETs is related to the piezoelectric charge due to stress in overlayers. This brief describes an analytical method for the calculation of the piezoelectric charge in GaAs MESFETs on (100), (011), (1~1~1~)Ga, and (111)As substrates.

Numerical simulation of the temperature dependence of the sidegating effect in GaAs MESFETs

The temperature dependence of the sidegating effect in GaAs devices has been investigated by performing two-dimensional numerical simulations on realistic structures. The less sidegating and the higher sidegating threshold at higher temperatures are found to be caused by the temperature-dependent trapping properties of the deep traps and the difference in increase rate with temperature of the currents in various current paths. These results provide further support to the sidegating picture in which Schottky contacts on the semi-insulating substrate play an important role.

Numerical simulation of the suppression of sidegating effects in GaAs MESFETs by ion bombardment

The effect of ion bombardment on sidegating effect in GaAs MESFETs has been studied by two-dimensional numerical simulations. Respective contributions of the bombardment induced electron traps, hole traps and neutral recombination centers to the suppression of sidegating effect in GaAs MESFETs have been studied. The increase of electron traps and the induced neutral recombination centers was found to be the main reason for the reduction of the sidegating effect. The results provide a further support to the sidegating picture in which Schottky contacts on the semi-insulating substrate play an important role.

Short-channel effects and drain-induced barrier lowering in nanometer-scale GaAs MESFET's

Short-channel effects in GaAs MESFETs are investigated. MESFETs were fabricated with gate lengths in the range of 40 to 300 nm with GaAs and AlGaAs buffer layers. The MESFETs were characterized by DC transconductance, output conductance, and subthreshold measurements. This work focuses on overcoming the short-channel effect of large output conductance by the inclusion of an AlGaAs buffer layer, and identifying the benefit the AlGaAs buffer affords for reducing subthreshold current, including the effect of drain-induced barrier lowering. The design yielded 300-nm gate-length MESFETs with excellent suppression of the major short-channel effects. >

Avalanche breakdown and surface deep-level trap effects in GaAs MESFET's

Time-dependent numerical simulations have been performed to investigate avalanche breakdown and surface deep-level trapping effects in GaAs MESFETs. The model is based on a combination of bipolar drift-diffusion transport, impact ionization, and a dynamic surface charging mechanism. A realistic trapping process is introduced into the surface trap model from which the spatial distribution of surface charge density is determined. The basic breakdown mechanisms, gate-bias-dependent breakdown voltages, and effects of surface charges are demonstrated. It is shown that the surface deep-level traps have a pronounced effect on the breakdown phenomenon.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Numerical simulation of sidegating effect in GaAs MESFET's

Two-dimensional simulation of the sidegating effect in GaAs MESFETs has been performed. The result confirms that Schottky contacts on a semi-insulating substrate cause serious high substrate leakage current and drain current reduction in GaAs MESFETs. The threshold behavior in the sidegating effect is found to correlate with the conduction behavior of the Schottky-i-n (sidegate) structure when the sidegate is negatively biased. Shielding and enhancement of the sidegating effect by the Schottky contacts have also been studied, and the results agree with the experimental findings. Besides, the presence of hole traps in the semi-insulating substrate is found to be essential to the sidegating effect.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Light-induced sidegating effect in GaAs MESFET's

Light sensitivity of the sidegating effect in GaAs MESFETs is investigated by performing two-dimensional numerical simulations on realistic sidegate structures. The mechanism of the light-induced sidegating is identified and compared with alternative mechanisms of sidegating including trap-fill-limited conduction and conduction through the Schottky-i-n(sidegate) structure. Ionization of hole traps in the substrate by the capture of photogenerated holes is found to be the major cause of light-induced sidegating, which occurs even at very low sidegate voltages. In the presence of the occupied hole traps the potential distribution in the electron-trap-rich substrate becomes similar to that in the hole-trap-rich substrate, i.e., the negative voltage applied to the sidegate is carried over to the channel-substrate interface.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Numerical simulation of the hysteresis in the sidegating effect in GaAs MESFETs-the effect of Schottky contacts

Two-dimensional simulation of the sidegating effect in GaAs MESFETs has been performed. The result confirms that Schottky contacts on semi-insulating substrate cause serious high substrate leakage current and drain current reduction in GaAs MESFETs. The competition between the currents or biases of the contacts is found to be the cause of the S-type negative differential conductivity (S-NDC) or hysteresis observed when measuring the sidegating threshold. >

A correlation between optical backgating and photogeneration mechanism in GaAs MESFETs

The optical backgating effect in GaAs MESFETs was correlated to the photogeneration mechanism in the device semi-insulating substrate. The generation of excess electrons and holes in the device substrate under illumination with photon energies lower than the band-gap was modeled taking into account the contribution of the two most significant levels, namely the deep acceptor HL1(Cr) end and native deep donor EL2. The model was compared to experimental results obtained from photo-Hall measurements performed on the device substrate.