Dynamically Allocated Multi-queue Research Articles

An Area-Efficient DAMQ Buffer with Congestion Control Support

As the port count of routers in an interconnection network increases rapidly, the amount of buffers within the router chip also increases greatly. To improve the buffer utilization and to reduce the buffer size, the dynamically allocated multi-queue (DAMQ) algorithm is commonly used. However, traditional DAMQ buffer management suffers from high write latency and read latency, and one virtual channel (VC) monopolizes the entire buffer. To address these issues, we propose a fast and area-efficient DAMQ buffer-management algorithm and a novel flow-control mechanism based on credit with congestion-control support. The simulation results show that the new DAMQ algorithm can achieve low latency and prevent one VC from occupying the entire buffer during periods of congestion. Additionally, it can achieve high throughput with a shallow buffer, which leads to a reduced chip area.

A FAST AND FAIR SHARED BUFFER FOR HIGH-RADIX ROUTER

High-radix router based on the tile structure requires large amount of buffer resources. To reduce the buffer space requirement without degrading the throughput of the router, shared buffer management schemes like dynamically allocated multi-queue (DAMQ) can be used by improving the buffer utilization. Unfortunately, it is commonly regarded that DAMQ is slow in write and read. To address this issue, we propose a fast and fair DAMQ structure called F2DAMQ for high-radix routers in this paper. It uses a fast FIFO structure in the implementation of idle address list as well as data buffer and achieves some critical performance improvement such as continuous and concurrent write and read with zero-delay. Besides, F2DAMQ also uses a novel credit management mechanism which is efficient in avoiding one virtual channel (VC) monopolizing the shared part of the buffer and achieving fairness among competing VCs sharing the buffer. The analyses and simulations show that F2DAMQ performs well in achieving low latency, high throughput and good fairness under different traffic patterns.

Evaluation of multi-queue buffered multistage interconnection networks under uniform and non-uniform traffic patterns

This paper presents a unified model for analysing multistage interconnection networks with multi-queue buffered strategies. Buffering strategies include SAFC (Statically Allocated Fully Connected), SAMQ (Statically Allocated Multi-Queue), DAMQ (Dynamically Allocated Multi-Queue), and DAFC (Dynamically Allocated Fully Connected) schemes. We develop a unified model to evaluate the performance of all these buffer allocation schemes under the uniform and non-uniform traffic patterns. The analytical model is validated through extensive simulations. Using the unified model, we conducted performance comparisons for the four buffer allocation schemes under both uniform and non-uniform traffic load. It is shown that the DAFC scheme has the best performance over all the four buffer allocation schemes under both uniform and non-uniform load.