Dynamic Laser Stimulation Research Articles

Fundamentals of Circuit Failure Analysis Based on Optical Fault Isolation Techniques

Circuit failure analysis based on optical fault isolation (OFI) techniques is widely used for Si debugging at the early phase of product development or failure analysis to improve yield and reliability issues at mass production stage. Three of OFI techniques are usually used for failure analysis. Dynamic laser stimulation affects <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{th}$ </tex-math></inline-formula> shift due to thermal heating or electron-hole pair generation in local area depending on the wavelength of the laser used. Laser voltage image and probing provide toggle image of signal and direct waveform differences between good and failure circuits, respectively. This paper introduces the fundamentals of Si level circuit analysis including digital and analog circuit using optical fault isolation method based on theoretical and experimental results.

Simulation based dynamic laser stimulation for failure analysis of analog and mixed-signal circuits

With the increasing complexity of circuits, it is difficult to carry out fault isolation in a short time. This is particularly true for mixed-signal circuits when using only standard fault isolation techniques (e.g. EMMI or TLS). It is often complicated to tell whether a spot is a consequence of a failure or points out the location of the defect itself. In this scenario, circuit simulators are a solution to resolve this ambiguity and ease this task. This work proposes a simulation method for circuits inspected using thermal laser stimulation techniques. Furthermore, simulations for the dynamic laser stimulation technique are proposed with encouraging results for failure analysis.

Dynamic optical beam induced current variation mapping: A fault isolation technique

In this paper, we describe the concept and applications of a dynamic laser stimulation technique based on optical beam-induced current (OBIC) variation mapping for global fault localization. A production tester exercised the chip dynamically while a 1064 nm wavelength laser interrogates the devices in the region of interest from the chip backside. OBIC variations at different test cycles are recorded for every scanned pixel and translated into a current profile. A post-processing scheme then determines the suspected defect location. Unlike laser-assisted device-alteration (LADA) which uses the same laser, this technique applies to hard defects localization. Five case studies will be presented as proof of concept.

TR-DLS analysis on analog circuit

Analog circuits are often challenging to debug with dynamic laser stimulation (DLS) due to intrinsic sensitivity of some circuitries to carrier generations. This paper showcases successful post‑silicon debug on analog circuitries (start-up circuit) using nanosecond pulse-on-demand laser to perform Time-resolved Dynamic Laser Stimulation (TR-DLS), leading into root cause identification on a marginality issue in a sub-20 nm FinFET technology device.

Pattern image enhancement by extended depth of field

Most optical defect localization techniques such as dynamic laser stimulation or photon emission microscopy require a pattern image of the device to be taken. The main purpose is for device navigation, but it also enables the analyst to identify the location of the monitored activity by superimposing it onto the pattern image. The defect localization workflow usually starts at low or medium magnification. At these scales, several factors can lead to a lack of orthogonality of the sample with the optical axis of the system. Therefore, images can be locally out of focus and poorly resolved. In this paper, a method based on Depth of Field Extension is suggested to correct the pattern image.

Parametric defect localization on integrated circuits – From static laser stimulation to real-time variation mapping (RTVM)

Laser stimulation techniques have been intensively used in the last decades to localize defects on integrated circuits. Although static techniques are efficient in many cases, they are not appropriate to tackle complex macro failure modes such as parametric defects. Dynamic laser stimulation techniques overcome these limitations but their implementation requires inserting a tester between the device under test and the fault isolation equipment, which may result in quite long acquisition times.Real-time variation mapping (RTVM) of a parametric failure can be achieved using FPGA-based tester architecture as described in this paper. Several use cases are presented and show the benefits of this implementation in terms of speed and complex failure localization.

A challenging case study resolved by using the Dynamic Laser Stimulation technique

The case study device shows an abnormal electrical behavior after a few years of operation whereas new devices are normal. This abnormal behavior is proved to be related to power supply and temperature, the worst combination being “low” temperature (under 20°C) and low voltage. We will use the Dynamic Laser Stimulation to identify and localize the specific device structures involved in the defect.

Dynamic defect localization using FPGA to monitor digital values

Fault localization is a key step of the failure analysis flow on defective ICs. Recently, the development of parametric variation mapping (xVM) under dynamic laser stimulation has considerably increased the scope of soft defect localization.In this paper, we are presenting a FPGA-based real-time acquisition and processing unit for the variation mapping of a digital data. The FPGA-based solution is described and used on a real case of defective analog-to-digital converter (ADC). The advantages of our system are listed and future developments are considered.

Failure Analysis enhancement by evaluating the Photoelectric Laser Stimulation impact on mixed-mode ICs

The mixed-mode ICs (Integrated Circuits), by involving multiple functions (digital, analog, RF, power) inside one device, are becoming more compact and useful. At the same time, their developments and Failure Analysis (FA) are more and more complex: test, diagnostic and defect localization steps are harder and longer in time. Each step needs to be improved as far as defect localization is concerned. Several techniques based on emission microscopy, electron beam, direct probing or laser stimulation have been developed and introduced to follow these ICs evolutions. The most recent evolution in the laser stimulation field has been the introduction of several dynamic laser stimulation techniques aimed to localize defects or weakness regions inside functional but failing ICs (environmental marginalities related to temperature, frequency, voltage, etc.). This paper deals with the use of dynamic photoelectric laser stimulation techniques applied on mixed-mode ICs where the major difficulty is due to their considerable intrinsic sensitivity. Indeed, the analog circuitry is more sensitive than the digital circuitry since a slight change in an electrical parameter can trigger a functionality failure. This property limits the defect localization because of the complex interpretation of the results, the laser stimulation mapping. We propose to help the failure analyst by coupling the dynamic laser stimulation mapping with the photoelectric impact simulations run on a previously analyzed structure. The goal is to predict and interpret the laser sensitivity mapping so to isolate the defective areas in the analog devices.

Effect of physical defect on shmoos in CMOS DSM technologies

Dynamic laser stimulation (DLS) techniques based on operating integrated circuits (ICs) become a standard failure analysis technique for soft defect localization. This type of defect is getting more and more common with advanced technology; therefore, DLS is becoming a key technique for defect localization. To perform this technique, the determination of a pass–fail border in shmoo plot is necessary. It is essential to know the impact of the defect on the shmoo plot shape with different defects. This paper presents shmoos plots simulation for common defects encountered in ICs failure analysis. Ability of DLS to detect defects according to their resistances and capacitances values are clearly established. In the second part of this paper, case studies which validate simulations results are presented.

Dynamic laser stimulation techniques for advanced failure analysis and design debug applications

Dynamic laser stimulation (DLS) techniques have been introduced over the past few years to tackle the localization of dynamic failures. This article first reviews the principles behind DLS techniques and their implementation based on monitoring functional test mapping (pass/fail) signals and monitoring other electrical variations. The integration of DLS within a dynamic optical analysis workflow in failure analysis and design debug is then presented. Finally improvements aimed at increasing the ability of DLS techniques to solve ever-growing range of subtle soft defects issues are discussed.

Rapid Diagnostics of ASIC Circuit Marginalities Using Dynamic Laser Stimulation

The silicon debug process is increasingly important in producing profitable ICs, but faces increasing challenges. In this paper, the authors report the use of a powerful optical probing technique, dynamic laser stimulation (DLS), to rapidly localize marginal circuits that were causing yield loss on two high-performance ASIC chips. The probing results were obtained without detailed information about the circuits in question and without requiring automated test equipment (ATE) for the device stimulation.

Dynamic Laser Stimulation Case Studies

Dynamic Laser Stimulation (DLS) techniques based on near-infrared laser scanning are used for failure analysis, design debug, and time margin studies or critical path analysis. In failure analysis, it is applied to localize defects when static techniques can not be applied. Moving from static to dynamic laser stimulation requires a more complex electrical setup. This paper presents several DLS case studies along with the used DLS setup. It is shown that design-process related issues as well as physical defects such as resistive contacts are rapidly and precisely localized.

Localization of Marginal Circuits for Yield Diagnostics Utilizing a Dynamic Laser Stimulation Probing System

We demonstrate isolation of marginal circuits utilizing a probing system with dual time-resolved emission (TRE) and dynamic laser stimulation (DLS) capabilities. Due to design-process interactions, failure of a BIST pattern in random frame buffer I/O cells was causing yield loss. Starting with only the failures’ symptoms, we rapidly isolated the problem to a circuit within a PLL, using a PC-based test setup.

NIR laser stimulation for dynamic timing analysis

Dynamic Laser Stimulation (DLS) is an important technique for IC analysis and timing characterization. Implementations and practical considerations are presented for SDL, RIL and LADA techniques as well as the latest methodology know as Delay Variation Mapping (DVM). Downside of dynamic laser techniques is higher complexity of IC setup and results interpretation. Understanding these aspects is necessary to benefit from DLS for the IC analysis and timing characterization.