Double Guard Rings Research Articles

Noise characteristics improvement of submicron InP/InGaAs avalanche photodiode for laser detection system

InP/InGaAs avalanche photodiodes have attracted much attention in optoelectronics and long distance optical communication systems due to their high bit rate and gain-bandwidth. In this paper, to improve the noise characteristics in laser detection systems, separate absorption, grading, charge, and multiplication InP/InGaAs avalanche photodiode (SAGCM APD) with double guard rings and three thin layers of InGaAsP has been simulated. In addition, the multiplication width of SAGCM APD has been optimized which enhances the noise characteristics. The Photocurrent and dark current are acquired as 40μA and 0.01 nA resulting in superior electrical properties among the other works. The excess noise factor in the constant mean gain of 10 has been reduced 10.3% in comparison with recent SAGCM APDs. The calculated results show that the reduction of dark current and the excess noise factor increase the SNR for about 5 orders of magnitude.

Radiation hard programmable delay line for LHCb calorimeter upgrade

This paper describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) in order to shift the phase of the LHC clock (25 ns) in steps of 1ns, with less than 5 ps jitter and 23 ps of DNL. The delay lines will be integrated into ICECAL, the LHCb calorimeter front-end analog signal processing ASIC in the near future. The stringent noise requirements on the ASIC imply minimizing the noise contribution of digital components. This is accomplished by implementing the DLL in differential mode. To achieve the required radiation tolerance several techniques are applied: double guard rings between PMOS and NMOS transistors as well as glitch suppressors and TMR Registers. This 5.7 mm2 chip has been implemented in CMOS 0.35 μm technology.

Study of various high voltage protection structures for reduction of the insensitive region of silicon sensors designed for extreme radiation tolerance

We studied several devices with different distances of the sensitive region to the cut edge after severe hadron irradiation. They have been characterized in term of the bias voltage drop on the various guard ring (GR) structures and their charge collection performance.Current pixel detectors are made with n-type silicon with n-side readout. This geometry requires backplane processing for implanting GR structures on the backplane of the sensor. This increases the cost and the complexity of the device, but on the other hand offers GR structures on both sides, with possibly a more efficient reduction of the edge potential and beneficial effects on reducing the insensitive area. We present the comparison of n-in-p and n-in-n detectors with similar geometry to show the effect of the double GR structure before and after hadron irradiation.

Methodology on extracting compact layout rules for latchup prevention in deep-submicron bulk CMOS technology

An experimental methodology to find area-efficient compact layout rules to prevent latchup in bulk complimentary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) is proposed. The layout rules are extracted from the test patterns with different layout spacings or distances. A new latchup prevention design by adding the additional internal double guard rings between input/output cells and internal circuits is first reported in the literature, and its effectiveness has been successfully proven in three different bulk CMOS processes. Through detailed experimental verification including temperature effect, the proposed methodology to extract compact layout rules has been established to save silicon area of CMOS ICs but still to have high enough latchup immunity. This proposed methodology has been successfully verified in a 0.5-/spl mu/m nonsilicided, a 0.35-/spl mu/m silicided, and a 0.25-/spl mu/m silicided shallow-trench-isolation bulk CMOS processes.

Use of a double diffused guard ring to obtain near ideal I–V characteristics in Schottky barrier diodes

This paper reports the use of a unique double-diffused guard ring Schottky barrier diode. The electrical characteristics of the conventional Schottky barrier diode are compared with the single and double guard ring devices. It is shown that both guard ring devices give near ideal I–V characteristics by eliminating the edge effects inherent with metal-semiconductor contacts. It is also shown that the double guard ring structure maintains the fast recovery time of the Schottky diode to higher current levels than the single ring structure by suppression of minority carrier injection.