Doping Concentration Of Drift Region Research Articles

Novel lateral double-diffused MOSFET with folded silicon and high-permittivity dielectric breaking silicon limit

A novel folded-accumulation LDMOS (FALDMOS) employing high-permittivity (HK) material as the partial field dielectric (HK-FALDMOS) is proposed and investigated by simulation. The device features the high-k dielectric partially replacing conventional SiO2 as the field oxide covering partial drift region and the gate electrode extending to the drain electrode. In the ON-state, the majority-carrier accumulation effect of HK-FALDMOS is more intense than that of FALDMOS, which is attributed to the larger capacitance of high-k film with the same dielectric thickness. Besides, a higher doping concentration in drift region I is obtained due to the electric field modulation effect resulting from the employed high-k film, which further reduces the specific on-resistance (Ron,sp) of the drift region I. The breakdown voltage (BV) declines slightly with the increase of permittivity of high-k film. Simulation results show that the proposed HK-FALDMOS has best-in-class Ron,sp-BV performance (9.9 mΩ mm2 with BV of 44.9 V when the relative permittivity of high-k is 8), which breaks the silicon limit of LDMOS.

Low Specific On-Resistance SOI LDMOS with Non-Depleted Embedded P-Island and Dual Trench Gate**Supported by the Youth Science Foundation of Changchun University of Science and Technology under Grant No XQNJJ-2015-10, and the Innovation Science Foundation of Changchun University of Science and Technology under Grant No XJJLG-2016-07.

A new silicon-on-insulator (SOI) trench lateral double-diffused metal oxide semiconductor (LDMOS) with a reduced specific on-resistance Ron,sp is presented. The structure features a non-depleted embedded p-type island (EP) and dual vertical trench gate (DG) (EP-DG SOI). First, the optimized doping concentration of drift region is increased due to the assisted depletion effect of EP. Secondly, the dual conduction channel is provided by the DG when the EP-DG SOI is in the on-state. The increased optimized doping concentration of the drift region and the dual conduction channel result in a dramatic reduction in Ron,sp. The mechanism of the EP is analyzed, and the characteristics of Ron,sp and breakdown voltage (BV) are discussed. Compared with conventional trench gate SOI LDMOS, the EP-DG SOI decreases Ron,sp by 47.1% and increases BV from 196 V to 212 V at the same cell pitch by simulation.