Doped Nanowires Research Articles

Dynamics of Monolayer Growth in Vapor-Liquid-Solid GaAs Nanowires Based on Surface Energy Minimization.

The vapor–liquid–solid growth of III-V nanowires proceeds via the mononuclear regime, where only one island nucleates in each nanowire monolayer. The expansion of the monolayer is governed by the surface energetics depending on the monolayer size. Here, we study theoretically the role of surface energy in determining the monolayer morphology at a given coverage. The optimal monolayer configuration is obtained by minimizing the surface energy at different coverages for a set of energetic constants relevant for GaAs nanowires. In contrast to what has been assumed so far in the growth modeling of III-V nanowires, we find that the monolayer expansion may not be a continuous process. Rather, some portions of the already formed monolayer may dissolve on one of its sides, with simultaneous growth proceeding on the other side. These results are important for fundamental understanding of vapor–liquid–solid growth at the atomic level and have potential impacts on the statistics within the nanowire ensembles, crystal phase, and doping properties of III-V nanowires.

Edge effects on the contact resistance of side-bonded contacts to heavily n-doped silicon nanowires

We significantly improve the physical understanding and theoretical estimate of the contact resistance of a side-bonded contact to heavily doped semiconductor nanowire by highlighting the edge effects. The contact can be made of metal or metal silicide . Prior model of a side-bonded contact to semiconductor nanowire (NW) estimates the contact resistance using radial tunneling in the contacted NW region, neglecting the edge tunneling and fringing field in the non-contacted NW region. Using realistic TCAD simulations, we show that: (i) edge tunneling dominates over radial tunneling as contact thickness, nanowire radius or ambient dielectric constant are reduced; hence a thin contact together with a low- k surrounding dielectric can yield a significantly lower contact resistance; (ii) fringing field reduces both radial tunneling and edge tunneling.

High-performance polymer electrolyte membrane modified with isocyanate-grafted Ti3+ doped TiO2 nanowires for lithium batteries

The Ti3+ doped TiO2 nanowires were grafted by tolylene-2,4- diisocyanate (TDI) and applied as a modifier for the preparation of organic–inorganic hybrid electrolyte in high performing lithium batteries. The PEO-based polymer electrolyte was optimized at different organic–inorganic ratios and exhibited excellent lithium-ion conductivity of 1 × 10−4 S·cm−1 at 30 °C when adding 8% TDI-TiO2 nanowires, outstanding electrochemical stability with a wide electrochemical window up to 5.5 V at 60 °C and a high lithium-ion transport number of 0.36. The LiFePO4|PTTNW8%|Li cells deliver excellent rate capability and cycling performance, with a high initial discharge capacity up to 151 mAh·g−1 at 60 °C at 0.1 C rate and excellent capacity retention of 91% after 100th cycle. NCM811|PTTNW8%|Li high-voltage lithium batteries were also demonstrated at a 50 °C, which displayed a superior cycling performance. Therefore, the prepared PEO-TDI-TiO2 electrolyte is a promising polymer electrolyte for solid- state lithium batteries.

Antimony doped SnO2 nanowire@C core–shell structure as a high-performance anode material for lithium-ion battery

SnO2 is considered as one of the high specific capacity anode materials for Lithium-ion batteries. However, the low electrical conductivity of SnO2 limits its applications. This manuscript reports a simple and efficient approach for the synthesis of Sb-doped SnO2 nanowires (NWs) core and carbon shell structure which effectively enhances the electrical conductivity and electrochemical performance of SnO2 nanostructures. Sb doping was performed during the vapor-liquid-solid synthesis of SnO2 NWs in a horizontal furnace. Subsequently, carbon nanolayer was coated on the NWs using the DC Plasma Enhanced Chemical Vapor Deposition approach. The carbon-coated shell improves the Solid-Electrolyte Interphase stability and alleviates the volume expansion of the anode electrode during charging and discharging. The Sb-doped SnO2 core carbon shell anode showed the superior specific capacity of 585 mAhg−1 after 100 cycles at the current density of 100 mA g−1, compared to the pure SnO2 NWs electrode. The cycle stability evaluation revealed that the discharge capacity of pure SnO2 NWs and Sb doped SnO2 NWs electrodes were dropped to 52 and 152 mAh g−1 after100th cycles. The process of Sb doping and carbon nano shielding of SnO2 nanostructures is proposed for noticeable improvement of the anode performance for SnO2 based materials.

Promoting the Performance of Li-CO2 Batteries via Constructing Three-Dimensional Interconnected K+ Doped MnO2 Nanowires Networks.

Nowadays, Li–CO2 batteries have attracted enormous interests due to their high energy density for integrated energy storage and conversion devices, superiorities of capturing and converting CO2. Nevertheless, the actual application of Li–CO2 batteries is hindered attributed to excessive overpotential and poor lifespan. In the past decades, catalysts have been employed in the Li–CO2 batteries and been demonstrated to reduce the decomposition potential of the as-formed Li2CO3 during charge process with high efficiency. However, as a representative of promising catalysts, the high costs of noble metals limit the further development, which gives rise to the exploration of catalysts with high efficiency and low cost. In this work, we prepared a K+ doped MnO2 nanowires networks with three-dimensional interconnections (3D KMO NWs) catalyst through a simple hydrothermal method. The interconnected 3D nanowires network catalysts could accelerate the Li ions diffusion, CO2 transfer and the decomposition of discharge products Li2CO3. It is found that high content of K+ doping can promote the diffusion of ions, electrons and CO2 in the MnO2 air cathode, and promote the octahedral effect of MnO6, stabilize the structure of MnO2 hosts, and improve the catalytic activity of CO2. Therefore, it shows a high total discharge capacity of 9,043 mAh g−1, a low overpotential of 1.25 V, and a longer cycle performance.

Ultrasensitive and easily reproducible biosensor based on novel doped MoS2 nanowires field-effect transistor in label-free approach for detection of hepatitis B virus in blood serum

An ultrasensitive field-effect transistor (FET) for hepatitis B virus deoxyribonucleic acid (HBV DNA) detection in label free approach and easily reproducible setup was reported. The fabricated FET biosensor was materialized by ZnO doped MoS2 nanowires (NWs). This report introduced a novel structure of the MoS2 in bio-sensing approach. Because of unique electrical and structural properties of MoS2, HBV biosensor could demonstrate the high sensitivity and showed the detection limit of 1 fM. The MoS2 NWs fabrication was materialized through ZnO based vapor-liquid-solid (VLS) technique. The fabricated device could measure the DNA targets in a linear concentration range from 0.5 pM to 50 μM. The dynamic response time of FET biosensor was 25 s. The functionality of the NWs biosensor for label-free measurements could be repeated for several times without any significant malfunction and biosensor could retain 96% of its initial response after eight weeks maintenance. The HBV biosensor showed high selectivity by discrimination the complementary DNA oligonucleotides from non-complementary and the mismatch (1, 2 and 3 bases) oligonucleotides. The materialized platform was desirably reproduced for HBV concentrations in human serum. The specificity of the biosensor was evaluated against several different types of DNAs and the fabricated device showed the outstanding performance. In order to optimize the device functionality, the biosensor was checked for two different human samples and device could distinguish the samples from each other in the same manner.

Quantitative Assessment of Carrier Density by Cathodoluminescence. II. GaAs Nanowires

Precise control of doping in single nanowires (NWs) is essential for the development of NW-based devices. Here, we investigate a series of MBE-grown GaAs NWs with Be (p-type) and Si (n-type) doping using high-resolution cathodoluminescence (CL) mapping at low- and room-temperature. CL spectra are analyzed selectively in different regions of the NWs. Room-temperature luminescence is fitted with the generalized Planck law and an absorption model, and the bandgap and band tail width are extracted. For Be-doped GaAs NWs, the bandgap narrowing provides a quantitative determination of the hole concentration ranging from about $1\times 10^{18}$ to $2\times 10^{19}$~cm$^{-3}$, in good agreement with the targeted doping levels. High-resolution maps of the hole concentration demonstrate the homogeneous doping in the pure zinc-blende segment. For Si-doped GaAs NWs, the electron Fermi level and the full-width at half maximum of low-temperature CL spectra are used to assess the electron concentration to approximately $3\times 10^{17}$ to $6\times 10^{17}$~cm$^{-3}$. These findings confirm the difficulty to obtain highly-doped n-type GaAs NWs, maybe due to doping compensation. Notably, signatures of high concentration (5--9$\times 10^{18}$~cm$^{-3}$) at the very top of NWs are unveiled.

Highly Doped Si Single Crystal Nanowires via Metallic Flux Nanonucleation

Ever since the advent of scalable production of nanodevices, the search for optimal fabrication techniques of low dimensional materials has gained the attention of scientists and engineers all over the world. In particular, the fabrication of silicon nanowires is being increasingly investigated, due to their potential integration into novel technologies such as biological and optical sensors, solar cells, power generators, and transistors, among others. In this context, this work reports the single-step fabrication of Ga-doped Si bulk and nanowire single crystals. They were obtained through the Metallic Flux Nanonucleation (MFNN) technique, where a nanoporous alumina template was employed to define the nanowire morphology, while Ga was used as flux to both lower the Si melting point and dope the crystals. Our results show that Ga-doped silicon bulk crystals were successfully fabricated via MFNN. The carrier concentration was determined by probing the Hall effect and was found to be (2.5 ± 0.2) x 1019 cm−3. Silicon nanowires were simultaneously obtained, presenting an average wire diameter of 125 ± 26 nm and length up to several tens of microns. These results open the possibility to easily fabricate heavily doped intermetallic cylindrical nanowires, with versatility both on the nanowire composition and the doping element.

Calculation of Hole Concentrations in Zn Doped GaAs Nanowires

We have previously demonstrated that we can grow p-type GaAs nanowires using Zn doping during gold catalyzed growth with aerotaxy. In this investigation, we show how to calculate the hole concentrations in such nanowires. We base the calculations on the Zhang–Northrup defect formation energy. Using density functional theory, we calculate the energy of the defect, a Zn atom on a Ga site, using a supercell approach. The chemical potentials of Zn and Ga in the liquid catalyst particle are calculated from a thermodynamically assessed database including Au, Zn, Ga, and As. These quantities together with the chemical potential of the carriers enable us to calculate the hole concentration in the nanowires self-consistently. We validate our theoretical results against aerotaxy grown GaAs nanowires where we have varied the hole concentration by varying the Zn/Ga ratio in the aerotaxy growth.

Tunneling‐Related Leakage Currents in Coaxial GaAs/InGaP Nanowire Heterojunction Bipolar Transistors

Herein, a detailed analysis of leakage mechanisms in epitaxially grown nanowire heterojunction bipolar transistors (NW‐HBTs) is presented. Coaxial npn‐GaAs/InGaP core–multishell nanowires are grown via gold‐catalyzed metalorganic vapor phase epitaxy, processed to three terminal devices and electrically characterized. The key for successful NW‐HBT device functionality is the identification of tunneling as the dominant leakage mechanism in highly doped nanowire pn‐junctions. The suppression of forward tunneling currents by adjustment of the tunneling barrier width reduces the junction leakage current density into the nA cm−2 regime, which is further verified by tunneling‐related electroluminescence measurements. In addition, the suppressed tunneling accordingly increases the number of electrons that are injected from the n‐emitter into the p‐base. The latter effect influences the performance of pn‐junction based devices and is found to enable bipolar transistor functionality. Measured common emitter Gummel plots of the NW‐HBT exhibit a current gain of up to 9 and the transistor function is additionally verified by current‐controlled output characteristics.

Face-selective tungstate ions drive zinc oxide nanowire growth direction and dopant incorporation

Tailoring the elemental doping of inorganic nanowires remains an important challenge due to complex dopant incorporation pathways. Here we report that the face-selectivity of tungstate ions controls growth direction and dopant incorporation of hydrothermal zinc oxide nanowires. The introduction of tungstate ions on nanowire surface during synthesis unexpectedly enhances nucleation at sidewall left{ {10bar 10} right} planes, while dopant incorporation occurs only on (0001) planes. This conflicting face-selective behavior leads to inhomogeneous dopant distribution. Density functional theory calculations reveal that the face-selective behavior can be interpreted in terms of the effect of coordination structure of the tungstate ions on each zinc oxide crystal plane. In addition, we demonstrate a rational strategy to control the morphology and the elemental doping of tungsten-doped zinc oxide nanowires.

High Quality Growth of Cobalt Doped GaN Nanowires with Enhanced Ferromagnetic and Optical Response.

Group III–V semiconductors with direct band gaps have become crucial for optoelectronic and microelectronic applications. Exploring these materials for spintronic applications is an important direction for many research groups. In this study, pure and cobalt doped GaN nanowires were grown on the Si substrate by the chemical vapor deposition (CVD) method. Sophisticated characterization techniques such as X-ray diffraction (XRD), Scanning Electron Microscope (SEM), Energy Dispersive X-Ray Spectroscopy (EDS), Transmission Electron Microscopy (TEM), High-Resolution Transmission Electron Microscopy (HRTEM) and photoluminescence (PL) were used to characterize the structure, morphology, composition and optical properties of the nanowires. The doped nanowires have diameters ranging from 60–200 nm and lengths were found to be in microns. By optimizing the synthesis process, pure, smooth, single crystalline and highly dense nanowires have been grown on the Si substrate which possess better magnetic and optical properties. No any secondary phases were observed even with 8% cobalt doping. The magnetic properties of cobalt doped GaN showed a ferromagnetic response at room temperature. The value of saturation magnetization is found to be increased with increasing doping concentration and magnetic saturation was found to be 792.4 µemu for 8% cobalt doping. It was also depicted that the Co atoms are substituted at Ga sites in the GaN lattice. Furthermore N vacancies are also observed in the Co-doped GaN nanowires which was confirmed by the PL graph exhibiting nitrogen vacancy defects and strain related peaks at 455 nm (blue emission). PL and magnetic properties show their potential applications in spintronics.

3D Simple Monte Carlo Statistical Model for GaAs Nanowire Single Photon Avalanche Diode

GaAs based nanowire single photon avalanche diode (SPAD) has been demonstrated with extremely small afterpulsing probability and low dark count rate, and hence it has attracted wide attention for the near infrared applications. However, there is a lack of model to accurately evaluate the avalanche breakdown performance in nanowire SPAD with a spatially non-uniform electric field. In this work, we have developed a three-dimensional (3D) Simple Monte Carlo statistical model for GaAs nanowire SPADs. Model validation includes ionisation coefficients of GaAs and avalanche gain in GaAs nanowire avalanche photodiode. We also apply our model to predict the device performances of breakdown probability, mean time to breakdown and timing jitter, which are essential parameters for SPAD design. Simulating a PN junction GaAs nanowire SPAD design using our model, we found that device performances have little dependence on the primary carrier injection type, but the nanowire doping concentration requires optimization for high performance SPAD design and operation.

Formation of boron-doped silicon wires and control of dopant concentration using zinc, SiCl4 and BCl3

We synthesized boron-doped silicon wires (whiskers) in a gas phase reduction reaction of SiCl4 with zinc vapor. BCl3 was introduced into the reactor as a boron source, and we varied the concentration ratio of B/Si in the gas phase. The formed wires had an electrical resistivity in the range of 10–3 to 101 Ω cm, depending on the ratio of BCl3 to SiCl4 in the gas phase. The ratio of B/Si in the silicon wires was not directly proportional to that in the gas phase, suggesting a non-linear incorporation process of dopant during the vapour-liquid-solid growth. Comparison of our data with published studies using gold catalysts to form doped semiconductor nanowires showed a lower incorporation efficiency of dopant atoms from the gas phase when using the zinc catalyst in vapour-liquid-solid growth.

Cation Exchange Strategy to Single-Atom Noble-Metal Doped CuO Nanowire Arrays with Ultralow Overpotential for H2O Splitting.

Single-atom site catalysts (SACs) have aroused enormous attention and brought about new opportunities for many applications. Herein, we report a versatile strategy to rhodium (Rh) SAC by a facile cation exchange reaction. Remarkably, the Rh SAC modified CuO nanowire arrays on copper foam (Rh SAC-CuO NAs/CF) show unprecedented alkaline oxygen evolution reaction (OER) activity with a high current density of 84.5 mA cm-2@1.5 V vs reversible hydrogen electrode (RHE), 9.7 times that of Ir/C/CF. More strikingly, when used as an anode and a cathode for overall water splitting, the Rh SAC-CuO NAs/CF can achieve 10 mA cm-2 at only 1.51 V. Density functional theory calculations reveal that the high OER and HER intrinsic catalytic activities result from moderate adsorption energy of intermediates on Rh SAC. Finally, we demonstrate the general synthesis of different single-atom noble-metal catalysts on CuO NAs (M SAC-CuO NAs/CF, where M = Ru, Ir, Os, and Au).

(Invited) Gap Nanowires with Twinning Superlattices: Structure, Optical Properties and Applications

Semiconductor nanowires (NWs) are a good candidate for future optoelectronic devices. However, the control of the essential parameters that determine the electronic and optical quality of NWs, such as crystal structure and incorporation of impurity dopants, are still challenging problems. Most III-V NWs exhibit crystal defects, which are typically randomly distributed zincblende twinning segments and stacking faults that can affect the optical and electrical properties of NW devices. The incorporation of intentional impurity dopants in NWs is important for the fabrication of p-n junctions and control of the electrical conductivity of NWs. The effect of Te and Be impurity dopant concentration on the crystal structure, surface roughness and optical properties of GaAs NWs will be presented. Four identical GaAs NW arrays were grown: an undoped sample (as a reference) and 6 samples with different Te and Be doping concentration. High resolution transmission electron microscopy (HRTEM) revealed an unusual superlattice twinning, with periodicity that became wider and more regular as the doping level increased. Twin boundaries in GaP are shown to act as an atomically narrow plane of wurtzite phase with a type-I homostructure band alignment. Twin boundaries and stacking faults (wider regions of the wurtzite phase) lead to the introduction of shallow trap states observed in photoluminescence studies. Controlling the surface roughness, the periodicity, and the width of twinning planes with doping concentration might open new possibilities for high efficiency NW-based thermoelectric devices, but also has wide implications for all NW devices.

Oscillations of As Concentration and Electron-to-Hole Ratio in Si-Doped GaAs Nanowires

III–V nanowires grown by the vapor–liquid–solid method often show self-regulated oscillations of group V concentration in a catalyst droplet over the monolayer growth cycle. We investigate theoretically how this effect influences the electron-to-hole ratio in Si-doped GaAs nanowires. Several factors influencing the As depletion in the vapor–liquid–solid nanowire growth are considered, including the time-scale separation between the steps of island growth and refill, the “stopping effect” at very low As concentrations, and the maximum As concentration at nucleation and desorption. It is shown that the As depletion effect is stronger for slower nanowire elongation rates and faster for island growth relative to refill. Larger concentration oscillations suppress the electron-to-hole ratio and substantially enhance the tendency for the p-type Si doping of GaAs nanowires, which is a typical picture in molecular beam epitaxy. The oscillations become weaker and may finally disappear in vapor deposition techniques such as hydride vapor phase epitaxy, where the n-type Si doping of GaAs nanowires is more easily achievable.

On the Correlation Between Static and Low-Frequency Noise Parameters of Vertical Nanowire nMOSFETs

Introduction. The Gate-All-Around (GAA) Nanowire (NW) or nanosheet (NS) architecture provides superior short-channel effects control and is widely considered as one of the most promising candidates to replace finFETs in advanced Logic technology nodes. Compared with their horizontal implementation, vertical NWs (or NSs) FETs [1] offer some clear advantages, appearing promising devices to overcome some of the limitations encountered by conventional CMOS scaling as it reaches its physical limits and faces interconnect routing congestion. They have the potential to yield smaller circuits with reduced power consumption [2], allowing relaxed Lgate without impacting the device footprint. While their fabrication is challenging, several schemes have been proposed for improved process control and device performance [1]. In this work, the static parameters of vertical NW junctionless (JL) nMOSFETs have been studied for devices with two different Replacement Metal Gate (RMG) cap layer widths (see schematics in figure 1), encapsulating the top part of the pillars during processing at the RMG module. It will be shown that this strongly impacts the static device parameters: the threshold voltage (VT), the maximum transconductance (gmmax) and the dynamic output resistance (rout). Moreover, a correlation is shown with the input-referred voltage noise Power Spectral Density (PSD) SVG at 10 Hz, which could be explained in terms of a process-induced variation in the diameter D of the NWs. Experimental. A detailed process description has been recently reported [1]. A 55 nm in situ P-doped n+ layer is deposited by CVD on a low-resistivity silicon substrate (source contact), followed by 90 nm undoped silicon and again 55 nm n+ Si. The RMG stack consists of IL-SiO2/HfO2/TiN/W. An RMG cap consisting of SiO2 is used to encapsulate the top of the pillars. Here, devices with two different cap widths and 100 wires in parallel are compared. On-wafer DC and low-frequency noise measurements have been performed using a BT1500 Parameter Analyzer and an E4727A Advanced Low-Frequency Noise Analyzer from Keysight, respectively. Measurements have been performed in linear operation at a drain voltage VDS=50 mV, while the gate voltage VGS is stepped from weak to strong inversion. Results and Discussion. Figure 1 and 2 compares the linear input ID-VGS characteristics of a set of narrow and wide cap vertical NW nFETs. While there is obvious device-to-device variability, the wide-gap devices (Fig. 2) clearly exhibit a lower VT than their narrow-gap counterparts in Fig. 1. The transconductance (gm) plots of Figs 3 and 4 reveal another trend: devices with a high VT generally exhibit a lower gmmax and vice versa. This is even so within each flavour of devices in Figs 3 and 4. As will be shown, nFETs with a high(er) VT and lower gmmax also tend to exhibit a higher rout. Finally, Figs 5 and 6 demonstrate that the corresponding SVG at f=10 Hz is smaller for the wide-cap devices, especially around VT, where the minimum noise PSD is found. As will be shown, the noise spectra are dominated by 1/f-like noise (f<1 kHz). A possible explanation of the observed parameter variations should provide a consistent picture for the reported correlations. For these particular devices, the NW doping density can be ruled out, as we are studying undoped pillars. The difference in SVG could suggest a difference in oxide/interface trap density, but this is not reflected in the subthreshold swing nor in the PBTI behaviour [1]. On the other hand, it has been reported before that the VT of NW transistors increases for reduce D [3]. This could well explain also the lower gmmax (scales with D) and the higher SVG (scales with 1/D). The different NW diameter could result from the different dummy dielectric removal [1].

Effect of Arsenic Depletion on the Silicon Doping of Vapor–Liquid–Solid GaAs Nanowires

It is well known that chemical potential driving the vapor–liquid–solid growth of nanowires oscillates in synchronization with the monolayer growth. In III–V nanowires, this occurs due to depletion of group V atoms in a catalyst droplet. The amphoteric behavior of silicon doping, which often changes from n‐type in planar GaAs layers to p‐type in nanowires, is attributed to low arsenic concentrations. Herein, we present an analytical model which quantifies the doping oscillations over the monolayer formation cycle, and its impact on the electron‐to‐hole ratio for the silicon doping of GaAs nanowires. It is shown that arsenic depletion can easily double the amphoteric effect and strongly favor the tendency for p‐type doping. On a more general ground, the nanowire doping process appears highly sensitive to the chemical potential oscillations related to a restricted amount of material in a nanoscale catalyst.

Impact of gate to source/drain alignment on the static and RF performance of junctionless Si nanowire n-MOSFETs

We present experimental results for junctionless nanowire transistors (JNTs) with different gate alignments to the nanowire. Devices with nanowire source/drain extensions (NSDE) show high series source/drain resistance due to the low doped nanowire extensions, which causes lower drive current and larger device performance variations comparing with devices in which the gate electrode overlaps with the source/drain contact pads (GSD). Due to the improved on-current GSD devices exhibit much higher cutoff frequency. The high fringing field in the NSDE JNT results in degradation of SS. An optimized “dumbbell” shape JNT structure is proposed to further improve the device performance. Our preliminary simulations demonstrate higher on-currents but also larger parasitic capacitances for the dumbbell JNT. However, the RF performance of the dumbbell JNT is still improved with a factor similar to our experiments. Much smaller fringing field for the dumbbell JNT is expected from the simulation, which can cause less device variations.