Distributed Memory Multiple Instruction, Multiple Data Research Articles

Parallel three-dimensional mesh generation on distributed memory MIMD computers

This paper discusses the development of an automatic mesh generation technique designed to operate effectively on multiple instruction multiple data (MIMD) parallel computers. The meshing approach is hierarchical, that is, model entities are meshed after their boundaries have been meshed. Focus is on the region meshing step. An octree is constructed to serve as a localization tool and for efficiency. The tree is also key to the efficient parallelization of the meshing process since it supports the distribution of load to processors. The parallel mesh generation procedure repartitions the domain to be meshed and applies on processor face removals until all face removals with local data have been performed. The portion of the domain to be meshed remaining is dynamically repartitioned at the octant level using an Inertial Recursive Bisection method and local face removals are reperformed. Migration of a terminal octant involves migration of the octant data and the octant's mesh faces and/or mesh regions. Results show relatively good speed-ups for parallel face removals on small numbers of processors. Once the three-dimensional mesh has been generated, mesh regions may be scattered across processors. Therefore, a final dynamic repartitioning step is applied at the region level to produce a partition ready for finite element analysis.

Parallel Monte Carlo simulations of epitaxial growth

The application of a distributed memory MIMD (multiple-instruction multiple-data) computer architecture to simulate growth during molecular-beam epitaxy is discussed. The stochastic nature of the problem and the spatial distribution of the lattice onto an array of processors leads to the development of some new ideas and constructs to ensure the system follows the correct dynamical evolution. Performance statistics for the parallel implementation and comparisons of morphological indicators with the sequential model are presented. © 1995 American Institute of Physics.

Parallel I/O subsystems in massively parallel supercomputers

Applications on MPPs often require a high aggregate bandwidth of low-latency to secondary storage. This requirement can met by internal parallel subsystems that comprise dedicated nodes, each with processor, memory, and disks.Massively parallel processors (MPPs), encompassing from tens to thousands of processors, are emerging as a major architecture for high-performance computers. Most major computer vendors offer computers with some degree of parallelism, and many smaller vendors specialize in producing MPPs. These machines are targeted for both grand-challenge problems and general-purpose computing.Like any computer, MPP architectural design must balance computation, memory bandwidth and capacity, communication capabilities, and I/O. In the past, most design research focused on the basic compute and communications hardware and software. This led to unbalanced computers that had relatively poor performance. Recently, researchers have focused on designing hardware and software for subsystems in MPPs. Consequently, most current MPPs have an architecture based on an internal parallel subsystem (the Architectures with parallel I/O sidebar describes some examples). In these computers, this subsystem encompasses a collection of nodes, each managing and providing access to a set of disks. The nodes connect to other nodes in the system by the same switching network that connects the compute nodes.In this article we'll examine why many MPPs use parallel subsystems, what architecture is best for such a subsystem, and how to implement the subsystem. We'll also discuss how parallel file systems and their user interfaces can exploit the parallel to provide enhanced services to applications.The systems discussed in this article are mostly tightly coupled distributed-memory MIMD (multiple-instruction, multiple-data) MPPs. In some cases, we also discuss shared-memory and SIMD (single-instruction, multiple-data) machines. We'll discuss three node types. Compute nodes are optimized to perform floating-point and numeric calculations, and have no local disk except perhaps for paging, booting, and operating-system software. nodes contain the system's secondary storage, and provide the parallel file-system services. Gateway nodes provide connectivity to external data servers and mass-storage systems. In some cases, individual nodes can serve as more than one type. For example, the same nodes often handle and gateway functions. The Terminology sidebar defines some other terms used in this article.

Medical volume visualization on general-purpose parallel architectures.

Parallel volume visualization is of interest to a variety of application areas since current single-processor systems fall short in interactively rendering complex, large-sized datasets. This article presents a survey of volume-visualization methods on general-purpose parallel architectures, with special attention being paid to medical imaging applications. First, the various approaches to volume visualization are briefly discussed, followed by a description of relevant aspects of parallel architectures. Next, the implications of the various architectures are illustrated on the basis of a number of existing implementations of visualization algorithms on parallel architectures and their results. For parallel volume visualization, multiple instruction, multiple data (MIMD) architectures are found to be superior to single instruction, multiple data (SIMD) architectures. The latter type suffers from a lack of performance as well as flexibility. For most applications of interactive volume visualization, including the important area of medical imaging, shared memory MIMD architectures are preferred over distributed memory MIMD architectures. The ease of programming of shared memory architectures allows existing algorithms to be readily implemented without loss of performance or flexibility.

Parallel multiple-time-step molecular dynamics with three-body interaction

For particles interacting via two- and three-body potentials, a domain-decomposition algorithm is used to implement molecular dynamics (MD) on distributed memory MIMD (multiple-instruction multiple-data) computers. The algorithm employs the linked-cell-list method and separable three-body force calculation. The force calculation is accelerated by the multiple-time-step (MTS) method. For a 1.54 million particle SiO 2 system, the MD program runs at a speed of 660 time steps per hour (1100 steps/h without the three-body interaction) on a 64-node Intel iPSC/860. The parallel algorithm is highly efficient (parallel efficiency = 0.973), as it involves only 3% communication overhead. Utilizing the second derivatives of the potential energy, the conjugate-gradient search for a local minimum underlying an MD configuration is accelerated by a factor of 13.

Reconfigurable transputer networks: practical concurrent computation

The architecture of a reconfigurable multitransputer machine capable of a gigaflop (10 9 floating point operations per second) performance will be described in some detail. Problems in efficiently coding such a distributed memory MIMD (multiple instruction multiple data) machine are also discussed. These problems will be illustrated with reference to some practical strategies for exploiting different types of parallelism present in many scientific and engineering problems. Some examples will be discussed in detail.