Disposition Pulse Width Modulation Technique Research Articles

Effect of supply voltage variations on single-phase capacitor clamped multilevel inverter fed induction motor drive

This article presents the effect of supply voltage variations on single-phase capacitor-clamped multilevel inverter-fed induction motor drives. This research is tailored at determining the best torque value and speed to attain a stable state under input voltage variation and minimum time response to realize low percentage harmonic distortions. The effect of constant power quality disturbance harms the performance and behavior of asynchronous motors based on harmonic contents and other energy source integrations. The multilevel inverter has shown good performance in motor drives. This paper deals with the effect of input voltage variations on a single-phase multilevel capacitor-clamped inverter for asynchronous induction motor drives. A five-level capacitor-clamped inverter with an in-phase disposition pulse width modulation technique is adopted. Four high-frequency triangular carrier signals are generated and compared with a reference sinusoidal signal. As a result of this approach, the inverter switches firing signals are generated. The open-loop model is designed and simulated utilizing MATLAB/Simulink and results based on different values of supply voltage are presented. The current and voltage total harmonic distortions (THDs) obtained are 4.97% and 4.46% respectively at the best operating voltage of 400 V and at maximum torque of 47 Nm.

Performance Enhancement of PV Based Boost Cascaded Fifteen Level Inverter for AC Loads

In this research work, single-stage fifteen levels cascaded DC-interface converter (CDDCLC) is proposed for sun arranged photovoltaic technology (PV) applications. The proposed geography is joined with help DC chopper and H-associate inverter to upgrade the power converter to accomplish the diminished harmonic profile. In assessment with the customary inverter structures, the proposed system is used with diminished voltage stress, decreased switch count and DC source tally. The proposed research work with cascaded DC link converter design requires three DC sources for combining fifteen-level AC output. This investigation structure switching technique is phase opposition and disposition pulse width modulation technique (POPD) which results in improved quality of obtained output AC power with 6.73% THD and also determinedly recommended for power converters used in UPS and drive applications since it is extremely affordable. A simulation and prototype model of fifteen-level CDDCLC system is deployed and its performance is analyzed for various operating conditions.

A Novel 1- Dual Input Nine-Level Inverter Topology with Generalized Modulation Technique

This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e. total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims.

Natural DC‐link voltage balance in a single‐phase NPC inverter with four‐level legs and novel modulation method

This study presents a concept of modulation of a single-phase seven-level neutral point clamped (NPC) converter with natural DC-link voltage balance and symmetrical DC-link capacitors discharge. The method is analysed in a single-phase full-bridge inverter composed of four-level diode-clamped legs (4L-FBCLD) which utilises three capacitors in a DC-link. Under the classic pulse width modulation (PWM) technique, the discharge of DC-link capacitors is unequal in a converter operating with active power. The proposed modulation assures symmetrical discharge of the DC-link capacitors and is achieved in a two-stage design. In the first stage, the carrier-based phase disposition PWM technique with modified carriers is used. In the second stage, the pulses are directed to suitable switches with the use of a state-machine decoder. The switching patterns are different in each level of modulation and are used to trigger natural balancing in the converter on the first and third level of modulation. This study presents the concepts of switching patterns, PWM generation, as well as the simulation and results of the experiment. The latter demonstrates the operation and feasibility of the 4L-FBCLD, symmetrical DC-link capacitor discharge and natural balancing in the converter.

A hybrid technique used in grid integration of photovoltaic system for maximum power point tracking with multilevel inverter

A new hybrid technique for grid integration of solar photovoltaic system using modified incremental conductance maximum power point tracking algorithm with multi-output converter and multilevel inverter is proposed in the paper. The proposed hybrid technique is the joint execution of improved dolphin echolocation algorithm and gradient boosting decision trees and this way the proposed technique is named as IDE-GBDT technique. The novelty of the proposed work is the dolphin echolocation algorithm, which is integrated by the crossover and the mutation function so it is named as IDE. In the proposed technique, the multi-output converter is the combination of boost converter and switched capacitor function to generate different self-balanced output voltages. The utilization of multilevel inverter in the proposed system provides better quality of output voltage and current waveform thereby reducing the size of passive filters. Also, eliminates the requirement of bulky transformers for grid integration. Multicarrier unipolar phase disposition pulse width modulation technique is employed for triggering the switches of the multilevel inverter. The maximum power point tracking algorithm uses the estimated active power output of the generator as its input and generates command speed so that maximum power is transferred to the dc link. This control system also incorporates a loss minimization approach to minimize the losses in the generator and hence to improve the efficiency of the photovoltaic system. Finally, the performance of the proposed maximum power point tracking control of wind and photovoltaic power generation schemes is executed in Matrix Laboratory/Simulink working platform and the execution is assessed with the existing techniques. The proposed technique is compared with the existing techniques and the observed total harmonic distortion of the proposed technique in all the cases is 0.67%, 0.51%, 0.58%, 0.63%, 0.92%, and 1.03% and the total harmonic distortion is found to be very less compared with existing techniques.

Three Phase Eleven Level Modular Multilevel Inverter with PD-PWM for Grid Connected System

The prominence of Modular Multilevel Inverters (MMI) is rising owing their merits of simple mechanical construction and good voltage sharing for semiconductor devices. Mostly Multilevel Inverters use more than one source; however, the effective use of all the sources at all levels is rare. Conventional Multilevel Inverters will diminish the energy efficiency of the conversion system. When compared to conventional multilevel inverter, Modular Multilevel Inverter with a high numbers of voltage levels seem to be the most suitable because of the use of an isolated dc source. This paper explores a three-phase eleven level modular multilevel inverter with phase disposition pulse width modulation technique (PD-PWM) that can extract power from all the sources at all the levels. Besides, this paper develops a synchronous d-q reference frame controller to control the current of 11kV. When compared with Reduced Switch Count based Multilevel Inverter Series/Parallel switching topologies, the Modular Multilevel Inverter provides better Total Harmonic Distortion (THD) of output voltage and utilization factor.

A new approach for grid integration of solar photovoltaic system with maximum power point tracking using multi-output converter

This paper proposes a new approach for grid integration of solar photovoltaic system using modified incremental conductance maximum power point tracking algorithm with multi-output converter and multilevel inverter. The multi-output converter is a combination of boost converter and switched capacitor function to generate different self-balanced output voltages using single switch, single inductor, 2N-1 diodes and 2N-1 capacitors. This topology is proposed to be used as DC link in applications where several controlled voltage levels are required with self-balancing and unidirectional current flow, such as photovoltaic (PV) or fuel cell generation systems with multilevel inverter. The utilization of multilevel inverter in the proposed system provides better quality of output voltage and current waveform thereby reducing the size of passive filters. Also, it eliminates the requirement of bulky transformers for grid integration. Multicarrier unipolar phase disposition pulse width modulation technique is employed for triggering the switches of the multilevel inverter. The proposed system is tested with standard test conditions using MATLAB/SIMULINK.

Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System

Inverters are an essential part in many applications including photovoltaic generation. With the increasing penetration of renewable energy sources, the drive for efficient inverters is gaining more and more momentum. In this paper, output power quality, power loss, implementation complexity, cost, and relative advantages of the popular cascaded multilevel H-bridge inverter and a modified version of it are explored. An optimal number of levels and the optimal switching frequency for such inverters are investigated, and a five-level architecture is chosen considering the trade-offs. This inverter is driven by level shifted in-phase disposition pulse width modulation technique to reduce harmonics, which is chosen through deliberate testing of other advanced disposition pulse width modulation techniques. To reduce the harmonics further, the application of filters is investigated, and an LC filter is applied which provided appreciable results. This system is tested in MATLAB/Simulink and then implemented in hardware after design and testing in Proteus ISIS. The general cascaded multilevel H-bridge inverter design is also implemented in hardware to demonstrate a novel low-cost MOSFET driver build for this study. The hardware setups use MOSFETs as switching devices and low-cost ATmega microcontrollers for generating the switching pulses via level shifted in-phase disposition pulse width modulation. This implementation substantiated the effectiveness of the proposed design.

Extended Phase Opposition Disposition Pulse Width Modulation Technique for Cascaded 27 Level Inverter

The Extended Phase Opposition Disposition PWM (EPODPWM) technique has been applied in the two-level inverters successfully, but it is impossible to apply directly the EPODPWM technique to multilevel inverters. This paper proposes two kinds of EPODPWM techniques suitable for a cascaded multilevel inverter, analyzes the control strategy with the EPODPWM and obtains the design of its parameters. The simulation results show the proposed EPODPWM methods can get high magnitudes of the output fundamental frequency component, low total harmonic distortion and simpler digital implementation.

Performance Analysis of FPGA based Diode Clamped Multilevel Inverter Fed Induction Motor Drive using Phase Opposition Disposition Multicarrier Based Modulation Strategy

<p>Multilevel inverters (MLI) are becoming more popular over the years for medium and high power applications because of its significant merits over two level inverters. This paper presents an implementation of multicarrier based sinusoidal pulse width modulation technique for three phase seven level diode clamped multilevel inverter. This topology is operated under phase opposition disposition pulse width modulation technique. The performance of three phase seven level diode clamped inverter is analyzed for induction motor (IM) load. Simulation is performed using MATLAB/SIMULINK. Experimental results are presented to validate the effectiveness of the operation of the diode clamped multilevel inverter using field programmable gate array.</p>

Neutral Point Clamped and Cascaded H-Bridge Multilevel Inverter Topologies – A Comparison

Objectives: This work emphasizes on the analysis of two five levels inverter topologies - neutral point clamped topology and Cascaded H-Bridge inverter topology. Methods/Analysis: The neutral point clamped topology requires only one DC source, eight switches and four clamping diodes with two voltage balancing capacitors. The cascaded topology carries two voltage sources and eight switching devices. Phase disposition pulse width modulation technique generates gating pulses for both the multilevel inverter topologies. All the simulations are done in MATLAB-Simulink simulation environment. Findings: The output waveforms, switching stress and harmonic spectrum of the output waveforms of both the inverter topologies are obtained using phase disposition pulse width modulation technique for a modulation index of unity. Moreover, the work aims to perform a comparison of both the inverter topologies with respect to total harmonic distortion, switch stress and complexity of the topology. It is found that though a cascaded inverter needs less overall components when compared to neutral point clamped inverter, yet both the inverter topologies carries the same stress across their switches and produce an almost the same harmonic distortion on their output waveforms. Applications/Improvement: Conventional voltage source inverters are gradually being replaced by multilevel inverters in various applications like photovoltaic systems, reactive power compensators, FACTS devices, adjustable speed drives etc. The stress across each of the switches gets decreased in both the multilevel inverter topologies compared to conventional inverters. Further, neutral point clamped inverters carry the advantage of requiring only one DC source for its operation.

Circulating current mitigating scheme in MMC based HVDC system with H∞ repetitive controllers

The Modular Multi-level Converter (MMC) topology is one of the most important switch mode converter topology and provides indispensable potential applications in the power systems industry, specifically, for High Voltage Direct Current (HVDC) transmission systems. Recent applications of MMC in HVDC transmission systems has posed problems such as circulating currents in the converter legs, which threatens the safe operation and also deteriorates the system’s performance. The circulating currents occur mainly due to the fluctuations in the capacitor voltages in the Sub Modules (SMs) of the MMC. Hence, in order to nullify the SM’s unbalanced voltage, this article aims to use a new counting sort based technique in conjunction with Carrier Phase Disposition Pulse Width Modulation Technique (CPD PWM). The increased harmonic content in the output voltage and current waveforms may be attributed to the unpredictable dynamics of capacitors. To address this, the article also proposes a cascaded voltage and current H∞ repetitive control scheme under normal and fault conditions. This entire scheme has been applied for back to back connected HVDC systems for mitigating the Total Harmonic Distortion (THD) in current and voltage respectively. Further, stability analysis for the proposed controllers has been performed to prove its robust operation and finally all the results have been explored.

Application of an Advanced Repetitive Controller to Mitigate Harmonics in MMC With APOD Scheme

In a modular multilevel converter (MMC), the second and other even-order harmonics in the circulating currents are mainly due to the fluctuations in the capacitor voltages in the sub modules of the MMC. The increased circulating currents affect the system performance and threatens the safety operation of power devices. To mitigate the circulating currents, this article puts forward the application of an advanced repetitive controller with alternate phase opposition and disposition pulse-width modulation technique. The proposed controller was operated in tandem with a proportional integral controller for better results of circulating current harmonic suppression and then the stability analysis was analyzed by the Popov criteria. This method is very simple to implement and suitable for multiple harmonic mitigation. Computer simulations and experimental results on a prototype shows that the proposed controller is effective and easy to implement for MMCs.

Phase Disposition PWM Technique for Eleven Level Cascaded Multilevel Inverter with Reduced Number of Carriers

Applying pulse width modulation (PWM) techniques for cascaded multilevel inverters are very complex for topologies with reduced number of switches. In this paper for phase disposition (PD) pulse width modulation technique a new algorithm is proposed and implemented on eleven level cascaded multilevel inverter under reduced switches topology. In the proposed algorithm instead of N-1 carrier waves, the required number of switching pulses generated by considering number of carrier waves is equal to number of switches. This technique allows lower switching transition and it leads to reduced switching losses for topologies utilize minimum number of switches. 1.2 KHz carrier frequency is used to generate switching pulses and verified up to 100 kHz. The Total harmonic distortion is observed for various switching frequencies. The obtained output voltage levels using PD PWM technique proved mathematically. The performance of proposed algorithm is evaluated using Matlab/Simulink. DOI: http://dx.doi.org/10.11591/telkomnika.v15i1.8076

Power quality enhancement using cascaded multilevel inverter based shunt hybrid active power filter

This paper investigates mitigation of current harmonics using different configuration of cascaded multilevel inverter based shunt hybrid active power filter (SHAPF) and to improve power quality of the system. The main objective of this paper is to develop and analyze the compensation characteristics of cascaded multilevel inverter based shunt hybrid active power filter by employing indirect current control algorithm. The indirect current control algorithm is employed to generate reference current and phase disposition pulse width modulation technique is incorporated to generate gating signal for shunt hybrid active power filter strategy. The nonlinear loads are connected to distort the source current to 21% of harmonics distortion, as per IEEE 519 allowable current harmonic distortion is 5%. To mitigate harmonic distortion, cascaded multilevel inverter based shunt hybrid active power filter is proposed and after compensation the source current harmonic distortion is reduced to 2.93%. The simulation analysis is carried out using SIMPOWERSYSTEMS block set of MATLAB/SIMULINK to determine which of the inverter topology based shunt hybrid active power filter strategy perform better on compensating source current harmonic distortion.